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authorLudovic Pouzenc <ludovic@pouzenc.fr>2018-09-14 22:28:34 +0200
committerLudovic Pouzenc <ludovic@pouzenc.fr>2018-09-14 22:28:34 +0200
commit462c281455b9337cd6be16c650d2e25bc832682d (patch)
treef9a3661fa13429cb42798fc2617170a4eecb446d /target/linux/ramips/patches-3.10/0101-MIPS-ralink-add-verbose-pmu-info.patch
parent3362d9fb3a94d0909b79c290abc8db6abe4cca21 (diff)
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target/linux : drop ramips/patches-3.10
Diffstat (limited to 'target/linux/ramips/patches-3.10/0101-MIPS-ralink-add-verbose-pmu-info.patch')
-rw-r--r--target/linux/ramips/patches-3.10/0101-MIPS-ralink-add-verbose-pmu-info.patch59
1 files changed, 0 insertions, 59 deletions
diff --git a/target/linux/ramips/patches-3.10/0101-MIPS-ralink-add-verbose-pmu-info.patch b/target/linux/ramips/patches-3.10/0101-MIPS-ralink-add-verbose-pmu-info.patch
deleted file mode 100644
index 5a7d5f9..0000000
--- a/target/linux/ramips/patches-3.10/0101-MIPS-ralink-add-verbose-pmu-info.patch
+++ /dev/null
@@ -1,59 +0,0 @@
-From 5689333e7e4396a827a2cb6fa1242159e9af56de Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Mon, 20 May 2013 20:57:09 +0200
-Subject: [PATCH 101/133] MIPS: ralink: add verbose pmu info
-
-Print the PMU and LDO settings on boot.
-
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- arch/mips/ralink/mt7620.c | 26 ++++++++++++++++++++++++++
- 1 file changed, 26 insertions(+)
-
---- a/arch/mips/ralink/mt7620.c
-+++ b/arch/mips/ralink/mt7620.c
-@@ -26,6 +26,22 @@
- #define CLKCFG_FFRAC_MASK 0x001f
- #define CLKCFG_FFRAC_USB_VAL 0x0003
-
-+/* analog */
-+#define PMU0_CFG 0x88
-+#define PMU_SW_SET BIT(28)
-+#define A_DCDC_EN BIT(24)
-+#define A_SSC_PERI BIT(19)
-+#define A_SSC_GEN BIT(18)
-+#define A_SSC_M 0x3
-+#define A_SSC_S 16
-+#define A_DLY_M 0x7
-+#define A_DLY_S 8
-+#define A_VTUNE_M 0xff
-+
-+/* digital */
-+#define PMU1_CFG 0x8C
-+#define DIG_SW_SEL BIT(25)
-+
- /* does the board have sdram or ddram */
- static int dram_type;
-
-@@ -208,6 +224,8 @@ void prom_soc_init(struct ralink_soc_inf
- u32 n1;
- u32 rev;
- u32 cfg0;
-+ u32 pmu0;
-+ u32 pmu1;
-
- n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
- n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
-@@ -255,4 +273,12 @@ void prom_soc_init(struct ralink_soc_inf
- BUG();
- }
- soc_info->mem_base = MT7620_DRAM_BASE;
-+
-+ pmu0 = __raw_readl(sysc + PMU0_CFG);
-+ pmu1 = __raw_readl(sysc + PMU1_CFG);
-+
-+ pr_info("Analog PMU set to %s control\n",
-+ (pmu0 & PMU_SW_SET) ? ("sw") : ("hw"));
-+ pr_info("Digital PMU set to %s control\n",
-+ (pmu1 & DIG_SW_SEL) ? ("sw") : ("hw"));
- }