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authorJonas Gorski <jogo@openwrt.org>2013-06-30 13:10:12 +0000
committerJonas Gorski <jogo@openwrt.org>2013-06-30 13:10:12 +0000
commit0d9f760f272f3ccb3abcaca8e678734b666e234c (patch)
tree14237dc1b483b6fefbf696164b80f594e9826e49 /target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch
parent6a4e78dca6ecd4325504f0a74cd1816275157eea (diff)
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kernel: update linux 3.9 to 3.9.8
Includes memory allocation fixes as well as several networking fixes. Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 37103
Diffstat (limited to 'target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch')
-rw-r--r--target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch9
1 files changed, 1 insertions, 8 deletions
diff --git a/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch b/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch
index 0014838..10b15dc 100644
--- a/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch
+++ b/target/linux/ramips/patches-3.9/0126-MIPS-ralink-add-memory-definition-for-MT7620.patch
@@ -12,8 +12,6 @@ Patchwork: http://patchwork.linux-mips.org/patch/5183/
arch/mips/ralink/mt7620.c | 20 ++++++++++++++++++++
2 files changed, 28 insertions(+)
-diff --git a/arch/mips/include/asm/mach-ralink/mt7620.h b/arch/mips/include/asm/mach-ralink/mt7620.h
-index b272649..9809972 100644
--- a/arch/mips/include/asm/mach-ralink/mt7620.h
+++ b/arch/mips/include/asm/mach-ralink/mt7620.h
@@ -50,6 +50,14 @@
@@ -31,11 +29,9 @@ index b272649..9809972 100644
#define MT7620_GPIO_MODE_I2C BIT(0)
#define MT7620_GPIO_MODE_UART0_SHIFT 2
#define MT7620_GPIO_MODE_UART0_MASK 0x7
-diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
-index eb00ab8..98ddb93 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
-@@ -211,4 +211,24 @@ void prom_soc_init(struct ralink_soc_info *soc_info)
+@@ -211,4 +211,24 @@ void prom_soc_init(struct ralink_soc_inf
cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
@@ -60,6 +56,3 @@ index eb00ab8..98ddb93 100644
+ }
+ soc_info->mem_base = MT7620_DRAM_BASE;
}
---
-1.7.10.4
-