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author | Etienne Haarsma <bladeoner112@gmail.com> | 2017-12-21 10:28:16 +0100 |
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committer | Mathias Kresin <dev@kresin.me> | 2017-12-23 09:42:33 +0100 |
commit | f8a441e02030dda0ef66a440105e28a3c43188bc (patch) | |
tree | 14df28ab5b54cb95e9054c2ae42596c2f1a7c348 /target/linux/ramips/patches-4.4/0511-net-mediatek-add-support-for-the-multiphy-carrier-pa.patch | |
parent | ceea0ac25d987de1f84376405d38d43337d31cf5 (diff) | |
download | mtk-20170518-f8a441e02030dda0ef66a440105e28a3c43188bc.zip mtk-20170518-f8a441e02030dda0ef66a440105e28a3c43188bc.tar.gz mtk-20170518-f8a441e02030dda0ef66a440105e28a3c43188bc.tar.bz2 |
kernel: bump 4.4 to 4.4.107
Bump 4.4 to 4.4.107 and refreshed all patches.
Made the following patch for Mediatek and Oxnas compatible with kernel 4.4.107:
0072-mtd-backport-v4.7-0day-patches-from-Boris.patch
Compile-tested: ar71xx
Run-tested: ar71xx
Signed-off-by: Etienne Haarsma <bladeoner112@gmail.com>
Reviewed-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk>
Tested-by: Rosen Penev <rosenp@gmail.com>
Diffstat (limited to 'target/linux/ramips/patches-4.4/0511-net-mediatek-add-support-for-the-multiphy-carrier-pa.patch')
-rw-r--r-- | target/linux/ramips/patches-4.4/0511-net-mediatek-add-support-for-the-multiphy-carrier-pa.patch | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/ramips/patches-4.4/0511-net-mediatek-add-support-for-the-multiphy-carrier-pa.patch b/target/linux/ramips/patches-4.4/0511-net-mediatek-add-support-for-the-multiphy-carrier-pa.patch index 4d5c2d8..643c687 100644 --- a/target/linux/ramips/patches-4.4/0511-net-mediatek-add-support-for-the-multiphy-carrier-pa.patch +++ b/target/linux/ramips/patches-4.4/0511-net-mediatek-add-support-for-the-multiphy-carrier-pa.patch @@ -25,7 +25,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org> return IRQ_HANDLED; --- a/drivers/net/ethernet/mediatek/gsw_mt7620.h +++ b/drivers/net/ethernet/mediatek/gsw_mt7620.h -@@ -113,5 +113,6 @@ u32 mt7530_mdio_r32(struct mt7620_gsw *g +@@ -119,5 +119,6 @@ u32 mt7530_mdio_r32(struct mt7620_gsw *g u32 _mt7620_mii_write(struct mt7620_gsw *gsw, u32 phy_addr, u32 phy_register, u32 write_data); u32 _mt7620_mii_read(struct mt7620_gsw *gsw, int phy_addr, int phy_reg); |