Add ioctls to glamo framebuffer driver to enable/disable glamo engines.

SVN-Revision: 16686

3 files changed, 71 insertions, 33 deletions

diff --git a/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.c b/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.c
index a2332a7..a27f785 100644
--- a/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.c
+++ b/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.c
@@ -536,6 +536,9 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
 		__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
 				   GLAMO_HOSTBUS2_MMIO_EN_2D,
 				   GLAMO_HOSTBUS2_MMIO_EN_2D);
+		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
+		                   GLAMO_CLOCK_GEN51_EN_DIV_GCLK,
+						   0xffff);
 		break;
 	case GLAMO_ENGINE_CMDQ:
 		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
@@ -543,10 +546,13 @@ int __glamo_engine_enable(struct glamo_core *glamo, enum glamo_engine engine)
 		__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
 				   GLAMO_HOSTBUS2_MMIO_EN_CQ,
 				   GLAMO_HOSTBUS2_MMIO_EN_CQ);
+		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
+		                   GLAMO_CLOCK_GEN51_EN_DIV_MCLK,
+						   0xffff);
 		break;
 	/* FIXME: Implementation */
 	default:
-		break;
+		return -EINVAL;
 	}
 
 	glamo->engine_enabled_bitfield |= 1 << engine;
@@ -589,17 +595,42 @@ int __glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
 		break;
 
 	case GLAMO_ENGINE_MMC:
-//		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC,
-//						   GLAMO_CLOCK_MMC_EN_M9CLK |
-//						   GLAMO_CLOCK_MMC_EN_TCLK |
-//						   GLAMO_CLOCK_MMC_DG_M9CLK |
-//						   GLAMO_CLOCK_MMC_DG_TCLK, 0);
+		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_MMC,
+						   GLAMO_CLOCK_MMC_EN_M9CLK |
+						   GLAMO_CLOCK_MMC_EN_TCLK |
+						   GLAMO_CLOCK_MMC_DG_M9CLK |
+						   GLAMO_CLOCK_MMC_DG_TCLK, 0);
 		/* disable the TCLK divider clk input */
-//		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
-//					GLAMO_CLOCK_GEN51_EN_DIV_TCLK, 0);
-
-	default:
+		__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
+					GLAMO_CLOCK_GEN51_EN_DIV_TCLK, 0);
+        break;
+	case GLAMO_ENGINE_CMDQ:
+			__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
+			                   GLAMO_CLOCK_2D_EN_M6CLK,
+							   0);
+			__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
+			                   GLAMO_HOSTBUS2_MMIO_EN_CQ,
+			                   GLAMO_HOSTBUS2_MMIO_EN_CQ);
+/*			__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
+			                   GLAMO_CLOCK_GEN51_EN_DIV_MCLK,
+							   0);*/
+		break;
+	case GLAMO_ENGINE_2D:
+			__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_2D,
+			                   GLAMO_CLOCK_2D_EN_M7CLK |
+							   GLAMO_CLOCK_2D_EN_GCLK |
+							   GLAMO_CLOCK_2D_DG_M7CLK |
+							   GLAMO_CLOCK_2D_DG_GCLK,
+							   0);
+			__reg_set_bit_mask(glamo, GLAMO_REG_HOSTBUS(2),
+			                   GLAMO_HOSTBUS2_MMIO_EN_2D,
+			                   GLAMO_HOSTBUS2_MMIO_EN_2D);
+			__reg_set_bit_mask(glamo, GLAMO_REG_CLOCK_GEN5_1,
+			                   GLAMO_CLOCK_GEN51_EN_DIV_GCLK,
+							   0);
 		break;
+	default:
+		return -EINVAL;
 	}
 
 	glamo->engine_enabled_bitfield &= ~(1 << engine);
@@ -667,6 +698,9 @@ struct glamo_script reset_regs[] = {
 	[GLAMO_ENGINE_MMC] = {
 		GLAMO_REG_CLOCK_MMC, GLAMO_CLOCK_MMC_RESET
 	},
+    [GLAMO_ENGINE_CMDQ] = {
+        GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_CQ_RESET
+    },
 	[GLAMO_ENGINE_2D] = {
 		GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_RESET
 	},
diff --git a/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.h b/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.h
index 8e09564..8a7907e 100644
--- a/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.h
+++ b/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-core.h
@@ -2,6 +2,7 @@
 #define __GLAMO_CORE_H
 
 #include <asm/system.h>
+#include <linux/glamo-engine.h>
 
 /* for the time being, we put the on-screen framebuffer into the lowest
  * VRAM space.  This should make the code easily compatible with the various
@@ -40,29 +41,6 @@ struct glamo_script {
 int glamo_run_script(struct glamo_core *glamo,
 		     struct glamo_script *script, int len, int may_sleep);
 
-enum glamo_engine {
-	GLAMO_ENGINE_CAPTURE,
-	GLAMO_ENGINE_ISP,
-	GLAMO_ENGINE_JPEG,
-	GLAMO_ENGINE_MPEG_ENC,
-	GLAMO_ENGINE_MPEG_DEC,
-	GLAMO_ENGINE_LCD,
-	GLAMO_ENGINE_CMDQ,
-	GLAMO_ENGINE_2D,
-	GLAMO_ENGINE_3D,
-	GLAMO_ENGINE_MMC,
-	GLAMO_ENGINE_MICROP0,
-	GLAMO_ENGINE_RISC,
-	GLAMO_ENGINE_MICROP1_MPEG_ENC,
-	GLAMO_ENGINE_MICROP1_MPEG_DEC,
-#if 0
-	GLAMO_ENGINE_H264_DEC,
-	GLAMO_ENGINE_RISC1,
-	GLAMO_ENGINE_SPI,
-#endif
-	__NUM_GLAMO_ENGINES
-};
-
 struct glamo_mci_pdata {
 	struct glamo_core * pglamo;
 	unsigned int	gpio_detect;
diff --git a/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-fb.c b/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-fb.c
index 0a47f65..c3422ff 100644
--- a/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-fb.c
+++ b/target/linux/s3c24xx/files-2.6.30/drivers/mfd/glamo/glamo-fb.c
@@ -535,6 +535,31 @@ static int glamofb_setcolreg(unsigned regno,
 	return 0;
 }
 
+static int glamofb_ioctl(struct fb_info *info, unsigned int cmd,
+                         unsigned long arg) {
+	struct glamofb_handle *gfb = (struct glamofb_handle*)info->par;
+	struct glamo_core *gcore = gfb->mach_info->glamo;
+	int retval = -ENOTTY;
+
+	switch (cmd) {
+	case GLAMOFB_ENGINE_ENABLE:
+		retval = glamo_engine_enable(gcore, arg);
+		break;
+	case GLAMOFB_ENGINE_DISABLE:
+		retval = glamo_engine_disable(gcore, arg);
+		break;
+	case GLAMOFB_ENGINE_RESET:
+		glamo_engine_reset(gcore, arg);
+		retval = 0;
+		break;
+	default:
+		break;
+	}
+
+	return retval;
+}
+
+
 #ifdef CONFIG_MFD_GLAMO_HWACCEL
 static inline void glamofb_vsync_wait(struct glamofb_handle *glamo,
 		int line, int size, int range)
@@ -770,6 +795,7 @@ static struct fb_ops glamofb_ops = {
 	.fb_set_par	= glamofb_set_par,
 	.fb_blank	= glamofb_blank,
 	.fb_setcolreg	= glamofb_setcolreg,
+	.fb_ioctl = glamofb_ioctl,
 #ifdef CONFIG_MFD_GLAMO_HWACCEL
 	.fb_cursor	= glamofb_cursor,
 #endif