sunxi: rework target - update kernel to 3.12 - add patches for clocks, i2c, usb, sid, rtc - support common image for A10/A13/A20 - add support for a couple boards - most drivers are configured into the kernel as of now

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>

SVN-Revision: 38811

1 files changed, 73 insertions, 0 deletions

diff --git a/target/linux/sunxi/patches-3.12/130-sun7i-enable-i2c-ctrlers.patch b/target/linux/sunxi/patches-3.12/130-sun7i-enable-i2c-ctrlers.patch
new file mode 100644
index 0000000..ef761a6
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/130-sun7i-enable-i2c-ctrlers.patch
@@ -0,0 +1,73 @@
+From 220d6c860e0c7853aea6509ea2b5a44463c9af8b Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@free-electrons.com>
+Date: Sat, 31 Aug 2013 23:07:24 +0200
+Subject: [PATCH] ARM: sun7i: Enable the I2C controllers
+
+The Allwinner A20 shares the same I2C controller than the one that could
+be found on earlier SoCs from Allwinner. There is only a few more of
+these controllers. Add all of them in the DTSI.
+
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm/boot/dts/sun7i-a20.dtsi | 45 ++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 45 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
+index 2e39ed9..0d0ee15 100644
+--- a/arch/arm/boot/dts/sun7i-a20.dtsi
++++ b/arch/arm/boot/dts/sun7i-a20.dtsi
+@@ -340,6 +340,51 @@
+ 			status = "disabled";
+ 		};
+ 
++		i2c0: i2c@01c2ac00 {
++			compatible = "allwinner,sun4i-i2c";
++			reg = <0x01c2ac00 0x400>;
++			interrupts = <0 7 1>;
++			clocks = <&apb1_gates 0>;
++			clock-frequency = <100000>;
++			status = "disabled";
++		};
++
++		i2c1: i2c@01c2b000 {
++			compatible = "allwinner,sun4i-i2c";
++			reg = <0x01c2b000 0x400>;
++			interrupts = <0 8 1>;
++			clocks = <&apb1_gates 1>;
++			clock-frequency = <100000>;
++			status = "disabled";
++		};
++
++		i2c2: i2c@01c2b400 {
++			compatible = "allwinner,sun4i-i2c";
++			reg = <0x01c2b400 0x400>;
++			interrupts = <0 9 1>;
++			clocks = <&apb1_gates 2>;
++			clock-frequency = <100000>;
++			status = "disabled";
++		};
++
++		i2c3: i2c@01c2b800 {
++			compatible = "allwinner,sun4i-i2c";
++			reg = <0x01c2b800 0x400>;
++			interrupts = <0 88 1>;
++			clocks = <&apb1_gates 3>;
++			clock-frequency = <100000>;
++			status = "disabled";
++		};
++
++		i2c4: i2c@01c2bc00 {
++			compatible = "allwinner,sun4i-i2c";
++			reg = <0x01c2bc00 0x400>;
++			interrupts = <0 89 1>;
++			clocks = <&apb1_gates 15>;
++			clock-frequency = <100000>;
++			status = "disabled";
++		};
++
+ 		gic: interrupt-controller@01c81000 {
+ 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
+ 			reg = <0x01c81000 0x1000>,
+-- 
+1.8.4
+