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authorLars-Peter Clausen <lars@metafoo.de>2010-03-08 20:34:01 +0000
committerLars-Peter Clausen <lars@metafoo.de>2010-03-08 20:34:01 +0000
commit94f764a9d679d8c63c6765d037d1c4f2a3cb0fbd (patch)
treeca2e8abc5e90403ded36628e788cdc5ed4afd953 /target/linux
parentfa445c6a47010f08b7b2e28b3584af150b440d2e (diff)
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Fix gpio and irq wakeup irq handling.
SVN-Revision: 20070
Diffstat (limited to 'target/linux')
-rw-r--r--target/linux/xburst/files-2.6.32/arch/mips/jz4740/gpio.c6
-rw-r--r--target/linux/xburst/files-2.6.32/arch/mips/jz4740/irq.c2
2 files changed, 7 insertions, 1 deletions
diff --git a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/gpio.c b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/gpio.c
index ccaa060..df5df5c 100644
--- a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/gpio.c
+++ b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/gpio.c
@@ -446,6 +446,7 @@ int jz_gpio_suspend(void)
gpio = chip->gpio_chip.base;
chip->suspend_mask = readl(GPIO_TO_REG(gpio, JZ_REG_GPIO_MASK));
writel(~(chip->wakeup), GPIO_TO_REG(gpio, JZ_REG_GPIO_MASK_SET));
+ writel(chip->wakeup, GPIO_TO_REG(gpio, JZ_REG_GPIO_MASK_CLEAR));
}
chip = jz_gpio_chips;
@@ -459,7 +460,10 @@ int jz_gpio_resume(void)
int i;
for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) {
- writel(~(chip->suspend_mask), GPIO_TO_REG(chip->gpio_chip.base, JZ_REG_GPIO_MASK_CLEAR));
+ writel(~(chip->suspend_mask), GPIO_TO_REG(chip->gpio_chip.base,
+ JZ_REG_GPIO_MASK_CLEAR));
+ writel(chip->suspend_mask, GPIO_TO_REG(chip->gpio_chip.base,
+ JZ_REG_GPIO_MASK_SET));
}
return 0;
diff --git a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/irq.c b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/irq.c
index a6f4bbf..11e5a63 100644
--- a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/irq.c
+++ b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/irq.c
@@ -122,11 +122,13 @@ void jz4740_intc_suspend(void)
{
jz_intc_saved = readl(jz_intc_base + JZ_REG_INTC_MASK);
writel(~jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_SET_MASK);
+ writel(jz_intc_wakeup, jz_intc_base + JZ_REG_INTC_CLEAR_MASK);
}
void jz4740_intc_resume(void)
{
writel(~jz_intc_saved, jz_intc_base + JZ_REG_INTC_CLEAR_MASK);
+ writel(jz_intc_saved, jz_intc_base + JZ_REG_INTC_SET_MASK);
}
#ifdef CONFIG_DEBUG_FS