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authorJohn Crispin <john@openwrt.org>2013-01-02 11:28:21 +0000
committerJohn Crispin <john@openwrt.org>2013-01-02 11:28:21 +0000
commit569bbe49700b2cf0b6c3b1e6a6ecf70aad3d6b81 (patch)
tree1c6ef3515150c2f5334cc281aff4cc2910d3b05a /target
parenta730e96569c72c13919ef75dbd63fdd065debb36 (diff)
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rt5350 switch support fix
RT5350 frame engine need reset frame engine and embedded switch together. Signed-off-by: Serge Vasilugin <vasilugin@yandex.ru> SVN-Revision: 34969
Diffstat (limited to 'target')
-rw-r--r--target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c
index 557eb10..42429b7 100644
--- a/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c
+++ b/target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c
@@ -116,7 +116,11 @@ void __init rt305x_register_flash(unsigned int id)
static void rt305x_fe_reset(void)
{
- rt305x_sysc_wr(RT305X_RESET_FE, SYSC_REG_RESET_CTRL);
+ u32 reset_bits = RT305X_RESET_FE;
+
+ if (soc_is_rt5350())
+ reset_bits |= RT305X_RESET_ESW;
+ rt305x_sysc_wr(reset_bits, SYSC_REG_RESET_CTRL);
rt305x_sysc_wr(0, SYSC_REG_RESET_CTRL);
}