mvebu: backport some upstream changes

Signed-off-by: Imre Kaloz <kaloz@openwrt.org>

SVN-Revision: 44127

15 files changed, 1563 insertions, 2 deletions

diff --git a/target/linux/mvebu/patches-3.18/007-fix_the_aurora_l2_cache_node.patch b/target/linux/mvebu/patches-3.18/007-fix_the_aurora_l2_cache_node.patch
new file mode 100644
index 0000000..20f0f71
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/007-fix_the_aurora_l2_cache_node.patch
@@ -0,0 +1,40 @@
+From a9ce1afb35317d2a0646c7530f0ae9822c93cd69 Mon Sep 17 00:00:00 2001
+From: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Date: Mon, 6 Oct 2014 11:37:56 +0200
+Subject: ARM: mvebu: Fix the Aurora L2 cache node with the required
+ cache-unified property
+
+The L2 cache controller on the Armada 370 and Armada XP SoCs is a
+unified cache. Moreover, the Aurora cache controller is compatible
+with the L2x0 cache controller: the "cache-unified" property is
+required by its binding.
+
+This patch fixes the Aurora L2 cache node for the Armada 370 and
+Armada XP SoCs by adding this property.
+
+Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
+Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-370.dtsi
++++ b/arch/arm/boot/dts/armada-370.dtsi
+@@ -95,6 +95,7 @@
+ 				compatible = "marvell,aurora-outer-cache";
+ 				reg = <0x08000 0x1000>;
+ 				cache-id-part = <0x100>;
++				cache-unified;
+ 				wt-override;
+ 			};
+ 
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -39,6 +39,7 @@
+ 				compatible = "marvell,aurora-system-cache";
+ 				reg = <0x08000 0x1000>;
+ 				cache-id-part = <0x100>;
++				cache-unified;
+ 				wt-override;
+ 			};
+ 
diff --git a/target/linux/mvebu/patches-3.18/008-armada-xp_consolidate_pinctrl_node.patch b/target/linux/mvebu/patches-3.18/008-armada-xp_consolidate_pinctrl_node.patch
new file mode 100644
index 0000000..2e1010c
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/008-armada-xp_consolidate_pinctrl_node.patch
@@ -0,0 +1,81 @@
+From b324fa60ac94b9c00c59f621743715c036d134fa Mon Sep 17 00:00:00 2001
+From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Date: Fri, 19 Sep 2014 21:07:09 +0200
+Subject: ARM: mvebu: armada-xp: Consolidate pinctrl node
+
+All current Armada XP SoCs have their pin controller at 0x18000/0x38.
+Move the common properties of pinctrl nodes to armada-xp.dtsi to allow
+to share pinctrl settings later.
+
+Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Tested-By: Benoit Masson <yahoo@perenite.com>
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+@@ -169,13 +169,6 @@
+ 		internal-regs {
+ 			pinctrl {
+ 				compatible = "marvell,mv78230-pinctrl";
+-				reg = <0x18000 0x38>;
+-
+-				sdio_pins: sdio-pins {
+-					marvell,pins = "mpp30", "mpp31", "mpp32",
+-						       "mpp33", "mpp34", "mpp35";
+-					marvell,function = "sd0";
+-				};
+ 			};
+ 
+ 			gpio0: gpio@18100 {
+--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+@@ -253,13 +253,6 @@
+ 		internal-regs {
+ 			pinctrl {
+ 				compatible = "marvell,mv78260-pinctrl";
+-				reg = <0x18000 0x38>;
+-
+-				sdio_pins: sdio-pins {
+-					marvell,pins = "mpp30", "mpp31", "mpp32",
+-						       "mpp33", "mpp34", "mpp35";
+-					marvell,function = "sd0";
+-				};
+ 			};
+ 
+ 			gpio0: gpio@18100 {
+--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+@@ -291,13 +291,6 @@
+ 		internal-regs {
+ 			pinctrl {
+ 				compatible = "marvell,mv78460-pinctrl";
+-				reg = <0x18000 0x38>;
+-
+-				sdio_pins: sdio-pins {
+-					marvell,pins = "mpp30", "mpp31", "mpp32",
+-						       "mpp33", "mpp34", "mpp35";
+-					marvell,function = "sd0";
+-				};
+ 			};
+ 
+ 			gpio0: gpio@18100 {
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -72,6 +72,16 @@
+ 				status = "disabled";
+ 			};
+ 
++			pinctrl {
++				reg = <0x18000 0x38>;
++
++				sdio_pins: sdio-pins {
++					marvell,pins = "mpp30", "mpp31", "mpp32",
++						       "mpp33", "mpp34", "mpp35";
++					marvell,function = "sd0";
++				};
++			};
++
+ 			system-controller@18200 {
+ 				compatible = "marvell,armada-370-xp-system-controller";
+ 				reg = <0x18200 0x500>;
diff --git a/target/linux/mvebu/patches-3.18/010-add_node_alias_to_pinctrl_and_add_base_address.patch b/target/linux/mvebu/patches-3.18/010-add_node_alias_to_pinctrl_and_add_base_address.patch
new file mode 100644
index 0000000..059aead
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/010-add_node_alias_to_pinctrl_and_add_base_address.patch
@@ -0,0 +1,103 @@
+From 264a05e19bf50f93f1a377e16497a626ae9f931e Mon Sep 17 00:00:00 2001
+From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Date: Fri, 19 Sep 2014 21:12:00 +0200
+Subject: ARM: mvebu: armada-xp: Add node alias to pinctrl and add base address
+
+In other MVEBU SoCs, the pin controller node is called pin-ctrl with
+its base address added. Also, we have a node alias to access the pinctrl
+node easily. Fix this for Armada XP pinctrl nodes to be consistent with
+other SoCs.
+
+Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Tested-By: Benoit Masson <yahoo@perenite.com>
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
++++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+@@ -60,7 +60,7 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				pinctrl-0 = <&pmx_phy_int>;
+ 				pinctrl-names = "default";
+ 
+--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
++++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+@@ -51,7 +51,7 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				poweroff_pin: poweroff-pin {
+ 					marvell,pins = "mpp24";
+ 					marvell,function = "gpio";
+--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+@@ -167,7 +167,7 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				compatible = "marvell,mv78230-pinctrl";
+ 			};
+ 
+--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+@@ -251,7 +251,7 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				compatible = "marvell,mv78260-pinctrl";
+ 			};
+ 
+--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+@@ -289,7 +289,7 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				compatible = "marvell,mv78460-pinctrl";
+ 			};
+ 
+--- a/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
++++ b/arch/arm/boot/dts/armada-xp-netgear-rn2120.dts
+@@ -55,7 +55,7 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				poweroff: poweroff {
+ 					marvell,pins = "mpp42";
+ 					marvell,function = "gpio";
+--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
++++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+@@ -77,7 +77,7 @@
+ 			serial@12100 {
+ 				status = "okay";
+ 			};
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				led_pins: led-pins-0 {
+ 					marvell,pins = "mpp49", "mpp51", "mpp53";
+ 					marvell,function = "gpio";
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -72,7 +72,7 @@
+ 				status = "disabled";
+ 			};
+ 
+-			pinctrl {
++			pinctrl: pin-ctrl@18000 {
+ 				reg = <0x18000 0x38>;
+ 
+ 				sdio_pins: sdio-pins {
diff --git a/target/linux/mvebu/patches-3.18/011-use_pinctrl_node_alias.patch b/target/linux/mvebu/patches-3.18/011-use_pinctrl_node_alias.patch
new file mode 100644
index 0000000..2069c88
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/011-use_pinctrl_node_alias.patch
@@ -0,0 +1,258 @@
+From 01c434225ee67388711e78166cfe9b159e34fc9d Mon Sep 17 00:00:00 2001
+From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Date: Fri, 19 Sep 2014 21:20:09 +0200
+Subject: ARM: mvebu: armada-xp: Use pinctrl node alias
+
+Armada XP pinctrl node gained an alias, make use of it.
+
+Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Tested-By: Benoit Masson <yahoo@perenite.com>
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
++++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+@@ -60,40 +60,6 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl: pin-ctrl@18000 {
+-				pinctrl-0 = <&pmx_phy_int>;
+-				pinctrl-names = "default";
+-
+-				pmx_ge0: pmx-ge0 {
+-					marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+-						       "mpp4", "mpp5", "mpp6", "mpp7",
+-						       "mpp8", "mpp9", "mpp10", "mpp11";
+-					marvell,function = "ge0";
+-				};
+-
+-				pmx_ge1: pmx-ge1 {
+-					marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
+-						       "mpp16", "mpp17", "mpp18", "mpp19",
+-						       "mpp20", "mpp21", "mpp22", "mpp23";
+-					marvell,function = "ge1";
+-				};
+-
+-				pmx_keys: pmx-keys {
+-					marvell,pins = "mpp33";
+-					marvell,function = "gpio";
+-				};
+-
+-				pmx_spi: pmx-spi {
+-					marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
+-					marvell,function = "spi";
+-				};
+-
+-				pmx_phy_int: pmx-phy-int {
+-					marvell,pins = "mpp32";
+-					marvell,function = "gpio";
+-				};
+-			};
+-
+ 			serial@12000 {
+ 				status = "okay";
+ 			};
+@@ -162,3 +128,37 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	pinctrl-0 = <&pmx_phy_int>;
++	pinctrl-names = "default";
++
++	pmx_ge0: pmx-ge0 {
++		marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
++			       "mpp4", "mpp5", "mpp6", "mpp7",
++			       "mpp8", "mpp9", "mpp10", "mpp11";
++		marvell,function = "ge0";
++	};
++
++	pmx_ge1: pmx-ge1 {
++		marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
++			       "mpp16", "mpp17", "mpp18", "mpp19",
++			       "mpp20", "mpp21", "mpp22", "mpp23";
++		marvell,function = "ge1";
++	};
++
++	pmx_keys: pmx-keys {
++		marvell,pins = "mpp33";
++		marvell,function = "gpio";
++	};
++
++	pmx_spi: pmx-spi {
++		marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
++		marvell,function = "spi";
++	};
++
++	pmx_phy_int: pmx-phy-int {
++		marvell,pins = "mpp32";
++		marvell,function = "gpio";
++	};
++};
+--- a/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
++++ b/arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
+@@ -51,37 +51,6 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl: pin-ctrl@18000 {
+-				poweroff_pin: poweroff-pin {
+-					marvell,pins = "mpp24";
+-					marvell,function = "gpio";
+-				};
+-
+-				power_button_pin: power-button-pin {
+-					marvell,pins = "mpp44";
+-					marvell,function = "gpio";
+-				};
+-
+-				reset_button_pin: reset-button-pin {
+-					marvell,pins = "mpp45";
+-					marvell,function = "gpio";
+-				};
+-				select_button_pin: select-button-pin {
+-					marvell,pins = "mpp41";
+-					marvell,function = "gpio";
+-				};
+-
+-				scroll_button_pin: scroll-button-pin {
+-					marvell,pins = "mpp42";
+-					marvell,function = "gpio";
+-				};
+-
+-				hdd_led_pin: hdd-led-pin {
+-					marvell,pins = "mpp26";
+-					marvell,function = "gpio";
+-				};
+-			};
+-
+ 			serial@12000 {
+ 				status = "okay";
+ 			};
+@@ -282,3 +251,34 @@
+ 		gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+ 	};
+ };
++
++&pinctrl {
++	poweroff_pin: poweroff-pin {
++		marvell,pins = "mpp24";
++		marvell,function = "gpio";
++	};
++
++	power_button_pin: power-button-pin {
++		marvell,pins = "mpp44";
++		marvell,function = "gpio";
++	};
++
++	reset_button_pin: reset-button-pin {
++		marvell,pins = "mpp45";
++		marvell,function = "gpio";
++	};
++	select_button_pin: select-button-pin {
++		marvell,pins = "mpp41";
++		marvell,function = "gpio";
++	};
++
++	scroll_button_pin: scroll-button-pin {
++		marvell,pins = "mpp42";
++		marvell,function = "gpio";
++	};
++
++	hdd_led_pin: hdd-led-pin {
++		marvell,pins = "mpp26";
++		marvell,function = "gpio";
++	};
++};
+--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+@@ -167,10 +167,6 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl: pin-ctrl@18000 {
+-				compatible = "marvell,mv78230-pinctrl";
+-			};
+-
+ 			gpio0: gpio@18100 {
+ 				compatible = "marvell,orion-gpio";
+ 				reg = <0x18100 0x40>;
+@@ -195,3 +191,7 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	compatible = "marvell,mv78230-pinctrl";
++};
+--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+@@ -251,10 +251,6 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl: pin-ctrl@18000 {
+-				compatible = "marvell,mv78260-pinctrl";
+-			};
+-
+ 			gpio0: gpio@18100 {
+ 				compatible = "marvell,orion-gpio";
+ 				reg = <0x18100 0x40>;
+@@ -298,3 +294,7 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	compatible = "marvell,mv78260-pinctrl";
++};
+--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
++++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+@@ -289,10 +289,6 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl: pin-ctrl@18000 {
+-				compatible = "marvell,mv78460-pinctrl";
+-			};
+-
+ 			gpio0: gpio@18100 {
+ 				compatible = "marvell,orion-gpio";
+ 				reg = <0x18100 0x40>;
+@@ -336,3 +332,7 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	compatible = "marvell,mv78460-pinctrl";
++};
+--- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
++++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
+@@ -77,12 +77,7 @@
+ 			serial@12100 {
+ 				status = "okay";
+ 			};
+-			pinctrl: pin-ctrl@18000 {
+-				led_pins: led-pins-0 {
+-					marvell,pins = "mpp49", "mpp51", "mpp53";
+-					marvell,function = "gpio";
+-				};
+-			};
++
+ 			leds {
+ 				compatible = "gpio-leds";
+ 				pinctrl-names = "default";
+@@ -187,3 +182,10 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	led_pins: led-pins-0 {
++		marvell,pins = "mpp49", "mpp51", "mpp53";
++		marvell,function = "gpio";
++	};
++};
diff --git a/target/linux/mvebu/patches-3.18/012-move_ge_pinctrl_settings_for_rgmii.patch b/target/linux/mvebu/patches-3.18/012-move_ge_pinctrl_settings_for_rgmii.patch
new file mode 100644
index 0000000..0aadd89
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/012-move_ge_pinctrl_settings_for_rgmii.patch
@@ -0,0 +1,81 @@
+From e59451432d7e0f7953e29c15e70111dfdbecc145 Mon Sep 17 00:00:00 2001
+From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Date: Fri, 19 Sep 2014 21:24:34 +0200
+Subject: ARM: mvebu: armada-xp: Move GE0/1 pinctrl settings for RGMII
+
+Pinctrl settings for GE0 and GE1 are not only usable on RD-AXPWiFiAP.
+Moreover, naming the RGMII settings pmx-ge{0,1} is not precise enough
+as there is also a GMII setting for GE0.
+
+Move the pinctrl sub-nodes to the common pinctrl node and rename them
+to pmx-ge{0,1}-rgmii.
+
+Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Tested-By: Benoit Masson <yahoo@perenite.com>
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
++++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+@@ -84,14 +84,14 @@
+ 			};
+ 
+ 			ethernet@70000 {
+-				pinctrl-0 = <&pmx_ge0>;
++				pinctrl-0 = <&pmx_ge0_rgmii>;
+ 				pinctrl-names = "default";
+ 				status = "okay";
+ 				phy = <&phy0>;
+ 				phy-mode = "rgmii-id";
+ 			};
+ 			ethernet@74000 {
+-				pinctrl-0 = <&pmx_ge1>;
++				pinctrl-0 = <&pmx_ge1_rgmii>;
+ 				pinctrl-names = "default";
+ 				status = "okay";
+ 				phy = <&phy1>;
+@@ -133,20 +133,6 @@
+ 	pinctrl-0 = <&pmx_phy_int>;
+ 	pinctrl-names = "default";
+ 
+-	pmx_ge0: pmx-ge0 {
+-		marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
+-			       "mpp4", "mpp5", "mpp6", "mpp7",
+-			       "mpp8", "mpp9", "mpp10", "mpp11";
+-		marvell,function = "ge0";
+-	};
+-
+-	pmx_ge1: pmx-ge1 {
+-		marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15",
+-			       "mpp16", "mpp17", "mpp18", "mpp19",
+-			       "mpp20", "mpp21", "mpp22", "mpp23";
+-		marvell,function = "ge1";
+-	};
+-
+ 	pmx_keys: pmx-keys {
+ 		marvell,pins = "mpp33";
+ 		marvell,function = "gpio";
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -75,6 +75,22 @@
+ 			pinctrl: pin-ctrl@18000 {
+ 				reg = <0x18000 0x38>;
+ 
++				pmx_ge0_rgmii: pmx-ge0-rgmii {
++					marvell,pins =
++					     "mpp0", "mpp1", "mpp2", "mpp3",
++					     "mpp4", "mpp5", "mpp6", "mpp7",
++					     "mpp8", "mpp9", "mpp10", "mpp11";
++					marvell,function = "ge0";
++				};
++
++				pmx_ge1_rgmii: pmx-ge1-rgmii {
++					marvell,pins =
++					     "mpp12", "mpp13", "mpp14", "mpp15",
++					     "mpp16", "mpp17", "mpp18", "mpp19",
++					     "mpp20", "mpp21", "mpp22", "mpp23";
++					marvell,function = "ge1";
++				};
++
+ 				sdio_pins: sdio-pins {
+ 					marvell,pins = "mpp30", "mpp31", "mpp32",
+ 						       "mpp33", "mpp34", "mpp35";
diff --git a/target/linux/mvebu/patches-3.18/013-add_ge0_pinctrl_settings_for_gmii.patch b/target/linux/mvebu/patches-3.18/013-add_ge0_pinctrl_settings_for_gmii.patch
new file mode 100644
index 0000000..37bdae6
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/013-add_ge0_pinctrl_settings_for_gmii.patch
@@ -0,0 +1,31 @@
+From 7254f6c52b5da38c0a79ab953d34e556fe16942f Mon Sep 17 00:00:00 2001
+From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Date: Fri, 19 Sep 2014 21:27:55 +0200
+Subject: ARM: mvebu: armada-xp: Add GE0 pinctrl settings for GMII
+
+There is a GMII setting for GE0, add it to the common pinctrl node.
+
+Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Tested-By: Benoit Masson <yahoo@perenite.com>
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -75,6 +75,17 @@
+ 			pinctrl: pin-ctrl@18000 {
+ 				reg = <0x18000 0x38>;
+ 
++				pmx_ge0_gmii: pmx-ge0-gmii {
++					marvell,pins =
++					     "mpp0",  "mpp1",  "mpp2",  "mpp3",
++					     "mpp4",  "mpp5",  "mpp6",  "mpp7",
++					     "mpp8",  "mpp9",  "mpp10", "mpp11",
++					     "mpp12", "mpp13", "mpp14", "mpp15",
++					     "mpp16", "mpp17", "mpp18", "mpp19",
++					     "mpp20", "mpp21", "mpp22", "mpp23";
++					marvell,function = "ge0";
++				};
++
+ 				pmx_ge0_rgmii: pmx-ge0-rgmii {
+ 					marvell,pins =
+ 					     "mpp0", "mpp1", "mpp2", "mpp3",
diff --git a/target/linux/mvebu/patches-3.18/014-add_uartx_labels.patch b/target/linux/mvebu/patches-3.18/014-add_uartx_labels.patch
new file mode 100644
index 0000000..acd6ecc
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/014-add_uartx_labels.patch
@@ -0,0 +1,58 @@
+From 181d9b28cbc9ae10e1467e2d013033b672d91d4b Mon Sep 17 00:00:00 2001
+From: Arnaud Ebalard <arno@natisbad.org>
+Date: Sat, 22 Nov 2014 00:45:35 +0100
+Subject: arm: mvebu: add uartX labels for Armada SoC serial nodes
+
+This patch adds uartX labels for Armada SoC serial nodes. This is
+a preliminary work to be able to easily reference the serial lines
+in Device Tree files. One expected use is when providing stdout-path
+property for barebox.
+
+Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Acked-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
+Link: https://lkml.kernel.org/r/0683d1a823fe9b75849f3dafcf1cf6ee291cdca6.1416613429.git.arno@natisbad.org
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-370-xp.dtsi
++++ b/arch/arm/boot/dts/armada-370-xp.dtsi
+@@ -151,7 +151,7 @@
+ 				status = "disabled";
+ 			};
+ 
+-			serial@12000 {
++			uart0: serial@12000 {
+ 				compatible = "snps,dw-apb-uart";
+ 				reg = <0x12000 0x100>;
+ 				reg-shift = <2>;
+@@ -160,7 +160,8 @@
+ 				clocks = <&coreclk 0>;
+ 				status = "disabled";
+ 			};
+-			serial@12100 {
++
++			uart1: serial@12100 {
+ 				compatible = "snps,dw-apb-uart";
+ 				reg = <0x12100 0x100>;
+ 				reg-shift = <2>;
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -53,7 +53,7 @@
+ 				reg = <0x11100 0x100>;
+ 			};
+ 
+-			serial@12200 {
++			uart2: serial@12200 {
+ 				compatible = "snps,dw-apb-uart";
+ 				reg = <0x12200 0x100>;
+ 				reg-shift = <2>;
+@@ -62,7 +62,8 @@
+ 				clocks = <&coreclk 0>;
+ 				status = "disabled";
+ 			};
+-			serial@12300 {
++
++			uart3: serial@12300 {
+ 				compatible = "snps,dw-apb-uart";
+ 				reg = <0x12300 0x100>;
+ 				reg-shift = <2>;
diff --git a/target/linux/mvebu/patches-3.18/015-move_armada_370_xp_pinctrl_node_definition.patch b/target/linux/mvebu/patches-3.18/015-move_armada_370_xp_pinctrl_node_definition.patch
new file mode 100644
index 0000000..5259e05
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/015-move_armada_370_xp_pinctrl_node_definition.patch
@@ -0,0 +1,538 @@
+From 4904a82a9399d037588162e6fb4b293fa6a37f7c Mon Sep 17 00:00:00 2001
+From: Arnaud Ebalard <arno@natisbad.org>
+Date: Sat, 22 Nov 2014 00:45:56 +0100
+Subject: arm: mvebu: move Armada 370/XP pinctrl node definition
+ armada-370-xp.dtsi
+
+What was done by Sebastian in 264a05e19bf5 ("ARM: mvebu: armada-xp:
+Add node alias to pinctrl and add base address") and 01c434225ee6
+("ARM: mvebu: armada-xp: Use pinctrl node alias") can also be done for
+Armada 370, i.e.
+
+ - Rename Armada 370 pinctrl node to pin-ctrl with its address encoded
+ - Add a node alias to access the pinctrl node easily.
+ - use the newly available alias in existing Armada 370 .dts files
+
+We can even go a bit further by putting the pinctrl node definition in
+armada-370-xp.dtsi, with only its reg property defined. This allows us
+to then also use the newly defined node alias in armada-xp.dtsi,
+armada-370.dtsi.
+
+Suggested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+Suggested-by: Andrew Lunn <andrew@lunn.ch>
+Acked-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
+Link: https://lkml.kernel.org/r/b54eb45e5242728aace3ce8aef2eae4251f8dea3.1416613429.git.arno@natisbad.org
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-370-db.dts
++++ b/arch/arm/boot/dts/armada-370-db.dts
+@@ -157,3 +157,27 @@
+ 	      compatible = "linux,spdif-dir";
+ 	};
+ };
++
++&pinctrl {
++	/*
++	 * These pins might be muxed as I2S by
++	 * the bootloader, but it conflicts
++	 * with the real I2S pins that are
++	 * muxed using i2s_pins. We must mux
++	 * those pins to a function other than
++	 * I2S.
++	 */
++	pinctrl-0 = <&hog_pins1 &hog_pins2>;
++	pinctrl-names = "default";
++
++	hog_pins1: hog-pins1 {
++		marvell,pins = "mpp6",  "mpp8", "mpp10",
++			       "mpp12", "mpp13";
++		marvell,function = "gpio";
++	};
++
++	hog_pins2: hog-pins2 {
++		marvell,pins = "mpp5", "mpp7", "mpp9";
++		marvell,function = "gpo";
++	};
++};
+--- a/arch/arm/boot/dts/armada-370-mirabox.dts
++++ b/arch/arm/boot/dts/armada-370-mirabox.dts
+@@ -54,18 +54,6 @@
+ 				status = "okay";
+ 			};
+ 
+-			pinctrl {
+-				pwr_led_pin: pwr-led-pin {
+-					marvell,pins = "mpp63";
+-					marvell,function = "gpo";
+-				};
+-
+-				stat_led_pins: stat-led-pins {
+-					marvell,pins = "mpp64", "mpp65";
+-					marvell,function = "gpio";
+-				};
+-			};
+-
+ 			gpio_leds {
+ 				compatible = "gpio-leds";
+ 				pinctrl-names = "default";
+@@ -169,3 +157,16 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	pwr_led_pin: pwr-led-pin {
++		marvell,pins = "mpp63";
++		marvell,function = "gpo";
++	};
++
++	stat_led_pins: stat-led-pins {
++		marvell,pins = "mpp64", "mpp65";
++		marvell,function = "gpio";
++	};
++};
++
+--- a/arch/arm/boot/dts/armada-370-netgear-rn102.dts
++++ b/arch/arm/boot/dts/armada-370-netgear-rn102.dts
+@@ -58,48 +58,6 @@
+ 				status = "okay";
+ 			};
+ 
+-			pinctrl {
+-				power_led_pin: power-led-pin {
+-					marvell,pins = "mpp57";
+-					marvell,function = "gpio";
+-				};
+-
+-				sata1_led_pin: sata1-led-pin {
+-					marvell,pins = "mpp15";
+-					marvell,function = "gpio";
+-				};
+-
+-				sata2_led_pin: sata2-led-pin {
+-					marvell,pins = "mpp14";
+-					marvell,function = "gpio";
+-				};
+-
+-				backup_led_pin: backup-led-pin {
+-					marvell,pins = "mpp56";
+-					marvell,function = "gpio";
+-				};
+-
+-				backup_button_pin: backup-button-pin {
+-					marvell,pins = "mpp58";
+-					marvell,function = "gpio";
+-				};
+-
+-				power_button_pin: power-button-pin {
+-					marvell,pins = "mpp62";
+-					marvell,function = "gpio";
+-				};
+-
+-				reset_button_pin: reset-button-pin {
+-					marvell,pins = "mpp6";
+-					marvell,function = "gpio";
+-				};
+-
+-				poweroff: poweroff {
+-					marvell,pins = "mpp8";
+-					marvell,function = "gpio";
+-				};
+-			};
+-
+ 			mdio {
+ 				pinctrl-0 = <&mdio_pins>;
+ 				pinctrl-names = "default";
+@@ -256,3 +214,45 @@
+ 		gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+ 	};
+ };
++
++&pinctrl {
++	power_led_pin: power-led-pin {
++		marvell,pins = "mpp57";
++		marvell,function = "gpio";
++	};
++
++	sata1_led_pin: sata1-led-pin {
++		marvell,pins = "mpp15";
++		marvell,function = "gpio";
++	};
++
++	sata2_led_pin: sata2-led-pin {
++		marvell,pins = "mpp14";
++		marvell,function = "gpio";
++	};
++
++	backup_led_pin: backup-led-pin {
++		marvell,pins = "mpp56";
++		marvell,function = "gpio";
++	};
++
++	backup_button_pin: backup-button-pin {
++		marvell,pins = "mpp58";
++		marvell,function = "gpio";
++	};
++
++	power_button_pin: power-button-pin {
++		marvell,pins = "mpp62";
++		marvell,function = "gpio";
++	};
++
++	reset_button_pin: reset-button-pin {
++		marvell,pins = "mpp6";
++		marvell,function = "gpio";
++	};
++
++	poweroff: poweroff {
++		marvell,pins = "mpp8";
++		marvell,function = "gpio";
++	};
++};
+--- a/arch/arm/boot/dts/armada-370-netgear-rn104.dts
++++ b/arch/arm/boot/dts/armada-370-netgear-rn104.dts
+@@ -53,38 +53,6 @@
+ 				status = "okay";
+ 			};
+ 
+-			pinctrl {
+-				poweroff: poweroff {
+-					marvell,pins = "mpp60";
+-					marvell,function = "gpio";
+-				};
+-
+-				backup_button_pin: backup-button-pin {
+-					marvell,pins = "mpp52";
+-					marvell,function = "gpio";
+-				};
+-
+-				power_button_pin: power-button-pin {
+-					marvell,pins = "mpp62";
+-					marvell,function = "gpio";
+-				};
+-
+-				backup_led_pin: backup-led-pin {
+-					marvell,pins = "mpp63";
+-					marvell,function = "gpo";
+-				};
+-
+-				power_led_pin: power-led-pin {
+-					marvell,pins = "mpp64";
+-					marvell,function = "gpio";
+-				};
+-
+-				reset_button_pin: reset-button-pin {
+-					marvell,pins = "mpp65";
+-					marvell,function = "gpio";
+-				};
+-			};
+-
+ 			mdio {
+ 				pinctrl-0 = <&mdio_pins>;
+ 				pinctrl-names = "default";
+@@ -269,3 +237,35 @@
+ 		gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
+ 	};
+ };
++
++&pinctrl {
++	poweroff: poweroff {
++		marvell,pins = "mpp60";
++		marvell,function = "gpio";
++	};
++
++	backup_button_pin: backup-button-pin {
++		marvell,pins = "mpp52";
++		marvell,function = "gpio";
++	};
++
++	power_button_pin: power-button-pin {
++		marvell,pins = "mpp62";
++		marvell,function = "gpio";
++	};
++
++	backup_led_pin: backup-led-pin {
++		marvell,pins = "mpp63";
++		marvell,function = "gpo";
++	};
++
++	power_led_pin: power-led-pin {
++		marvell,pins = "mpp64";
++		marvell,function = "gpio";
++	};
++
++	reset_button_pin: reset-button-pin {
++		marvell,pins = "mpp65";
++		marvell,function = "gpio";
++	};
++};
+--- a/arch/arm/boot/dts/armada-370-rd.dts
++++ b/arch/arm/boot/dts/armada-370-rd.dts
+@@ -59,18 +59,6 @@
+ 		};
+ 
+ 		internal-regs {
+-			pinctrl {
+-				fan_pins: fan-pins {
+-					marvell,pins = "mpp8";
+-					marvell,function = "gpio";
+-				};
+-
+-				led_pins: led-pins {
+-					marvell,pins = "mpp32";
+-					marvell,function = "gpio";
+-				};
+-			};
+-
+ 			serial@12000 {
+ 				status = "okay";
+ 			};
+@@ -174,3 +162,15 @@
+ 		};
+ 	};
+  };
++
++&pinctrl {
++	fan_pins: fan-pins {
++		marvell,pins = "mpp8";
++		marvell,function = "gpio";
++	};
++
++	led_pins: led-pins {
++		marvell,pins = "mpp32";
++		marvell,function = "gpio";
++	};
++};
+--- a/arch/arm/boot/dts/armada-370-xp.dtsi
++++ b/arch/arm/boot/dts/armada-370-xp.dtsi
+@@ -171,6 +171,10 @@
+ 				status = "disabled";
+ 			};
+ 
++			pinctrl: pin-ctrl@18000 {
++				reg = <0x18000 0x38>;
++			};
++
+ 			coredivclk: corediv-clock@18740 {
+ 				compatible = "marvell,armada-370-corediv-clock";
+ 				reg = <0x18740 0xc>;
+--- a/arch/arm/boot/dts/armada-370.dtsi
++++ b/arch/arm/boot/dts/armada-370.dtsi
+@@ -107,67 +107,6 @@
+ 				reg = <0x11100 0x20>;
+ 			};
+ 
+-			pinctrl {
+-				compatible = "marvell,mv88f6710-pinctrl";
+-				reg = <0x18000 0x38>;
+-
+-				sdio_pins1: sdio-pins1 {
+-					marvell,pins = "mpp9",  "mpp11", "mpp12",
+-							"mpp13", "mpp14", "mpp15";
+-					marvell,function = "sd0";
+-				};
+-
+-				sdio_pins2: sdio-pins2 {
+-					marvell,pins = "mpp47", "mpp48", "mpp49",
+-							"mpp50", "mpp51", "mpp52";
+-					marvell,function = "sd0";
+-				};
+-
+-				sdio_pins3: sdio-pins3 {
+-					marvell,pins = "mpp48", "mpp49", "mpp50",
+-							"mpp51", "mpp52", "mpp53";
+-					marvell,function = "sd0";
+-				};
+-
+-				i2c0_pins: i2c0-pins {
+-					marvell,pins = "mpp2", "mpp3";
+-					marvell,function = "i2c0";
+-				};
+-
+-				i2s_pins1: i2s-pins1 {
+-					marvell,pins = "mpp5", "mpp6", "mpp7",
+-						       "mpp8", "mpp9", "mpp10",
+-						       "mpp12", "mpp13";
+-					marvell,function = "audio";
+-				};
+-
+-				i2s_pins2: i2s-pins2 {
+-					marvell,pins = "mpp49", "mpp47", "mpp50",
+-						       "mpp59", "mpp57", "mpp61",
+-						       "mpp62", "mpp60", "mpp58";
+-					marvell,function = "audio";
+-				};
+-
+-				mdio_pins: mdio-pins {
+-					marvell,pins = "mpp17", "mpp18";
+-					marvell,function = "ge";
+-				};
+-
+-				ge0_rgmii_pins: ge0-rgmii-pins {
+-					marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8",
+-						       "mpp9", "mpp10", "mpp11", "mpp12",
+-						       "mpp13", "mpp14", "mpp15", "mpp16";
+-					marvell,function = "ge0";
+-				};
+-
+-				ge1_rgmii_pins: ge1-rgmii-pins {
+-					marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22",
+-						       "mpp23", "mpp24", "mpp25", "mpp26",
+-						       "mpp27", "mpp28", "mpp29", "mpp30";
+-					marvell,function = "ge1";
+-				};
+-			};
+-
+ 			gpio0: gpio@18100 {
+ 				compatible = "marvell,orion-gpio";
+ 				reg = <0x18100 0x40>;
+@@ -306,3 +245,63 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	compatible = "marvell,mv88f6710-pinctrl";
++
++	sdio_pins1: sdio-pins1 {
++		marvell,pins = "mpp9",  "mpp11", "mpp12",
++				"mpp13", "mpp14", "mpp15";
++		marvell,function = "sd0";
++	};
++
++	sdio_pins2: sdio-pins2 {
++		marvell,pins = "mpp47", "mpp48", "mpp49",
++				"mpp50", "mpp51", "mpp52";
++		marvell,function = "sd0";
++	};
++
++	sdio_pins3: sdio-pins3 {
++		marvell,pins = "mpp48", "mpp49", "mpp50",
++				"mpp51", "mpp52", "mpp53";
++		marvell,function = "sd0";
++	};
++
++	i2c0_pins: i2c0-pins {
++		marvell,pins = "mpp2", "mpp3";
++		marvell,function = "i2c0";
++	};
++
++	i2s_pins1: i2s-pins1 {
++		marvell,pins = "mpp5", "mpp6", "mpp7",
++			       "mpp8", "mpp9", "mpp10",
++			       "mpp12", "mpp13";
++		marvell,function = "audio";
++	};
++
++	i2s_pins2: i2s-pins2 {
++		marvell,pins = "mpp49", "mpp47", "mpp50",
++			       "mpp59", "mpp57", "mpp61",
++			       "mpp62", "mpp60", "mpp58";
++		marvell,function = "audio";
++	};
++
++	mdio_pins: mdio-pins {
++		marvell,pins = "mpp17", "mpp18";
++		marvell,function = "ge";
++	};
++
++	ge0_rgmii_pins: ge0-rgmii-pins {
++		marvell,pins = "mpp5", "mpp6", "mpp7", "mpp8",
++			       "mpp9", "mpp10", "mpp11", "mpp12",
++			       "mpp13", "mpp14", "mpp15", "mpp16";
++		marvell,function = "ge0";
++	};
++
++	ge1_rgmii_pins: ge1-rgmii-pins {
++		marvell,pins = "mpp19", "mpp20", "mpp21", "mpp22",
++			       "mpp23", "mpp24", "mpp25", "mpp26",
++			       "mpp27", "mpp28", "mpp29", "mpp30";
++		marvell,function = "ge1";
++	};
++};
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -73,43 +73,6 @@
+ 				status = "disabled";
+ 			};
+ 
+-			pinctrl: pin-ctrl@18000 {
+-				reg = <0x18000 0x38>;
+-
+-				pmx_ge0_gmii: pmx-ge0-gmii {
+-					marvell,pins =
+-					     "mpp0",  "mpp1",  "mpp2",  "mpp3",
+-					     "mpp4",  "mpp5",  "mpp6",  "mpp7",
+-					     "mpp8",  "mpp9",  "mpp10", "mpp11",
+-					     "mpp12", "mpp13", "mpp14", "mpp15",
+-					     "mpp16", "mpp17", "mpp18", "mpp19",
+-					     "mpp20", "mpp21", "mpp22", "mpp23";
+-					marvell,function = "ge0";
+-				};
+-
+-				pmx_ge0_rgmii: pmx-ge0-rgmii {
+-					marvell,pins =
+-					     "mpp0", "mpp1", "mpp2", "mpp3",
+-					     "mpp4", "mpp5", "mpp6", "mpp7",
+-					     "mpp8", "mpp9", "mpp10", "mpp11";
+-					marvell,function = "ge0";
+-				};
+-
+-				pmx_ge1_rgmii: pmx-ge1-rgmii {
+-					marvell,pins =
+-					     "mpp12", "mpp13", "mpp14", "mpp15",
+-					     "mpp16", "mpp17", "mpp18", "mpp19",
+-					     "mpp20", "mpp21", "mpp22", "mpp23";
+-					marvell,function = "ge1";
+-				};
+-
+-				sdio_pins: sdio-pins {
+-					marvell,pins = "mpp30", "mpp31", "mpp32",
+-						       "mpp33", "mpp34", "mpp35";
+-					marvell,function = "sd0";
+-				};
+-			};
+-
+ 			system-controller@18200 {
+ 				compatible = "marvell,armada-370-xp-system-controller";
+ 				reg = <0x18200 0x500>;
+@@ -238,3 +201,38 @@
+ 		};
+ 	};
+ };
++
++&pinctrl {
++	pmx_ge0_gmii: pmx-ge0-gmii {
++		marvell,pins =
++		     "mpp0",  "mpp1",  "mpp2",  "mpp3",
++		     "mpp4",  "mpp5",  "mpp6",  "mpp7",
++		     "mpp8",  "mpp9",  "mpp10", "mpp11",
++		     "mpp12", "mpp13", "mpp14", "mpp15",
++		     "mpp16", "mpp17", "mpp18", "mpp19",
++		     "mpp20", "mpp21", "mpp22", "mpp23";
++		marvell,function = "ge0";
++	};
++
++	pmx_ge0_rgmii: pmx-ge0-rgmii {
++		marvell,pins =
++		     "mpp0", "mpp1", "mpp2", "mpp3",
++		     "mpp4", "mpp5", "mpp6", "mpp7",
++		     "mpp8", "mpp9", "mpp10", "mpp11";
++		marvell,function = "ge0";
++	};
++
++	pmx_ge1_rgmii: pmx-ge1-rgmii {
++		marvell,pins =
++		     "mpp12", "mpp13", "mpp14", "mpp15",
++		     "mpp16", "mpp17", "mpp18", "mpp19",
++		     "mpp20", "mpp21", "mpp22", "mpp23";
++		marvell,function = "ge1";
++	};
++
++	sdio_pins: sdio-pins {
++		marvell,pins = "mpp30", "mpp31", "mpp32",
++			       "mpp33", "mpp34", "mpp35";
++		marvell,function = "sd0";
++	};
++};
diff --git a/target/linux/mvebu/patches-3.18/016-common_armada_xp_uart2_3_pinctrl.patch b/target/linux/mvebu/patches-3.18/016-common_armada_xp_uart2_3_pinctrl.patch
new file mode 100644
index 0000000..2d28970
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/016-common_armada_xp_uart2_3_pinctrl.patch
@@ -0,0 +1,52 @@
+From d352f41e87e7226692d1346bb97c603615eeb817 Mon Sep 17 00:00:00 2001
+From: Arnaud Ebalard <arno@natisbad.org>
+Date: Sat, 22 Nov 2014 00:46:28 +0100
+Subject: arm: mvebu: define and use common Armada XP UART2/3 pinctrl settings
+
+This patch defines common Armada XP pinctrl settings for uart2 and
+uart3 interfaces (uart0 and uart1 rx/tx do not rely on MPP):
+
+ uart2: MPP42-43 as default
+ uart3: MPP44-45 as default
+
+Suggested-by: Andrew Lunn <andrew@lunn.ch>
+Acked-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
+Link: https://lkml.kernel.org/r/fd51c080c7139a67ec01df8d797f1e88ce557796.1416613429.git.arno@natisbad.org
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -55,6 +55,8 @@
+ 
+ 			uart2: serial@12200 {
+ 				compatible = "snps,dw-apb-uart";
++				pinctrl-0 = <&uart2_pins>;
++				pinctrl-names = "default";
+ 				reg = <0x12200 0x100>;
+ 				reg-shift = <2>;
+ 				interrupts = <43>;
+@@ -65,6 +67,8 @@
+ 
+ 			uart3: serial@12300 {
+ 				compatible = "snps,dw-apb-uart";
++				pinctrl-0 = <&uart3_pins>;
++				pinctrl-names = "default";
+ 				reg = <0x12300 0x100>;
+ 				reg-shift = <2>;
+ 				interrupts = <44>;
+@@ -235,4 +239,14 @@
+ 			       "mpp33", "mpp34", "mpp35";
+ 		marvell,function = "sd0";
+ 	};
++
++	uart2_pins: uart2-pins {
++		marvell,pins = "mpp42", "mpp43";
++		marvell,function = "uart2";
++	};
++
++	uart3_pins: uart3-pins {
++		marvell,pins = "mpp44", "mpp45";
++		marvell,function = "uart3";
++	};
+ };
diff --git a/target/linux/mvebu/patches-3.18/017-define_and_use_common_armada_xp_spi_pinctrl_setting.patch b/target/linux/mvebu/patches-3.18/017-define_and_use_common_armada_xp_spi_pinctrl_setting.patch
new file mode 100644
index 0000000..668d55d
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/017-define_and_use_common_armada_xp_spi_pinctrl_setting.patch
@@ -0,0 +1,69 @@
+From 547c653b64022618250ca9c7c30151927509ae98 Mon Sep 17 00:00:00 2001
+From: Arnaud Ebalard <arno@natisbad.org>
+Date: Sat, 22 Nov 2014 00:46:39 +0100
+Subject: arm: mvebu: define and use common Armada XP SPI pinctrl setting
+
+This patch defines common Armada XP pinctrl settings in armada-xp.dtsi
+for the supported SPI interface (MPP36-39) and use it as default
+for Armada XP spi interface. That being done, it removes the now
+redundant definitions in armada-xp-axpwifiap.dts.
+
+Note: this patch has the potential to break out-of-tree users w/o
+specific pinctrl settings for their spi interfaces if the default
+above does not match their config (i.e. if they do not use CS0).
+
+Acked-by: Andrew Lunn <andrew@lunn.ch>
+Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
+Link: https://lkml.kernel.org/r/d404b7abd80ee5a0fd8e8d3586d33cd37740d589.1416613429.git.arno@natisbad.org
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
++++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+@@ -100,8 +100,6 @@
+ 
+ 			spi0: spi@10600 {
+ 				status = "okay";
+-				pinctrl-0 = <&pmx_spi>;
+-				pinctrl-names = "default";
+ 
+ 				spi-flash@0 {
+ 					#address-cells = <1>;
+@@ -138,11 +136,6 @@
+ 		marvell,function = "gpio";
+ 	};
+ 
+-	pmx_spi: pmx-spi {
+-		marvell,pins = "mpp36", "mpp37", "mpp38", "mpp39";
+-		marvell,function = "spi";
+-	};
+-
+ 	pmx_phy_int: pmx-phy-int {
+ 		marvell,pins = "mpp32";
+ 		marvell,function = "gpio";
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -43,6 +43,11 @@
+ 				wt-override;
+ 			};
+ 
++			spi0: spi@10600 {
++				pinctrl-0 = <&spi0_pins>;
++				pinctrl-names = "default";
++			};
++
+ 			i2c0: i2c@11000 {
+ 				compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
+ 				reg = <0x11000 0x100>;
+@@ -240,6 +245,12 @@
+ 		marvell,function = "sd0";
+ 	};
+ 
++	spi0_pins: spi0-pins {
++		marvell,pins = "mpp36", "mpp37",
++			       "mpp38", "mpp39";
++		marvell,function = "spi";
++	};
++
+ 	uart2_pins: uart2-pins {
+ 		marvell,pins = "mpp42", "mpp43";
+ 		marvell,function = "uart2";
diff --git a/target/linux/mvebu/patches-3.18/018-normalize_pinctrl_entries_for_armada_socs.patch b/target/linux/mvebu/patches-3.18/018-normalize_pinctrl_entries_for_armada_socs.patch
new file mode 100644
index 0000000..e8f9d30
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/018-normalize_pinctrl_entries_for_armada_socs.patch
@@ -0,0 +1,98 @@
+From 70ee4e9d9f054e258480fd51c90cfc2b72be8b78 Mon Sep 17 00:00:00 2001
+From: Arnaud Ebalard <arno@natisbad.org>
+Date: Sat, 22 Nov 2014 17:23:30 +0100
+Subject: arm: mvebu: normalize pinctrl entries for Armada SoCs
+
+There are currently 2 differents naming conventions used between the
+existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s)
+and pmx_*: pmx-*) with a vast majority of files using the former:
+
+$ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l
+155
+$ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l
+13
+
+In fact, only some Armada XP files are using the second variant.
+This patch normalizes those files (mainly ge0/1 entries) to use
+the first variant.
+
+Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
+Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org
+Signed-off-by: Jason Cooper <jason@lakedaemon.net>
+
+--- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
++++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
+@@ -84,14 +84,14 @@
+ 			};
+ 
+ 			ethernet@70000 {
+-				pinctrl-0 = <&pmx_ge0_rgmii>;
++				pinctrl-0 = <&ge0_rgmii_pins>;
+ 				pinctrl-names = "default";
+ 				status = "okay";
+ 				phy = <&phy0>;
+ 				phy-mode = "rgmii-id";
+ 			};
+ 			ethernet@74000 {
+-				pinctrl-0 = <&pmx_ge1_rgmii>;
++				pinctrl-0 = <&ge1_rgmii_pins>;
+ 				pinctrl-names = "default";
+ 				status = "okay";
+ 				phy = <&phy1>;
+@@ -116,7 +116,7 @@
+ 		compatible = "gpio-keys";
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+-		pinctrl-0 = <&pmx_keys>;
++		pinctrl-0 = <&keys_pin>;
+ 		pinctrl-names = "default";
+ 
+ 		button@1 {
+@@ -128,15 +128,15 @@
+ };
+ 
+ &pinctrl {
+-	pinctrl-0 = <&pmx_phy_int>;
++	pinctrl-0 = <&phy_int_pin>;
+ 	pinctrl-names = "default";
+ 
+-	pmx_keys: pmx-keys {
++	keys_pin: keys-pin {
+ 		marvell,pins = "mpp33";
+ 		marvell,function = "gpio";
+ 	};
+ 
+-	pmx_phy_int: pmx-phy-int {
++	phy_int_pin: phy-int-pin {
+ 		marvell,pins = "mpp32";
+ 		marvell,function = "gpio";
+ 	};
+--- a/arch/arm/boot/dts/armada-xp.dtsi
++++ b/arch/arm/boot/dts/armada-xp.dtsi
+@@ -212,7 +212,7 @@
+ };
+ 
+ &pinctrl {
+-	pmx_ge0_gmii: pmx-ge0-gmii {
++	ge0_gmii_pins: ge0-gmii-pins {
+ 		marvell,pins =
+ 		     "mpp0",  "mpp1",  "mpp2",  "mpp3",
+ 		     "mpp4",  "mpp5",  "mpp6",  "mpp7",
+@@ -223,7 +223,7 @@
+ 		marvell,function = "ge0";
+ 	};
+ 
+-	pmx_ge0_rgmii: pmx-ge0-rgmii {
++	ge0_rgmii_pins: ge0-rgmii-pins {
+ 		marvell,pins =
+ 		     "mpp0", "mpp1", "mpp2", "mpp3",
+ 		     "mpp4", "mpp5", "mpp6", "mpp7",
+@@ -231,7 +231,7 @@
+ 		marvell,function = "ge0";
+ 	};
+ 
+-	pmx_ge1_rgmii: pmx-ge1-rgmii {
++	ge1_rgmii_pins: ge1-rgmii-pins {
+ 		marvell,pins =
+ 		     "mpp12", "mpp13", "mpp14", "mpp15",
+ 		     "mpp16", "mpp17", "mpp18", "mpp19",
diff --git a/target/linux/mvebu/patches-3.18/002-revert_i2c_delay.patch b/target/linux/mvebu/patches-3.18/102-revert_i2c_delay.patch
index 77dc1a6..9089534 100644
--- a/target/linux/mvebu/patches-3.18/002-revert_i2c_delay.patch
+++ b/target/linux/mvebu/patches-3.18/102-revert_i2c_delay.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm/boot/dts/armada-xp.dtsi
 +++ b/arch/arm/boot/dts/armada-xp.dtsi
-@@ -43,12 +43,10 @@
+@@ -49,12 +49,10 @@
  			};
  
  			i2c0: i2c@11000 {
diff --git a/target/linux/mvebu/patches-3.18/140-alias_mdio_node.patch b/target/linux/mvebu/patches-3.18/140-alias_mdio_node.patch
index 4d3c498..baca023 100644
--- a/target/linux/mvebu/patches-3.18/140-alias_mdio_node.patch
+++ b/target/linux/mvebu/patches-3.18/140-alias_mdio_node.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm/boot/dts/armada-370-xp.dtsi
 +++ b/arch/arm/boot/dts/armada-370-xp.dtsi
-@@ -232,7 +232,7 @@
+@@ -237,7 +237,7 @@
  				status = "disabled";
  			};
  
diff --git a/target/linux/mvebu/patches-3.18/198-gpio_mvebu_suspend.patch b/target/linux/mvebu/patches-3.18/198-gpio_mvebu_suspend.patch
new file mode 100644
index 0000000..7a5c0b6
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/198-gpio_mvebu_suspend.patch
@@ -0,0 +1,137 @@
+This commit adds the implementation of ->suspend() and ->resume()
+platform_driver hooks in order to save and restore the state of the
+GPIO configuration. In order to achieve that, additional fields are
+added to the mvebu_gpio_chip structure.
+
+Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+Acked-by: Alexandre Courbot <acourbot@nvidia.com>
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+
+--- a/drivers/gpio/gpio-mvebu.c
++++ b/drivers/gpio/gpio-mvebu.c
+@@ -83,6 +83,14 @@ struct mvebu_gpio_chip {
+ 	int		   irqbase;
+ 	struct irq_domain *domain;
+ 	int                soc_variant;
++
++	/* Used to preserve GPIO registers accross suspend/resume */
++	u32                out_reg;
++	u32                io_conf_reg;
++	u32                blink_en_reg;
++	u32                in_pol_reg;
++	u32                edge_mask_regs[4];
++	u32                level_mask_regs[4];
+ };
+ 
+ /*
+@@ -554,6 +562,93 @@ static const struct of_device_id mvebu_g
+ };
+ MODULE_DEVICE_TABLE(of, mvebu_gpio_of_match);
+ 
++static int mvebu_gpio_suspend(struct platform_device *pdev, pm_message_t state)
++{
++	struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev);
++	int i;
++
++	mvchip->out_reg = readl(mvebu_gpioreg_out(mvchip));
++	mvchip->io_conf_reg = readl(mvebu_gpioreg_io_conf(mvchip));
++	mvchip->blink_en_reg = readl(mvebu_gpioreg_blink(mvchip));
++	mvchip->in_pol_reg = readl(mvebu_gpioreg_in_pol(mvchip));
++
++	switch (mvchip->soc_variant) {
++	case MVEBU_GPIO_SOC_VARIANT_ORION:
++		mvchip->edge_mask_regs[0] =
++			readl(mvchip->membase + GPIO_EDGE_MASK_OFF);
++		mvchip->level_mask_regs[0] =
++			readl(mvchip->membase + GPIO_LEVEL_MASK_OFF);
++		break;
++	case MVEBU_GPIO_SOC_VARIANT_MV78200:
++		for (i = 0; i < 2; i++) {
++			mvchip->edge_mask_regs[i] =
++				readl(mvchip->membase +
++				      GPIO_EDGE_MASK_MV78200_OFF(i));
++			mvchip->level_mask_regs[i] =
++				readl(mvchip->membase +
++				      GPIO_LEVEL_MASK_MV78200_OFF(i));
++		}
++		break;
++	case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
++		for (i = 0; i < 4; i++) {
++			mvchip->edge_mask_regs[i] =
++				readl(mvchip->membase +
++				      GPIO_EDGE_MASK_ARMADAXP_OFF(i));
++			mvchip->level_mask_regs[i] =
++				readl(mvchip->membase +
++				      GPIO_LEVEL_MASK_ARMADAXP_OFF(i));
++		}
++		break;
++	default:
++		BUG();
++	}
++
++	return 0;
++}
++
++static int mvebu_gpio_resume(struct platform_device *pdev)
++{
++	struct mvebu_gpio_chip *mvchip = platform_get_drvdata(pdev);
++	int i;
++
++	writel(mvchip->out_reg, mvebu_gpioreg_out(mvchip));
++	writel(mvchip->io_conf_reg, mvebu_gpioreg_io_conf(mvchip));
++	writel(mvchip->blink_en_reg, mvebu_gpioreg_blink(mvchip));
++	writel(mvchip->in_pol_reg, mvebu_gpioreg_in_pol(mvchip));
++
++	switch (mvchip->soc_variant) {
++	case MVEBU_GPIO_SOC_VARIANT_ORION:
++		writel(mvchip->edge_mask_regs[0],
++		       mvchip->membase + GPIO_EDGE_MASK_OFF);
++		writel(mvchip->level_mask_regs[0],
++		       mvchip->membase + GPIO_LEVEL_MASK_OFF);
++		break;
++	case MVEBU_GPIO_SOC_VARIANT_MV78200:
++		for (i = 0; i < 2; i++) {
++			writel(mvchip->edge_mask_regs[i],
++			       mvchip->membase + GPIO_EDGE_MASK_MV78200_OFF(i));
++			writel(mvchip->level_mask_regs[i],
++			       mvchip->membase +
++			       GPIO_LEVEL_MASK_MV78200_OFF(i));
++		}
++		break;
++	case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
++		for (i = 0; i < 4; i++) {
++			writel(mvchip->edge_mask_regs[i],
++			       mvchip->membase +
++			       GPIO_EDGE_MASK_ARMADAXP_OFF(i));
++			writel(mvchip->level_mask_regs[i],
++			       mvchip->membase +
++			       GPIO_LEVEL_MASK_ARMADAXP_OFF(i));
++		}
++		break;
++	default:
++		BUG();
++	}
++
++	return 0;
++}
++
+ static int mvebu_gpio_probe(struct platform_device *pdev)
+ {
+ 	struct mvebu_gpio_chip *mvchip;
+@@ -577,6 +672,8 @@ static int mvebu_gpio_probe(struct platf
+ 	if (!mvchip)
+ 		return -ENOMEM;
+ 
++	platform_set_drvdata(pdev, mvchip);
++
+ 	if (of_property_read_u32(pdev->dev.of_node, "ngpios", &ngpios)) {
+ 		dev_err(&pdev->dev, "Missing ngpios OF property\n");
+ 		return -ENODEV;
+@@ -735,5 +832,7 @@ static struct platform_driver mvebu_gpio
+ 		.of_match_table = mvebu_gpio_of_match,
+ 	},
+ 	.probe		= mvebu_gpio_probe,
++	.suspend        = mvebu_gpio_suspend,
++	.resume         = mvebu_gpio_resume,
+ };
+ module_platform_driver(mvebu_gpio_driver);
diff --git a/target/linux/mvebu/patches-3.18/199-gpio_mvebu_drop_owner.patch b/target/linux/mvebu/patches-3.18/199-gpio_mvebu_drop_owner.patch
new file mode 100644
index 0000000..c52e85e
--- /dev/null
+++ b/target/linux/mvebu/patches-3.18/199-gpio_mvebu_drop_owner.patch
@@ -0,0 +1,15 @@
+A platform_driver does not need to set an owner, it will be populated by the
+driver core.
+
+Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
+
+--- a/drivers/gpio/gpio-mvebu.c
++++ b/drivers/gpio/gpio-mvebu.c
+@@ -828,7 +828,6 @@ static int mvebu_gpio_probe(struct platf
+ static struct platform_driver mvebu_gpio_driver = {
+ 	.driver		= {
+ 		.name	        = "mvebu-gpio",
+-		.owner	        = THIS_MODULE,
+ 		.of_match_table = mvebu_gpio_of_match,
+ 	},
+ 	.probe		= mvebu_gpio_probe,