diff options
Diffstat (limited to 'package/kernel/mac80211/patches/340-brcmfmac-always-perform-cores-checks.patch')
| -rw-r--r-- | package/kernel/mac80211/patches/340-brcmfmac-always-perform-cores-checks.patch | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/package/kernel/mac80211/patches/340-brcmfmac-always-perform-cores-checks.patch b/package/kernel/mac80211/patches/340-brcmfmac-always-perform-cores-checks.patch new file mode 100644 index 0000000..e2a2074 --- /dev/null +++ b/package/kernel/mac80211/patches/340-brcmfmac-always-perform-cores-checks.patch @@ -0,0 +1,74 @@ +From: Arend van Spriel <arend@broadcom.com> +Date: Wed, 11 Mar 2015 16:11:28 +0100 +Subject: [PATCH] brcmfmac: always perform cores checks + +Instead of checking the cores in the chip only if CONFIG_BRCMDBG +is selected perform the check always and extend it with more sanity +checking. + +Reviewed-by: Hante Meuleman <meuleman@broadcom.com> +Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com> +Signed-off-by: Arend van Spriel <arend@broadcom.com> +Signed-off-by: Kalle Valo <kvalo@codeaurora.org> +--- + +--- a/drivers/net/wireless/brcm80211/brcmfmac/chip.c ++++ b/drivers/net/wireless/brcm80211/brcmfmac/chip.c +@@ -419,13 +419,13 @@ static struct brcmf_core *brcmf_chip_add + return &core->pub; + } + +-#ifdef DEBUG + /* safety check for chipinfo */ + static int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) + { + struct brcmf_core_priv *core; + bool need_socram = false; + bool has_socram = false; ++ bool cpu_found = false; + int idx = 1; + + list_for_each_entry(core, &ci->cores, list) { +@@ -435,12 +435,14 @@ static int brcmf_chip_cores_check(struct + + switch (core->pub.id) { + case BCMA_CORE_ARM_CM3: ++ cpu_found = true; + need_socram = true; + break; + case BCMA_CORE_INTERNAL_MEM: + has_socram = true; + break; + case BCMA_CORE_ARM_CR4: ++ cpu_found = true; + if (ci->pub.rambase == 0) { + brcmf_err("RAM base not provided with ARM CR4 core\n"); + return -ENOMEM; +@@ -451,19 +453,21 @@ static int brcmf_chip_cores_check(struct + } + } + ++ if (!cpu_found) { ++ brcmf_err("CPU core not detected\n"); ++ return -ENXIO; ++ } + /* check RAM core presence for ARM CM3 core */ + if (need_socram && !has_socram) { + brcmf_err("RAM core not provided with ARM CM3 core\n"); + return -ENODEV; + } ++ if (!ci->pub.ramsize) { ++ brcmf_err("RAM size is undetermined\n"); ++ return -ENOMEM; ++ } + return 0; + } +-#else /* DEBUG */ +-static inline int brcmf_chip_cores_check(struct brcmf_chip_priv *ci) +-{ +- return 0; +-} +-#endif + + static void brcmf_chip_get_raminfo(struct brcmf_chip_priv *ci) + { |