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-rw-r--r--target/linux/mvebu/patches-3.10/0064-ARM-kirkwood-Relocate-PCIe-device-tree-nodes.patch301
1 files changed, 301 insertions, 0 deletions
diff --git a/target/linux/mvebu/patches-3.10/0064-ARM-kirkwood-Relocate-PCIe-device-tree-nodes.patch b/target/linux/mvebu/patches-3.10/0064-ARM-kirkwood-Relocate-PCIe-device-tree-nodes.patch
new file mode 100644
index 0000000..be4d3ab
--- /dev/null
+++ b/target/linux/mvebu/patches-3.10/0064-ARM-kirkwood-Relocate-PCIe-device-tree-nodes.patch
@@ -0,0 +1,301 @@
+From ae23894bcb163d1f91483b9566dc077f1e863af6 Mon Sep 17 00:00:00 2001
+From: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
+Date: Tue, 23 Jul 2013 08:44:00 -0300
+Subject: [PATCH 064/203] ARM: kirkwood: Relocate PCIe device tree nodes
+
+Now that mbus has been added to the device tree, it's possible to
+move the PCIe nodes out of the ocp node, placing it directly
+below the mbus. This is a more accurate representation of the hardware.
+
+Moving the PCIe nodes, we now need to introduce an extra cell to
+encode the window target ID and attribute. Since this depends on
+the PCIe port, we split the ranges translation entries, to
+correspond to each MBus window.
+
+In addition, we encode the PCIe memory and I/O apertures in the MBus
+node, according to the MBus DT binding specification. The choice made
+is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for
+I/O space. These apertures can be changed in each per-board DT file.
+
+Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
+Tested-by: Andrew Lunn <andrew@lunn.ch>
+Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
+---
+ arch/arm/boot/dts/kirkwood-6281.dtsi | 35 ++++++++++++++
+ arch/arm/boot/dts/kirkwood-6282.dtsi | 55 ++++++++++++++++++++++
+ arch/arm/boot/dts/kirkwood-iconnect.dts | 11 +++++
+ arch/arm/boot/dts/kirkwood-mplcec4.dts | 11 +++++
+ .../boot/dts/kirkwood-netgear_readynas_duo_v2.dts | 11 +++++
+ arch/arm/boot/dts/kirkwood-nsa310.dts | 19 ++++----
+ arch/arm/boot/dts/kirkwood-ts219-6282.dts | 19 ++++----
+ arch/arm/boot/dts/kirkwood-ts219.dtsi | 10 ++++
+ arch/arm/boot/dts/kirkwood.dtsi | 4 ++
+ 9 files changed, 159 insertions(+), 16 deletions(-)
+
+--- a/arch/arm/boot/dts/kirkwood-6281.dtsi
++++ b/arch/arm/boot/dts/kirkwood-6281.dtsi
+@@ -1,4 +1,39 @@
+ / {
++ mbus {
++ pcie-controller {
++ compatible = "marvell,kirkwood-pcie";
++ status = "disabled";
++ device_type = "pci";
++
++ #address-cells = <3>;
++ #size-cells = <2>;
++
++ bus-range = <0x00 0xff>;
++
++ ranges =
++ <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
++ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
++ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
++
++ pcie@1,0 {
++ device_type = "pci";
++ assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
++ reg = <0x0800 0 0 0 0>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ #interrupt-cells = <1>;
++ ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
++ 0x81000000 0 0 0x81000000 0x1 0 1 0>;
++ interrupt-map-mask = <0 0 0 0>;
++ interrupt-map = <0 0 0 0 &intc 9>;
++ marvell,pcie-port = <0>;
++ marvell,pcie-lane = <0>;
++ clocks = <&gate_clk 2>;
++ status = "disabled";
++ };
++ };
++ };
++
+ ocp@f1000000 {
+ pinctrl: pinctrl@10000 {
+ compatible = "marvell,88f6281-pinctrl";
+--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
++++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
+@@ -1,4 +1,59 @@
+ / {
++ mbus {
++ pcie-controller {
++ compatible = "marvell,kirkwood-pcie";
++ status = "disabled";
++ device_type = "pci";
++
++ #address-cells = <3>;
++ #size-cells = <2>;
++
++ bus-range = <0x00 0xff>;
++
++ ranges =
++ <0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
++ 0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
++ 0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
++ 0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
++ 0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
++ 0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
++ 0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
++
++ pcie@1,0 {
++ device_type = "pci";
++ assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
++ reg = <0x0800 0 0 0 0>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ #interrupt-cells = <1>;
++ ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
++ 0x81000000 0 0 0x81000000 0x1 0 1 0>;
++ interrupt-map-mask = <0 0 0 0>;
++ interrupt-map = <0 0 0 0 &intc 9>;
++ marvell,pcie-port = <0>;
++ marvell,pcie-lane = <0>;
++ clocks = <&gate_clk 2>;
++ status = "disabled";
++ };
++
++ pcie@2,0 {
++ device_type = "pci";
++ assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
++ reg = <0x1000 0 0 0 0>;
++ #address-cells = <3>;
++ #size-cells = <2>;
++ #interrupt-cells = <1>;
++ ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
++ 0x81000000 0 0 0x81000000 0x2 0 1 0>;
++ interrupt-map-mask = <0 0 0 0>;
++ interrupt-map = <0 0 0 0 &intc 10>;
++ marvell,pcie-port = <1>;
++ marvell,pcie-lane = <0>;
++ clocks = <&gate_clk 18>;
++ status = "disabled";
++ };
++ };
++ };
+ ocp@f1000000 {
+
+ pinctrl: pinctrl@10000 {
+--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
++++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
+@@ -18,6 +18,17 @@
+ linux,initrd-end = <0x4800000>;
+ };
+
++ mbus {
++ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
++ pcie-controller {
++ status = "okay";
++
++ pcie@1,0 {
++ status = "okay";
++ };
++ };
++ };
++
+ ocp@f1000000 {
+ pinctrl: pinctrl@10000 {
+
+--- a/arch/arm/boot/dts/kirkwood-mplcec4.dts
++++ b/arch/arm/boot/dts/kirkwood-mplcec4.dts
+@@ -16,6 +16,17 @@
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
++ mbus {
++ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
++ pcie-controller {
++ status = "okay";
++
++ pcie@1,0 {
++ status = "okay";
++ };
++ };
++ };
++
+ ocp@f1000000 {
+ pinctrl: pinctrl@10000 {
+
+--- a/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
++++ b/arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dts
+@@ -16,6 +16,17 @@
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
++ mbus {
++ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
++ pcie-controller {
++ status = "okay";
++
++ pcie@1,0 {
++ status = "okay";
++ };
++ };
++ };
++
+ ocp@f1000000 {
+ pinctrl: pinctrl@10000 {
+
+--- a/arch/arm/boot/dts/kirkwood-nsa310.dts
++++ b/arch/arm/boot/dts/kirkwood-nsa310.dts
+@@ -16,6 +16,17 @@
+ bootargs = "console=ttyS0,115200";
+ };
+
++ mbus {
++ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
++ pcie-controller {
++ status = "okay";
++
++ pcie@1,0 {
++ status = "okay";
++ };
++ };
++ };
++
+ ocp@f1000000 {
+ pinctrl: pinctrl@10000 {
+ pinctrl-0 = <&pmx_unknown>;
+@@ -162,14 +173,6 @@
+ reg = <0x5040000 0x2fc0000>;
+ };
+ };
+-
+- pcie-controller {
+- status = "okay";
+-
+- pcie@1,0 {
+- status = "okay";
+- };
+- };
+ };
+
+ gpio_keys {
+--- a/arch/arm/boot/dts/kirkwood-ts219-6282.dts
++++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
+@@ -5,6 +5,17 @@
+ #include "kirkwood-ts219.dtsi"
+
+ / {
++ mbus {
++ ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
++ pcie-controller {
++ status = "okay";
++
++ pcie@2,0 {
++ status = "okay";
++ };
++ };
++ };
++
+ ocp@f1000000 {
+ pinctrl: pinctrl@10000 {
+
+@@ -30,14 +41,6 @@
+ marvell,function = "gpio";
+ };
+ };
+- pcie-controller {
+- status = "okay";
+-
+- pcie@2,0 {
+- status = "okay";
+- };
+- };
+-
+ };
+
+ gpio_keys {
+--- a/arch/arm/boot/dts/kirkwood-ts219.dtsi
++++ b/arch/arm/boot/dts/kirkwood-ts219.dtsi
+@@ -13,6 +13,16 @@
+ bootargs = "console=ttyS0,115200n8";
+ };
+
++ mbus {
++ pcie-controller {
++ status = "okay";
++
++ pcie@1,0 {
++ status = "okay";
++ };
++ };
++ };
++
+ ocp@f1000000 {
+ i2c@11000 {
+ status = "okay";
+--- a/arch/arm/boot/dts/kirkwood.dtsi
++++ b/arch/arm/boot/dts/kirkwood.dtsi
+@@ -20,7 +20,11 @@
+
+ mbus {
+ compatible = "marvell,kirkwood-mbus", "simple-bus";
++ #address-cells = <2>;
++ #size-cells = <1>;
+ controller = <&mbusc>;
++ pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
++ pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
+ };
+
+ ocp@f1000000 {
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