diff options
Diffstat (limited to 'target/linux/rdc/files/include/asm-x86/mach-rdc')
-rw-r--r-- | target/linux/rdc/files/include/asm-x86/mach-rdc/gpio.h | 56 | ||||
-rw-r--r-- | target/linux/rdc/files/include/asm-x86/mach-rdc/rdc321x_defs.h | 6 |
2 files changed, 62 insertions, 0 deletions
diff --git a/target/linux/rdc/files/include/asm-x86/mach-rdc/gpio.h b/target/linux/rdc/files/include/asm-x86/mach-rdc/gpio.h new file mode 100644 index 0000000..2368bd7 --- /dev/null +++ b/target/linux/rdc/files/include/asm-x86/mach-rdc/gpio.h @@ -0,0 +1,56 @@ +#ifndef _RDC_GPIO_H +#define _RDC_GPIO_H + +extern int rdc_gpio_get_value(unsigned gpio); +extern void rdc_gpio_set_value(unsigned gpio, int value); +extern int rdc_gpio_direction_input(unsigned gpio); +extern int rdc_gpio_direction_output(unsigned gpio, int value); + + +/* Wrappers for the arch-neutral GPIO API */ + +static inline int gpio_request(unsigned gpio, const char *label) +{ + /* Not yet implemented */ + return 0; +} + +static inline void gpio_free(unsigned gpio) +{ + /* Not yet implemented */ +} + +static inline int gpio_direction_input(unsigned gpio) +{ + return rdc_gpio_direction_input(gpio); +} + +static inline int gpio_direction_output(unsigned gpio, int value) +{ + return rdc_gpio_direction_output(gpio, value); +} + +static inline int gpio_get_value(unsigned gpio) +{ + return rdc_gpio_get_value(gpio); +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ + rdc_gpio_set_value(gpio, value); +} + +static inline int gpio_to_irq(unsigned gpio) +{ + return gpio; +} + +static inline int irq_to_gpio(unsigned irq) +{ + return irq; +} + +/* For cansleep */ +#include <asm-generic/gpio.h> + +#endif /* _RDC_GPIO_H_ */ diff --git a/target/linux/rdc/files/include/asm-x86/mach-rdc/rdc321x_defs.h b/target/linux/rdc/files/include/asm-x86/mach-rdc/rdc321x_defs.h new file mode 100644 index 0000000..838ba8f --- /dev/null +++ b/target/linux/rdc/files/include/asm-x86/mach-rdc/rdc321x_defs.h @@ -0,0 +1,6 @@ +#define PFX "rdc321x: " + +/* General purpose configuration and data registers */ +#define RDC3210_CFGREG_ADDR 0x0CF8 +#define RDC3210_CFGREG_DATA 0x0CFC +#define RDC_MAX_GPIO 0x3A |