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path: root/target/linux/ar71xx/files/arch/mips/pci
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* rename DDR registersGabor Juhos2008-11-261-8/+8
* fix the PCI byte lane enable generation code, based on a patch by Chris DearmanGabor Juhos2008-09-171-5/+6
* surprise :pGabor Juhos2008-07-211-0/+346