summaryrefslogtreecommitdiff
path: root/target/linux/cns21xx/patches-3.3/202-cns21xx-add-watchdog-device.patch
blob: f269136c30ae51b10e6fd3c53c70024a7e734550 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
--- a/arch/arm/mach-cns21xx/common.h
+++ b/arch/arm/mach-cns21xx/common.h
@@ -20,5 +20,6 @@ extern struct sys_timer cns21xx_timer;
 int cns21xx_register_uart0(void);
 int cns21xx_register_uart1(void);
 int cns21xx_register_usb(void);
+int cns21xx_register_wdt(void);
 
 #endif /* _MACH_CNS21XX_COMMON_H */
--- a/arch/arm/mach-cns21xx/devices.c
+++ b/arch/arm/mach-cns21xx/devices.c
@@ -11,6 +11,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/serial_8250.h>
+#include <linux/fa_wdt.h>
 
 #include <mach/irqs.h>
 #include <mach/hardware.h>
@@ -77,3 +78,32 @@ int __init cns21xx_register_uart1(void)
 	HAL_MISC_ENABLE_UART1_PINS();
 	return platform_device_register(&cns21xx_uart1_device);
 }
+
+static struct resource cns21xx_wdt_resources[] = {
+	{
+		.start	= CNS21XX_WDT_BASE,
+		.end	= CNS21XX_WDT_BASE + SZ_4K - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+};
+
+#define CNS21XX_WDT_CLOCK	10	/* 10 Hz */
+
+static struct fa_wdt_platform_data cns21xx_wdt_data = {
+	.clock	= CNS21XX_WDT_CLOCK,
+};
+
+static struct platform_device cns21xx_wdt_device = {
+	.name			= "fa-wdt",
+	.id			= -1,
+	.resource 		= cns21xx_wdt_resources,
+	.num_resources		= ARRAY_SIZE(cns21xx_wdt_resources),
+	.dev = {
+		.platform_data	= &cns21xx_wdt_data,
+	},
+};
+
+int __init cns21xx_register_wdt(void)
+{
+	return platform_device_register(&cns21xx_wdt_device);
+}
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -345,7 +345,7 @@ config IMX2_WDT
 
 config FA_WATCHDOG
 	tristate "Faraday watchdog"
-	depends on ARCH_GEMINI
+	depends on ARCH_GEMINI || ARCH_CNS21XX
 	help
 	  Say Y here if you want support for the built-in watchdog timer
 	  found in some Faraday FA526 based SoCs.