summaryrefslogtreecommitdiff
path: root/target/linux/lantiq/patches-3.2/0038-MIPS-lantiq-add-additional-soc-ids.patch
blob: d5ab3843cdff2d15c3d0225274d85d86b3d0307c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
From 655f264da58e9e49d61bf26374f877e2175125e4 Mon Sep 17 00:00:00 2001
From: John Crispin <blogic@openwrt.org>
Date: Mon, 12 Mar 2012 15:23:39 +0100
Subject: [PATCH 38/70] MIPS: lantiq: add additional soc ids

---
 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h |   38 +++++++++++++++----
 arch/mips/lantiq/xway/prom.c                       |   35 ++++++++++++++++--
 2 files changed, 61 insertions(+), 12 deletions(-)

diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
index 5d11eb7..3f22acb 100644
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -17,20 +17,32 @@
 #define SOC_ID_DANUBE1		0x129
 #define SOC_ID_DANUBE2		0x12B
 #define SOC_ID_TWINPASS		0x12D
-#define SOC_ID_AMAZON_SE	0x152
+#define SOC_ID_AMAZON_SE_1	0x152 /* 50601 */
+#define SOC_ID_AMAZON_SE_2	0x153 /* 50600 */
 #define SOC_ID_ARX188		0x16C
-#define SOC_ID_ARX168		0x16D
+#define SOC_ID_ARX168_1		0x16D
+#define SOC_ID_ARX168_2		0x16E
 #define SOC_ID_ARX182		0x16F
-#define SOC_ID_VRX288		0x1C0 /* VRX288 v1.1 */
-#define SOC_ID_VRX268		0x1C2 /* VRX268 v1.1 */
-#define SOC_ID_GRX288		0x1C9 /* GRX288 v1.1 */
+#define SOC_ID_GRX188		0x170
+#define SOC_ID_GRX168		0x171
+
+#define SOC_ID_VRX288		0x1C0 /* v1.1 */
+#define SOC_ID_VRX282		0x1C1 /* v1.1 */
+#define SOC_ID_VRX268		0x1C2 /* v1.1 */
+#define SOC_ID_GRX268		0x1C8 /* v1.1 */
+#define SOC_ID_GRX288		0x1C9 /* v1.1 */
+#define SOC_ID_VRX288_2		0x00B /* v1.2 */
+#define SOC_ID_VRX268_2		0x00C /* v1.2 */
+#define SOC_ID_GRX288_2		0x00D /* v1.2 */
+#define SOC_ID_GRX282_2		0x00E /* v1.2 */
 
 /* SoC Types */
 #define SOC_TYPE_DANUBE		0x01
 #define SOC_TYPE_TWINPASS	0x02
 #define SOC_TYPE_AR9		0x03
-#define SOC_TYPE_VR9		0x04
-#define SOC_TYPE_AMAZON_SE	0x05
+#define SOC_TYPE_VR9_1		0x04 /* v1.1 */
+#define SOC_TYPE_VR9_2		0x05 /* v1.2 */
+#define SOC_TYPE_AMAZON_SE	0x06
 
 /* ASC0/1 - serial port */
 #define LTQ_ASC0_BASE_ADDR	0x1E100400
@@ -149,9 +161,19 @@ static inline int ltq_is_ar9(void)
 	return (ltq_get_soc_type() == SOC_TYPE_AR9);
 }
 
+static inline int ltq_is_vr9_1(void)
+{
+	return (ltq_get_soc_type() == SOC_TYPE_VR9_1);
+}
+
+static inline int ltq_is_vr9_2(void)
+{
+	return (ltq_get_soc_type() == SOC_TYPE_VR9_2);
+}
+
 static inline int ltq_is_vr9(void)
 {
-	return (ltq_get_soc_type() == SOC_TYPE_VR9);
+	return (ltq_is_vr9_1() || ltq_is_vr9_2());
 }
 
 static inline int ltq_is_falcon(void)
diff --git a/arch/mips/lantiq/xway/prom.c b/arch/mips/lantiq/xway/prom.c
index b6f56b7..e3dcbbd 100644
--- a/arch/mips/lantiq/xway/prom.c
+++ b/arch/mips/lantiq/xway/prom.c
@@ -18,7 +18,9 @@
 
 #define SOC_DANUBE	"Danube"
 #define SOC_TWINPASS	"Twinpass"
+#define SOC_AMAZON_SE	"Amazon_SE"
 #define SOC_AR9		"AR9"
+#define SOC_GR9		"GR9"
 #define SOC_VR9		"VR9"
 
 #define PART_SHIFT	12
@@ -26,7 +28,6 @@
 #define REV_SHIFT	28
 #define REV_MASK	0xF0000000
 
-#define SOC_AMAZON_SE	"Amazon_SE"
 
 void __init ltq_soc_detect(struct ltq_soc_info *i)
 {
@@ -46,13 +47,21 @@ void __init ltq_soc_detect(struct ltq_soc_info *i)
 		break;
 
 	case SOC_ID_ARX188:
-	case SOC_ID_ARX168:
+	case SOC_ID_ARX168_1:
+	case SOC_ID_ARX168_2:
 	case SOC_ID_ARX182:
 		i->name = SOC_AR9;
 		i->type = SOC_TYPE_AR9;
 		break;
 
-	case SOC_ID_AMAZON_SE:
+	case SOC_ID_GRX188:
+	case SOC_ID_GRX168:
+		i->name = SOC_GR9;
+		i->type = SOC_TYPE_AR9;
+		break;
+
+	case SOC_ID_AMAZON_SE_1:
+	case SOC_ID_AMAZON_SE_2:
 		i->name = SOC_AMAZON_SE;
 		i->type = SOC_TYPE_AMAZON_SE;
 #ifdef CONFIG_PCI
@@ -60,12 +69,30 @@ void __init ltq_soc_detect(struct ltq_soc_info *i)
 #endif
 		break;
 
+	case SOC_ID_VRX282:
 	case SOC_ID_VRX268:
 	case SOC_ID_VRX288:
 		i->name = SOC_VR9;
-		i->type = SOC_TYPE_VR9;
+		i->type = SOC_TYPE_VR9_1;
 		break;
 
+	case SOC_ID_GRX268:
+	case SOC_ID_GRX288:
+		i->name = SOC_GR9;
+		i->type = SOC_TYPE_VR9_1;
+		break;
+
+	case SOC_ID_VRX268_2:
+	case SOC_ID_VRX288_2:
+		i->name = SOC_VR9;
+		i->type = SOC_TYPE_VR9_2;
+		break;
+
+	case SOC_ID_GRX282_2:
+	case SOC_ID_GRX288_2:
+		i->name = SOC_GR9;
+		i->type = SOC_TYPE_VR9_2;
+
 	default:
 		unreachable();
 		break;
-- 
1.7.7.1