diff options
Diffstat (limited to 'target/linux/ar71xx/files')
149 files changed, 0 insertions, 28791 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c deleted file mode 100644 index d382453..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * Atheros AP9X reference board PCI initialization - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/ath9k_platform.h> -#include <linux/delay.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "pci-ath9k-fixup.h" -#include "pci.h" - -static struct ath9k_platform_data ap9x_wmac0_data = { - .led_pin = -1, -}; -static struct ath9k_platform_data ap9x_wmac1_data = { - .led_pin = -1, -}; -static char ap9x_wmac0_mac[6]; -static char ap9x_wmac1_mac[6]; - -__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) -{ - switch (wmac) { - case 0: - ap9x_wmac0_data.led_pin = pin; - break; - case 1: - ap9x_wmac1_data.led_pin = pin; - break; - } -} - -__init struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac) -{ - switch (wmac) { - case 0: - return &ap9x_wmac0_data; - - case 1: - return &ap9x_wmac1_data; - } - - return NULL; -} - -__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) -{ - switch (wmac) { - case 0: - ap9x_wmac0_data.gpio_mask = mask; - ap9x_wmac0_data.gpio_val = val; - break; - case 1: - ap9x_wmac1_data.gpio_mask = mask; - ap9x_wmac1_data.gpio_val = val; - break; - } -} - -__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, - int num_leds) -{ - switch (wmac) { - case 0: - ap9x_wmac0_data.leds = leds; - ap9x_wmac0_data.num_leds = num_leds; - break; - case 1: - ap9x_wmac1_data.leds = leds; - ap9x_wmac1_data.num_leds = num_leds; - break; - } -} - -static int ap91_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 0: - dev->dev.platform_data = &ap9x_wmac0_data; - break; - } - - return 0; -} - -__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr) -{ - if (cal_data) - memcpy(ap9x_wmac0_data.eeprom_data, cal_data, - sizeof(ap9x_wmac0_data.eeprom_data)); - - if (mac_addr) { - memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac)); - ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; - } - - ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init); - ath79_register_pci(); - - pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data); -} - -__init void ap91_pci_init_simple(void) -{ - ap91_pci_init(NULL, NULL); - ap9x_wmac0_data.eeprom_name = "pci_wmac0.eeprom"; -} - -static int ap94_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 17: - dev->dev.platform_data = &ap9x_wmac0_data; - break; - - case 18: - dev->dev.platform_data = &ap9x_wmac1_data; - break; - } - - return 0; -} - -__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ - if (cal_data0) - memcpy(ap9x_wmac0_data.eeprom_data, cal_data0, - sizeof(ap9x_wmac0_data.eeprom_data)); - - if (cal_data1) - memcpy(ap9x_wmac1_data.eeprom_data, cal_data1, - sizeof(ap9x_wmac1_data.eeprom_data)); - - if (mac_addr0) { - memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac)); - ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; - } - - if (mac_addr1) { - memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac)); - ap9x_wmac1_data.macaddr = ap9x_wmac1_mac; - } - - ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init); - ath79_register_pci(); - - pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data); - pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data); -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.h deleted file mode 100644 index ad288cb..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Atheros AP9X reference board PCI initialization - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_AP9X_PCI_H -#define _ATH79_DEV_AP9X_PCI_H - -struct gpio_led; -struct ath9k_platform_data; - -#if defined(CONFIG_ATH79_DEV_AP9X_PCI) -void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin); -void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val); -void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, - int num_leds); -struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac); - -void ap91_pci_init(u8 *cal_data, u8 *mac_addr); -void ap91_pci_init_simple(void); -void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1); - -#else -static inline void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) {} -static inline void ap9x_pci_setup_wmac_gpio(unsigned wmac, - u32 mask, u32 val) {} -static inline void ap9x_pci_setup_wmac_leds(unsigned wmac, - struct gpio_led *leds, - int num_leds) {} -static inline struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac) -{ - return NULL; -} - -static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) {} -static inline void ap91_pci_init_simple(void) {} -static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) {} -#endif - -#endif /* _ATH79_DEV_AP9X_PCI_H */ - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.c deleted file mode 100644 index 1764147..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Atheros AR71xx DSA switch device support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-dsa.h" - -static struct platform_device ar71xx_dsa_switch_device = { - .name = "dsa", - .id = 0, -}; - -void __init ath79_register_dsa(struct device *netdev, - struct device *miidev, - struct dsa_platform_data *d) -{ - int i; - - d->netdev = netdev; - for (i = 0; i < d->nr_chips; i++) - d->chip[i].mii_bus = miidev; - - ar71xx_dsa_switch_device.dev.platform_data = d; - platform_device_register(&ar71xx_dsa_switch_device); -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.h deleted file mode 100644 index 3730202..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Atheros AR71xx DSA switch device support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_DSA_H -#define _ATH79_DEV_DSA_H - -#include <net/dsa.h> - -void ath79_register_dsa(struct device *netdev, - struct device *miidev, - struct dsa_platform_data *d); - -#endif /* _ATH79_DEV_DSA_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c deleted file mode 100644 index 227f16e..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ /dev/null @@ -1,1209 +0,0 @@ -/* - * Atheros AR71xx SoC platform devices - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com> - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Parts of this file are based on Atheros 2.6.15 BSP - * Parts of this file are based on Atheros 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/etherdevice.h> -#include <linux/platform_device.h> -#include <linux/serial_8250.h> -#include <linux/clk.h> -#include <linux/sizes.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/irq.h> - -#include "common.h" -#include "dev-eth.h" - -unsigned char ath79_mac_base[ETH_ALEN] __initdata; - -static struct resource ath79_mdio0_resources[] = { - { - .name = "mdio_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE0_BASE, - .end = AR71XX_GE0_BASE + 0x200 - 1, - } -}; - -struct ag71xx_mdio_platform_data ath79_mdio0_data; - -struct platform_device ath79_mdio0_device = { - .name = "ag71xx-mdio", - .id = 0, - .resource = ath79_mdio0_resources, - .num_resources = ARRAY_SIZE(ath79_mdio0_resources), - .dev = { - .platform_data = &ath79_mdio0_data, - }, -}; - -static struct resource ath79_mdio1_resources[] = { - { - .name = "mdio_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE1_BASE, - .end = AR71XX_GE1_BASE + 0x200 - 1, - } -}; - -struct ag71xx_mdio_platform_data ath79_mdio1_data; - -struct platform_device ath79_mdio1_device = { - .name = "ag71xx-mdio", - .id = 1, - .resource = ath79_mdio1_resources, - .num_resources = ARRAY_SIZE(ath79_mdio1_resources), - .dev = { - .platform_data = &ath79_mdio1_data, - }, -}; - -static void ath79_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) -{ - void __iomem *base; - u32 t; - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - - t = __raw_readl(base + cfg_reg); - t &= ~(3 << shift); - t |= (2 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - __raw_writel(pll_val, base + pll_reg); - - t |= (3 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - t &= ~(3 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n", - (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg)); - - iounmap(base); -} - -static void __init ath79_mii_ctrl_set_if(unsigned int reg, - unsigned int mii_if) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); - - t = __raw_readl(base + reg); - t &= ~(AR71XX_MII_CTRL_IF_MASK); - t |= (mii_if & AR71XX_MII_CTRL_IF_MASK); - __raw_writel(t, base + reg); - - iounmap(base); -} - -static void ath79_mii_ctrl_set_speed(unsigned int reg, unsigned int speed) -{ - void __iomem *base; - unsigned int mii_speed; - u32 t; - - switch (speed) { - case SPEED_10: - mii_speed = AR71XX_MII_CTRL_SPEED_10; - break; - case SPEED_100: - mii_speed = AR71XX_MII_CTRL_SPEED_100; - break; - case SPEED_1000: - mii_speed = AR71XX_MII_CTRL_SPEED_1000; - break; - default: - BUG(); - } - - base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); - - t = __raw_readl(base + reg); - t &= ~(AR71XX_MII_CTRL_SPEED_MASK << AR71XX_MII_CTRL_SPEED_SHIFT); - t |= mii_speed << AR71XX_MII_CTRL_SPEED_SHIFT; - __raw_writel(t, base + reg); - - iounmap(base); -} - -static unsigned long ar934x_get_mdio_ref_clock(void) -{ - void __iomem *base; - unsigned long ret; - u32 t; - - base = ioremap(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - - ret = 0; - t = __raw_readl(base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); - if (t & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) { - ret = 100 * 1000 * 1000; - } else { - struct clk *clk; - - clk = clk_get(NULL, "ref"); - if (!IS_ERR(clk)) - ret = clk_get_rate(clk); - } - - iounmap(base); - - return ret; -} - -void __init ath79_register_mdio(unsigned int id, u32 phy_mask) -{ - struct platform_device *mdio_dev; - struct ag71xx_mdio_platform_data *mdio_data; - unsigned int max_id; - - if (ath79_soc == ATH79_SOC_AR9341 || - ath79_soc == ATH79_SOC_AR9342 || - ath79_soc == ATH79_SOC_AR9344 || - ath79_soc == ATH79_SOC_QCA9556 || - ath79_soc == ATH79_SOC_QCA9558) - max_id = 1; - else - max_id = 0; - - if (id > max_id) { - printk(KERN_ERR "ar71xx: invalid MDIO id %u\n", id); - return; - } - - switch (ath79_soc) { - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - case ATH79_SOC_QCA9533: - mdio_dev = &ath79_mdio1_device; - mdio_data = &ath79_mdio1_data; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - case ATH79_SOC_QCA9556: - case ATH79_SOC_QCA9558: - if (id == 0) { - mdio_dev = &ath79_mdio0_device; - mdio_data = &ath79_mdio0_data; - } else { - mdio_dev = &ath79_mdio1_device; - mdio_data = &ath79_mdio1_data; - } - break; - - case ATH79_SOC_AR7242: - ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, - AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000, - AR71XX_ETH0_PLL_SHIFT); - /* fall through */ - default: - mdio_dev = &ath79_mdio0_device; - mdio_data = &ath79_mdio0_data; - break; - } - - mdio_data->phy_mask = phy_mask; - - switch (ath79_soc) { - case ATH79_SOC_AR7240: - mdio_data->is_ar7240 = 1; - /* fall through */ - case ATH79_SOC_AR7241: - mdio_data->builtin_switch = 1; - break; - - case ATH79_SOC_AR9330: - mdio_data->is_ar9330 = 1; - /* fall through */ - case ATH79_SOC_AR9331: - mdio_data->builtin_switch = 1; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - if (id == 1) { - mdio_data->builtin_switch = 1; - mdio_data->ref_clock = ar934x_get_mdio_ref_clock(); - mdio_data->mdio_clock = 6250000; - } - mdio_data->is_ar934x = 1; - break; - - case ATH79_SOC_QCA9533: - mdio_data->builtin_switch = 1; - break; - - case ATH79_SOC_QCA9556: - case ATH79_SOC_QCA9558: - mdio_data->is_ar934x = 1; - break; - - default: - break; - } - - platform_device_register(mdio_dev); -} - -struct ath79_eth_pll_data ath79_eth0_pll_data; -struct ath79_eth_pll_data ath79_eth1_pll_data; - -static u32 ath79_get_eth_pll(unsigned int mac, int speed) -{ - struct ath79_eth_pll_data *pll_data; - u32 pll_val; - - switch (mac) { - case 0: - pll_data = &ath79_eth0_pll_data; - break; - case 1: - pll_data = &ath79_eth1_pll_data; - break; - default: - BUG(); - } - - switch (speed) { - case SPEED_10: - pll_val = pll_data->pll_10; - break; - case SPEED_100: - pll_val = pll_data->pll_100; - break; - case SPEED_1000: - pll_val = pll_data->pll_1000; - break; - default: - BUG(); - } - - return pll_val; -} - -static void ath79_set_speed_ge0(int speed) -{ - u32 val = ath79_get_eth_pll(0, speed); - - ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK, - val, AR71XX_ETH0_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); -} - -static void ath79_set_speed_ge1(int speed) -{ - u32 val = ath79_get_eth_pll(1, speed); - - ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK, - val, AR71XX_ETH1_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); -} - -static void ar7242_set_speed_ge0(int speed) -{ - u32 val = ath79_get_eth_pll(0, speed); - void __iomem *base; - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - __raw_writel(val, base + AR7242_PLL_REG_ETH0_INT_CLOCK); - iounmap(base); -} - -static void ar91xx_set_speed_ge0(int speed) -{ - u32 val = ath79_get_eth_pll(0, speed); - - ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH0_INT_CLOCK, - val, AR913X_ETH0_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); -} - -static void ar91xx_set_speed_ge1(int speed) -{ - u32 val = ath79_get_eth_pll(1, speed); - - ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH1_INT_CLOCK, - val, AR913X_ETH1_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); -} - -static void ar934x_set_speed_ge0(int speed) -{ - void __iomem *base; - u32 val = ath79_get_eth_pll(0, speed); - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - __raw_writel(val, base + AR934X_PLL_ETH_XMII_CONTROL_REG); - iounmap(base); -} - -static void qca955x_set_speed_xmii(int speed) -{ - void __iomem *base; - u32 val = ath79_get_eth_pll(0, speed); - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - __raw_writel(val, base + QCA955X_PLL_ETH_XMII_CONTROL_REG); - iounmap(base); -} - -static void qca955x_set_speed_sgmii(int speed) -{ - void __iomem *base; - u32 val = ath79_get_eth_pll(1, speed); - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - __raw_writel(val, base + QCA955X_PLL_ETH_SGMII_CONTROL_REG); - iounmap(base); -} - -static void ath79_set_speed_dummy(int speed) -{ -} - -static void ath79_ddr_no_flush(void) -{ -} - -static void ath79_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0); -} - -static void ath79_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE1); -} - -static void ar724x_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE0); -} - -static void ar724x_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE1); -} - -static void ar91xx_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE0); -} - -static void ar91xx_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE1); -} - -static void ar933x_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE0); -} - -static void ar933x_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1); -} - -static struct resource ath79_eth0_resources[] = { - { - .name = "mac_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE0_BASE, - .end = AR71XX_GE0_BASE + 0x200 - 1, - }, { - .name = "mac_irq", - .flags = IORESOURCE_IRQ, - .start = ATH79_CPU_IRQ(4), - .end = ATH79_CPU_IRQ(4), - }, -}; - -struct ag71xx_platform_data ath79_eth0_data = { - .reset_bit = AR71XX_RESET_GE0_MAC, -}; - -struct platform_device ath79_eth0_device = { - .name = "ag71xx", - .id = 0, - .resource = ath79_eth0_resources, - .num_resources = ARRAY_SIZE(ath79_eth0_resources), - .dev = { - .platform_data = &ath79_eth0_data, - }, -}; - -static struct resource ath79_eth1_resources[] = { - { - .name = "mac_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE1_BASE, - .end = AR71XX_GE1_BASE + 0x200 - 1, - }, { - .name = "mac_irq", - .flags = IORESOURCE_IRQ, - .start = ATH79_CPU_IRQ(5), - .end = ATH79_CPU_IRQ(5), - }, -}; - -struct ag71xx_platform_data ath79_eth1_data = { - .reset_bit = AR71XX_RESET_GE1_MAC, -}; - -struct platform_device ath79_eth1_device = { - .name = "ag71xx", - .id = 1, - .resource = ath79_eth1_resources, - .num_resources = ARRAY_SIZE(ath79_eth1_resources), - .dev = { - .platform_data = &ath79_eth1_data, - }, -}; - -struct ag71xx_switch_platform_data ath79_switch_data; - -#define AR71XX_PLL_VAL_1000 0x00110000 -#define AR71XX_PLL_VAL_100 0x00001099 -#define AR71XX_PLL_VAL_10 0x00991099 - -#define AR724X_PLL_VAL_1000 0x00110000 -#define AR724X_PLL_VAL_100 0x00001099 -#define AR724X_PLL_VAL_10 0x00991099 - -#define AR7242_PLL_VAL_1000 0x16000000 -#define AR7242_PLL_VAL_100 0x00000101 -#define AR7242_PLL_VAL_10 0x00001616 - -#define AR913X_PLL_VAL_1000 0x1a000000 -#define AR913X_PLL_VAL_100 0x13000a44 -#define AR913X_PLL_VAL_10 0x00441099 - -#define AR933X_PLL_VAL_1000 0x00110000 -#define AR933X_PLL_VAL_100 0x00001099 -#define AR933X_PLL_VAL_10 0x00991099 - -#define AR934X_PLL_VAL_1000 0x16000000 -#define AR934X_PLL_VAL_100 0x00000101 -#define AR934X_PLL_VAL_10 0x00001616 - -static void __init ath79_init_eth_pll_data(unsigned int id) -{ - struct ath79_eth_pll_data *pll_data; - u32 pll_10, pll_100, pll_1000; - - switch (id) { - case 0: - pll_data = &ath79_eth0_pll_data; - break; - case 1: - pll_data = &ath79_eth1_pll_data; - break; - default: - BUG(); - } - - switch (ath79_soc) { - case ATH79_SOC_AR7130: - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - pll_10 = AR71XX_PLL_VAL_10; - pll_100 = AR71XX_PLL_VAL_100; - pll_1000 = AR71XX_PLL_VAL_1000; - break; - - case ATH79_SOC_AR7240: - case ATH79_SOC_AR7241: - pll_10 = AR724X_PLL_VAL_10; - pll_100 = AR724X_PLL_VAL_100; - pll_1000 = AR724X_PLL_VAL_1000; - break; - - case ATH79_SOC_AR7242: - pll_10 = AR7242_PLL_VAL_10; - pll_100 = AR7242_PLL_VAL_100; - pll_1000 = AR7242_PLL_VAL_1000; - break; - - case ATH79_SOC_AR9130: - case ATH79_SOC_AR9132: - pll_10 = AR913X_PLL_VAL_10; - pll_100 = AR913X_PLL_VAL_100; - pll_1000 = AR913X_PLL_VAL_1000; - break; - - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - pll_10 = AR933X_PLL_VAL_10; - pll_100 = AR933X_PLL_VAL_100; - pll_1000 = AR933X_PLL_VAL_1000; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - case ATH79_SOC_QCA9533: - case ATH79_SOC_QCA9556: - case ATH79_SOC_QCA9558: - pll_10 = AR934X_PLL_VAL_10; - pll_100 = AR934X_PLL_VAL_100; - pll_1000 = AR934X_PLL_VAL_1000; - break; - - default: - BUG(); - } - - if (!pll_data->pll_10) - pll_data->pll_10 = pll_10; - - if (!pll_data->pll_100) - pll_data->pll_100 = pll_100; - - if (!pll_data->pll_1000) - pll_data->pll_1000 = pll_1000; -} - -static int __init ath79_setup_phy_if_mode(unsigned int id, - struct ag71xx_platform_data *pdata) -{ - unsigned int mii_if; - - switch (id) { - case 0: - switch (ath79_soc) { - case ATH79_SOC_AR7130: - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - case ATH79_SOC_AR9130: - case ATH79_SOC_AR9132: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - mii_if = AR71XX_MII0_CTRL_IF_MII; - break; - case PHY_INTERFACE_MODE_GMII: - mii_if = AR71XX_MII0_CTRL_IF_GMII; - break; - case PHY_INTERFACE_MODE_RGMII: - mii_if = AR71XX_MII0_CTRL_IF_RGMII; - break; - case PHY_INTERFACE_MODE_RMII: - mii_if = AR71XX_MII0_CTRL_IF_RMII; - break; - default: - return -EINVAL; - } - ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII0_CTRL, mii_if); - break; - - case ATH79_SOC_AR7240: - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - case ATH79_SOC_QCA9533: - pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; - break; - - case ATH79_SOC_AR7242: - /* FIXME */ - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RMII: - break; - default: - return -EINVAL; - } - break; - - case ATH79_SOC_QCA9556: - case ATH79_SOC_QCA9558: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_SGMII: - break; - default: - return -EINVAL; - } - break; - - default: - BUG(); - } - break; - case 1: - switch (ath79_soc) { - case ATH79_SOC_AR7130: - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - case ATH79_SOC_AR9130: - case ATH79_SOC_AR9132: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_RMII: - mii_if = AR71XX_MII1_CTRL_IF_RMII; - break; - case PHY_INTERFACE_MODE_RGMII: - mii_if = AR71XX_MII1_CTRL_IF_RGMII; - break; - default: - return -EINVAL; - } - ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII1_CTRL, mii_if); - break; - - case ATH79_SOC_AR7240: - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - case ATH79_SOC_QCA9533: - pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; - break; - - case ATH79_SOC_AR7242: - /* FIXME */ - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - break; - default: - return -EINVAL; - } - break; - - case ATH79_SOC_QCA9556: - case ATH79_SOC_QCA9558: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_SGMII: - break; - default: - return -EINVAL; - } - break; - - default: - BUG(); - } - break; - } - - return 0; -} - -void __init ath79_setup_ar933x_phy4_switch(bool mac, bool mdio) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR933X_GMAC_BASE, AR933X_GMAC_SIZE); - - t = __raw_readl(base + AR933X_GMAC_REG_ETH_CFG); - t &= ~(AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP); - if (mac) - t |= AR933X_ETH_CFG_SW_PHY_SWAP; - if (mdio) - t |= AR933X_ETH_CFG_SW_PHY_ADDR_SWAP; - __raw_writel(t, base + AR933X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - -void __init ath79_setup_ar934x_eth_cfg(u32 mask) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR934X_GMAC_BASE, AR934X_GMAC_SIZE); - - t = __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); - - t &= ~(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_MII_GMAC0 | - AR934X_ETH_CFG_GMII_GMAC0 | - AR934X_ETH_CFG_SW_ONLY_MODE | - AR934X_ETH_CFG_SW_PHY_SWAP); - - t |= mask; - - __raw_writel(t, base + AR934X_GMAC_REG_ETH_CFG); - /* flush write */ - __raw_readl(base + AR934X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - -void __init ath79_setup_qca955x_eth_cfg(u32 mask) -{ - void __iomem *base; - u32 t; - - base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); - - t = __raw_readl(base + QCA955X_GMAC_REG_ETH_CFG); - - t &= ~(QCA955X_ETH_CFG_RGMII_EN | QCA955X_ETH_CFG_GE0_SGMII); - - t |= mask; - - __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - -static int ath79_eth_instance __initdata; -void __init ath79_register_eth(unsigned int id) -{ - struct platform_device *pdev; - struct ag71xx_platform_data *pdata; - int err; - - if (id > 1) { - printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id); - return; - } - - ath79_init_eth_pll_data(id); - - if (id == 0) - pdev = &ath79_eth0_device; - else - pdev = &ath79_eth1_device; - - pdata = pdev->dev.platform_data; - - pdata->max_frame_len = 1540; - pdata->desc_pktlen_mask = 0xfff; - - err = ath79_setup_phy_if_mode(id, pdata); - if (err) { - printk(KERN_ERR - "ar71xx: invalid PHY interface mode for GE%u\n", id); - return; - } - - switch (ath79_soc) { - case ATH79_SOC_AR7130: - if (id == 0) { - pdata->ddr_flush = ath79_ddr_flush_ge0; - pdata->set_speed = ath79_set_speed_ge0; - } else { - pdata->ddr_flush = ath79_ddr_flush_ge1; - pdata->set_speed = ath79_set_speed_ge1; - } - break; - - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - if (id == 0) { - pdata->ddr_flush = ath79_ddr_flush_ge0; - pdata->set_speed = ath79_set_speed_ge0; - } else { - pdata->ddr_flush = ath79_ddr_flush_ge1; - pdata->set_speed = ath79_set_speed_ge1; - } - pdata->has_gbit = 1; - break; - - case ATH79_SOC_AR7242: - if (id == 0) { - pdata->reset_bit |= AR724X_RESET_GE0_MDIO | - AR71XX_RESET_GE0_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge0; - pdata->set_speed = ar7242_set_speed_ge0; - } else { - pdata->reset_bit |= AR724X_RESET_GE1_MDIO | - AR71XX_RESET_GE1_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge1; - pdata->set_speed = ath79_set_speed_dummy; - } - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_AR7241: - if (id == 0) - pdata->reset_bit |= AR724X_RESET_GE0_MDIO; - else - pdata->reset_bit |= AR724X_RESET_GE1_MDIO; - /* fall through */ - case ATH79_SOC_AR7240: - if (id == 0) { - pdata->reset_bit |= AR71XX_RESET_GE0_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge0; - pdata->set_speed = ath79_set_speed_dummy; - - pdata->phy_mask = BIT(4); - } else { - pdata->reset_bit |= AR71XX_RESET_GE1_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge1; - pdata->set_speed = ath79_set_speed_dummy; - - pdata->speed = SPEED_1000; - pdata->duplex = DUPLEX_FULL; - pdata->switch_data = &ath79_switch_data; - - ath79_switch_data.phy_poll_mask |= BIT(4); - } - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - if (ath79_soc == ATH79_SOC_AR7240) - pdata->is_ar7240 = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_AR9130: - if (id == 0) { - pdata->ddr_flush = ar91xx_ddr_flush_ge0; - pdata->set_speed = ar91xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar91xx_ddr_flush_ge1; - pdata->set_speed = ar91xx_set_speed_ge1; - } - pdata->is_ar91xx = 1; - break; - - case ATH79_SOC_AR9132: - if (id == 0) { - pdata->ddr_flush = ar91xx_ddr_flush_ge0; - pdata->set_speed = ar91xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar91xx_ddr_flush_ge1; - pdata->set_speed = ar91xx_set_speed_ge1; - } - pdata->is_ar91xx = 1; - pdata->has_gbit = 1; - break; - - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - if (id == 0) { - pdata->reset_bit = AR933X_RESET_GE0_MAC | - AR933X_RESET_GE0_MDIO; - pdata->ddr_flush = ar933x_ddr_flush_ge0; - pdata->set_speed = ath79_set_speed_dummy; - - pdata->phy_mask = BIT(4); - } else { - pdata->reset_bit = AR933X_RESET_GE1_MAC | - AR933X_RESET_GE1_MDIO; - pdata->ddr_flush = ar933x_ddr_flush_ge1; - pdata->set_speed = ath79_set_speed_dummy; - - pdata->speed = SPEED_1000; - pdata->duplex = DUPLEX_FULL; - pdata->switch_data = &ath79_switch_data; - - ath79_switch_data.phy_poll_mask |= BIT(4); - } - - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - if (id == 0) { - pdata->reset_bit = AR934X_RESET_GE0_MAC | - AR934X_RESET_GE0_MDIO; - pdata->set_speed = ar934x_set_speed_ge0; - } else { - pdata->reset_bit = AR934X_RESET_GE1_MAC | - AR934X_RESET_GE1_MDIO; - pdata->set_speed = ath79_set_speed_dummy; - - pdata->switch_data = &ath79_switch_data; - - /* reset the built-in switch */ - ath79_device_reset_set(AR934X_RESET_ETH_SWITCH); - ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH); - } - - pdata->ddr_flush = ath79_ddr_no_flush; - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - pdata->max_frame_len = SZ_16K - 1; - pdata->desc_pktlen_mask = SZ_16K - 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_QCA9533: - if (id == 0) { - pdata->reset_bit = AR933X_RESET_GE0_MAC | - AR933X_RESET_GE0_MDIO; - pdata->set_speed = ath79_set_speed_dummy; - - pdata->phy_mask = BIT(4); - } else { - pdata->reset_bit = AR933X_RESET_GE1_MAC | - AR933X_RESET_GE1_MDIO; - pdata->set_speed = ath79_set_speed_dummy; - - pdata->speed = SPEED_1000; - pdata->duplex = DUPLEX_FULL; - pdata->switch_data = &ath79_switch_data; - - ath79_switch_data.phy_poll_mask |= BIT(4); - } - - pdata->ddr_flush = ath79_ddr_no_flush; - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_QCA9556: - case ATH79_SOC_QCA9558: - if (id == 0) { - pdata->reset_bit = QCA955X_RESET_GE0_MAC | - QCA955X_RESET_GE0_MDIO; - pdata->set_speed = qca955x_set_speed_xmii; - } else { - pdata->reset_bit = QCA955X_RESET_GE1_MAC | - QCA955X_RESET_GE1_MDIO; - pdata->set_speed = qca955x_set_speed_sgmii; - } - - pdata->ddr_flush = ath79_ddr_no_flush; - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - /* - * Limit the maximum frame length to 4095 bytes. - * Although the documentation says that the hardware - * limit is 16383 bytes but that does not work in - * practice. It seems that the hardware only updates - * the lowest 12 bits of the packet length field - * in the RX descriptor. - */ - pdata->max_frame_len = SZ_4K - 1; - pdata->desc_pktlen_mask = SZ_16K - 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - default: - BUG(); - } - - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_GMII: - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_SGMII: - if (!pdata->has_gbit) { - printk(KERN_ERR "ar71xx: no gbit available on eth%d\n", - id); - return; - } - /* fallthrough */ - default: - break; - } - - if (!is_valid_ether_addr(pdata->mac_addr)) { - random_ether_addr(pdata->mac_addr); - printk(KERN_DEBUG - "ar71xx: using random MAC address for eth%d\n", - ath79_eth_instance); - } - - if (pdata->mii_bus_dev == NULL) { - switch (ath79_soc) { - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - if (id == 0) - pdata->mii_bus_dev = &ath79_mdio0_device.dev; - else - pdata->mii_bus_dev = &ath79_mdio1_device.dev; - break; - - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - case ATH79_SOC_QCA9533: - pdata->mii_bus_dev = &ath79_mdio1_device.dev; - break; - - case ATH79_SOC_QCA9556: - case ATH79_SOC_QCA9558: - /* don't assign any MDIO device by default */ - break; - - default: - pdata->mii_bus_dev = &ath79_mdio0_device.dev; - break; - } - } - - /* Reset the device */ - ath79_device_reset_set(pdata->reset_bit); - mdelay(100); - - ath79_device_reset_clear(pdata->reset_bit); - mdelay(100); - - platform_device_register(pdev); - ath79_eth_instance++; -} - -void __init ath79_set_mac_base(unsigned char *mac) -{ - memcpy(ath79_mac_base, mac, ETH_ALEN); -} - -void __init ath79_parse_ascii_mac(char *mac_str, u8 *mac) -{ - int t; - - t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); - - if (t != ETH_ALEN) - t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx", - &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); - - if (t != ETH_ALEN || !is_valid_ether_addr(mac)) { - memset(mac, 0, ETH_ALEN); - printk(KERN_DEBUG "ar71xx: invalid mac address \"%s\"\n", - mac_str); - } -} - -static void __init ath79_set_mac_base_ascii(char *str) -{ - u8 mac[ETH_ALEN]; - - ath79_parse_ascii_mac(str, mac); - ath79_set_mac_base(mac); -} - -static int __init ath79_ethaddr_setup(char *str) -{ - ath79_set_mac_base_ascii(str); - return 1; -} -__setup("ethaddr=", ath79_ethaddr_setup); - -static int __init ath79_kmac_setup(char *str) -{ - ath79_set_mac_base_ascii(str); - return 1; -} -__setup("kmac=", ath79_kmac_setup); - -void __init ath79_init_mac(unsigned char *dst, const unsigned char *src, - int offset) -{ - int t; - - if (!dst) - return; - - if (!src || !is_valid_ether_addr(src)) { - memset(dst, '\0', ETH_ALEN); - return; - } - - t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]); - t += offset; - - dst[0] = src[0]; - dst[1] = src[1]; - dst[2] = src[2]; - dst[3] = (t >> 16) & 0xff; - dst[4] = (t >> 8) & 0xff; - dst[5] = t & 0xff; -} - -void __init ath79_init_local_mac(unsigned char *dst, const unsigned char *src) -{ - int i; - - if (!dst) - return; - - if (!src || !is_valid_ether_addr(src)) { - memset(dst, '\0', ETH_ALEN); - return; - } - - for (i = 0; i < ETH_ALEN; i++) - dst[i] = src[i]; - dst[0] |= 0x02; -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h deleted file mode 100644 index e1517b7..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * Atheros AR71xx SoC device definitions - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_ETH_H -#define _ATH79_DEV_ETH_H - -#include <asm/mach-ath79/ag71xx_platform.h> - -struct platform_device; - -extern unsigned char ath79_mac_base[] __initdata; -void ath79_parse_ascii_mac(char *mac_str, u8 *mac); -void ath79_init_mac(unsigned char *dst, const unsigned char *src, - int offset); -void ath79_init_local_mac(unsigned char *dst, const unsigned char *src); - -struct ath79_eth_pll_data { - u32 pll_10; - u32 pll_100; - u32 pll_1000; -}; - -extern struct ath79_eth_pll_data ath79_eth0_pll_data; -extern struct ath79_eth_pll_data ath79_eth1_pll_data; - -extern struct ag71xx_platform_data ath79_eth0_data; -extern struct ag71xx_platform_data ath79_eth1_data; -extern struct platform_device ath79_eth0_device; -extern struct platform_device ath79_eth1_device; -void ath79_register_eth(unsigned int id); - -extern struct ag71xx_switch_platform_data ath79_switch_data; - -extern struct ag71xx_mdio_platform_data ath79_mdio0_data; -extern struct ag71xx_mdio_platform_data ath79_mdio1_data; -extern struct platform_device ath79_mdio0_device; -extern struct platform_device ath79_mdio1_device; -void ath79_register_mdio(unsigned int id, u32 phy_mask); - -void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); -void ath79_setup_ar934x_eth_cfg(u32 mask); -void ath79_setup_qca955x_eth_cfg(u32 mask); - -#endif /* _ATH79_DEV_ETH_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c deleted file mode 100644 index 9323b31..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/concat.h> - -#include "dev-spi.h" -#include "dev-m25p80.h" - -static struct ath79_spi_controller_data ath79_spi0_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, -}; - -static struct ath79_spi_controller_data ath79_spi1_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 1, -}; - -static struct spi_board_info ath79_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .controller_data = &ath79_spi0_cdata, - }, - { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .controller_data = &ath79_spi1_cdata, - } -}; - -static struct ath79_spi_platform_data ath79_spi_data; - -void __init ath79_register_m25p80(struct flash_platform_data *pdata) -{ - ath79_spi_data.bus_num = 0; - ath79_spi_data.num_chipselect = 1; - ath79_spi0_cdata.is_flash = true; - ath79_spi_info[0].platform_data = pdata; - ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); -} - -static struct flash_platform_data *multi_pdata; - -static struct mtd_info *concat_devs[2] = { NULL, NULL }; -static struct work_struct mtd_concat_work; - -static void mtd_concat_add_work(struct work_struct *work) -{ - struct mtd_info *mtd; - - mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash"); - - mtd_device_register(mtd, multi_pdata->parts, multi_pdata->nr_parts); -} - -static void mtd_concat_add(struct mtd_info *mtd) -{ - static bool registered = false; - - if (registered) - return; - - if (!strcmp(mtd->name, "spi0.0")) - concat_devs[0] = mtd; - else if (!strcmp(mtd->name, "spi0.1")) - concat_devs[1] = mtd; - else - return; - - if (!concat_devs[0] || !concat_devs[1]) - return; - - registered = true; - INIT_WORK(&mtd_concat_work, mtd_concat_add_work); - schedule_work(&mtd_concat_work); -} - -static void mtd_concat_remove(struct mtd_info *mtd) -{ -} - -static void add_mtd_concat_notifier(void) -{ - static struct mtd_notifier not = { - .add = mtd_concat_add, - .remove = mtd_concat_remove, - }; - - register_mtd_user(¬); -} - - -void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) -{ - multi_pdata = pdata; - add_mtd_concat_notifier(); - ath79_spi_data.bus_num = 0; - ath79_spi_data.num_chipselect = 2; - ath79_spi0_cdata.is_flash = true; - ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2); -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h deleted file mode 100644 index 637b41a..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_M25P80_H -#define _ATH79_DEV_M25P80_H - -#include <linux/spi/flash.h> - -void ath79_register_m25p80(struct flash_platform_data *pdata) __init; -void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; - -#endif /* _ATH79_DEV_M25P80_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c deleted file mode 100644 index 9b5256e..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Atheros AR934X SoCs built-in NAND flash controller support - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/delay.h> -#include <linux/init.h> -#include <linux/irq.h> -#include <linux/dma-mapping.h> -#include <linux/etherdevice.h> -#include <linux/platform_device.h> -#include <linux/platform/ar934x_nfc.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "dev-nfc.h" - -static struct resource ath79_nfc_resources[2]; -static u64 ar934x_nfc_dmamask = DMA_BIT_MASK(32); -static struct ar934x_nfc_platform_data ath79_nfc_data; - -static struct platform_device ath79_nfc_device = { - .name = AR934X_NFC_DRIVER_NAME, - .id = -1, - .resource = ath79_nfc_resources, - .num_resources = ARRAY_SIZE(ath79_nfc_resources), - .dev = { - .dma_mask = &ar934x_nfc_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &ath79_nfc_data, - }, -}; - -static void __init ath79_nfc_init_resource(struct resource res[2], - unsigned long base, - unsigned long size, - int irq) -{ - memset(res, 0, sizeof(struct resource) * 2); - - res[0].flags = IORESOURCE_MEM; - res[0].start = base; - res[0].end = base + size - 1; - - res[1].flags = IORESOURCE_IRQ; - res[1].start = irq; - res[1].end = irq; -} - -static void ar934x_nfc_hw_reset(bool active) -{ - if (active) { - ath79_device_reset_set(AR934X_RESET_NANDF); - udelay(100); - - ath79_device_reset_set(AR934X_RESET_ETH_SWITCH_ANALOG); - udelay(250); - } else { - ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH_ANALOG); - udelay(250); - - ath79_device_reset_clear(AR934X_RESET_NANDF); - udelay(100); - } -} - -static void ar934x_nfc_setup(void) -{ - ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset; - - ath79_nfc_init_resource(ath79_nfc_resources, - AR934X_NFC_BASE, AR934X_NFC_SIZE, - ATH79_MISC_IRQ(21)); - - platform_device_register(&ath79_nfc_device); -} - -static void qca955x_nfc_hw_reset(bool active) -{ - if (active) { - ath79_device_reset_set(QCA955X_RESET_NANDF); - udelay(250); - } else { - ath79_device_reset_clear(QCA955X_RESET_NANDF); - udelay(100); - } -} - -static void qca955x_nfc_setup(void) -{ - ath79_nfc_data.hw_reset = qca955x_nfc_hw_reset; - - ath79_nfc_init_resource(ath79_nfc_resources, - QCA955X_NFC_BASE, QCA955X_NFC_SIZE, - ATH79_MISC_IRQ(21)); - - platform_device_register(&ath79_nfc_device); -} - -void __init ath79_nfc_set_select_chip(void (*f)(int chip_no)) -{ - ath79_nfc_data.select_chip = f; -} - -void __init ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) -{ - ath79_nfc_data.scan_fixup = f; -} - -void __init ath79_nfc_set_swap_dma(bool enable) -{ - ath79_nfc_data.swap_dma = enable; -} - -void __init ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode) -{ - ath79_nfc_data.ecc_mode = mode; -} - -void __init ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts) -{ - ath79_nfc_data.parts = parts; - ath79_nfc_data.nr_parts = nr_parts; -} - -void __init ath79_register_nfc(void) -{ - if (soc_is_ar934x()) - ar934x_nfc_setup(); - else if (soc_is_qca955x()) - qca955x_nfc_setup(); - else - BUG(); -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.h deleted file mode 100644 index 3a1c88f..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-nfc.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Atheros AR934X SoCs built-in NAND Flash Controller support - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_NFC_H -#define _ATH79_DEV_NFC_H - -struct mtd_partition; -enum ar934x_nfc_ecc_mode; - -#ifdef CONFIG_ATH79_DEV_NFC -void ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts); -void ath79_nfc_set_select_chip(void (*f)(int chip_no)); -void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)); -void ath79_nfc_set_swap_dma(bool enable); -void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode); -void ath79_register_nfc(void); -#else -static inline void ath79_nfc_set_parts(struct mtd_partition *parts, - int nr_parts) {} -static inline void ath79_nfc_set_select_chip(void (*f)(int chip_no)) {} -static inline void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) {} -static inline void ath79_nfc_set_swap_dma(bool enable) {} -static inline void ath79_nfc_set_ecc_mode(enum ar934x_nfc_ecc_mode mode) {} -static inline void ath79_register_nfc(void) {} -#endif - -#endif /* _ATH79_DEV_NFC_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c deleted file mode 100644 index f7cd6ae..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * ALFA Network AP96 board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/bitops.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/mmc/host.h> -#include <linux/spi/spi.h> -#include <linux/spi/mmc_spi.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define ALFA_AP96_GPIO_PCIE_RESET 2 -#define ALFA_AP96_GPIO_SIM_DETECT 3 -#define ALFA_AP96_GPIO_MICROSD_CD 4 -#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5 - -#define ALFA_AP96_GPIO_BUTTON_RESET 11 - -#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL) - -static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALFA_AP96_GPIO_BUTTON_RESET, - .active_low = 1, - } -}; - -static struct mmc_spi_platform_data alfa_ap96_mmc_data = { - .flags = MMC_SPI_USE_CD_GPIO, - .cd_gpio = ALFA_AP96_GPIO_MICROSD_CD, - .cd_debounce = 1, - .caps = MMC_CAP_NEEDS_POLL, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct ath79_spi_controller_data ap96_spi0_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, - .is_flash = true, -}; - -static struct ath79_spi_controller_data ap96_spi1_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 1, -}; - -static struct ath79_spi_controller_data ap96_spi2_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 2, -}; - -static struct spi_board_info alfa_ap96_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .controller_data = &ap96_spi0_cdata - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "mmc_spi", - .platform_data = &alfa_ap96_mmc_data, - .controller_data = &ap96_spi1_cdata - }, { - .bus_num = 0, - .chip_select = 2, - .max_speed_hz = 6250000, - .modalias = "rtc-pcf2123", - .controller_data = &ap96_spi2_cdata - }, -}; - -static struct ath79_spi_platform_data alfa_ap96_spi_data = { - .bus_num = 0, - .num_chipselect = 3, -}; - -static void __init alfa_ap96_gpio_setup(void) -{ - ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD"); - gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD); - gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset"); - gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1); - gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable"); - gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1); -} - -#define ALFA_AP96_WAN_PHYMASK BIT(4) -#define ALFA_AP96_LAN_PHYMASK BIT(5) -#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK) - -static void __init alfa_ap96_init(void) -{ - alfa_ap96_gpio_setup(); - - ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; - ath79_eth1_pll_data.pll_1000 = 0x110000; - - ath79_register_eth(0); - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; - ath79_eth1_pll_data.pll_1000 = 0x110000; - - ath79_register_eth(1); - - ath79_register_pci(); - ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info, - ARRAY_SIZE(alfa_ap96_spi_info)); - - ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, - ARRAY_SIZE(alfa_ap96_gpio_keys), - alfa_ap96_gpio_keys); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96", - alfa_ap96_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-nx.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-nx.c deleted file mode 100644 index a515f4f..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-nx.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * ALFA Network N2/N5 board support - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define ALFA_NX_GPIO_LED_2 17 -#define ALFA_NX_GPIO_LED_3 16 -#define ALFA_NX_GPIO_LED_5 12 -#define ALFA_NX_GPIO_LED_6 8 -#define ALFA_NX_GPIO_LED_7 6 -#define ALFA_NX_GPIO_LED_8 7 - -#define ALFA_NX_GPIO_BTN_RESET 11 - -#define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL) - -#define ALFA_NX_MAC0_OFFSET 0 -#define ALFA_NX_MAC1_OFFSET 6 -#define ALFA_NX_CALDATA_OFFSET 0x1000 - -static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALFA_NX_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct gpio_led alfa_nx_leds_gpio[] __initdata = { - { - .name = "alfa:green:led_2", - .gpio = ALFA_NX_GPIO_LED_2, - .active_low = 1, - }, { - .name = "alfa:green:led_3", - .gpio = ALFA_NX_GPIO_LED_3, - .active_low = 1, - }, { - .name = "alfa:red:led_5", - .gpio = ALFA_NX_GPIO_LED_5, - .active_low = 1, - }, { - .name = "alfa:amber:led_6", - .gpio = ALFA_NX_GPIO_LED_6, - .active_low = 1, - }, { - .name = "alfa:green:led_7", - .gpio = ALFA_NX_GPIO_LED_7, - .active_low = 1, - }, { - .name = "alfa:green:led_8", - .gpio = ALFA_NX_GPIO_LED_8, - .active_low = 1, - } -}; - -static void __init alfa_nx_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, - AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio), - alfa_nx_leds_gpio); - - ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL, - ARRAY_SIZE(alfa_nx_gpio_keys), - alfa_nx_gpio_keys); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, - art + ALFA_NX_MAC0_OFFSET, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, - art + ALFA_NX_MAC1_OFFSET, 0); - - /* WAN port */ - ath79_register_eth(0); - /* LAN port */ - ath79_register_eth(1); - - ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL); -} - -MIPS_MACHINE(ATH79_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5", - alfa_nx_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-all0258n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-all0258n.c deleted file mode 100644 index 2495bcb..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-all0258n.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * Allnet ALL0258N support - * - * Copyright (C) 2011 Daniel Golle <dgolle@allnet.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -/* found via /sys/gpio/... try and error */ -#define ALL0258N_GPIO_BTN_RESET 1 -#define ALL0258N_GPIO_LED_RSSIHIGH 13 -#define ALL0258N_GPIO_LED_RSSIMEDIUM 15 -#define ALL0258N_GPIO_LED_RSSILOW 14 - -/* defaults taken from others machs */ -#define ALL0258N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALL0258N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0258N_KEYS_POLL_INTERVAL) - -/* showed up in the original firmware's bootlog */ -#define ALL0258N_SEC_PHYMASK BIT(3) - -static struct gpio_led all0258n_leds_gpio[] __initdata = { - { - .name = "all0258n:green:rssihigh", - .gpio = ALL0258N_GPIO_LED_RSSIHIGH, - .active_low = 1, - }, { - .name = "all0258n:yellow:rssimedium", - .gpio = ALL0258N_GPIO_LED_RSSIMEDIUM, - .active_low = 1, - }, { - .name = "all0258n:red:rssilow", - .gpio = ALL0258N_GPIO_LED_RSSILOW, - .active_low = 1, - } -}; - -static struct gpio_keys_button all0258n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALL0258N_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALL0258N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init all0258n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f7f0000); - u8 *ee = (u8 *) KSEG1ADDR(0x1f7f1000); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(all0258n_leds_gpio), - all0258n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, ALL0258N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(all0258n_gpio_keys), - all0258n_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - - ath79_eth1_data.phy_mask = ALL0258N_SEC_PHYMASK; - - ath79_register_mdio(0, 0x0); - - ath79_register_eth(0); - ath79_register_eth(1); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_ALL0258N, "ALL0258N", "Allnet ALL0258N", - all0258n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-all0315n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-all0315n.c deleted file mode 100644 index 387ee7f..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-all0315n.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Allnet ALL0315N support - * - * Copyright (C) 2012 Daniel Golle <dgolle@allnet.de> - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-m25p80.h" -#include "dev-leds-gpio.h" -#include "machtypes.h" -#include "pci.h" - -#define ALL0315N_GPIO_BTN_RESET 0 -#define ALL0315N_GPIO_LED_RSSIHIGH 14 -#define ALL0315N_GPIO_LED_RSSIMEDIUM 15 -#define ALL0315N_GPIO_LED_RSSILOW 16 - -#define ALL0315N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALL0315N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0315N_KEYS_POLL_INTERVAL) - -static struct gpio_led all0315n_leds_gpio[] __initdata = { - { - .name = "all0315n:green:rssihigh", - .gpio = ALL0315N_GPIO_LED_RSSIHIGH, - .active_low = 1, - }, { - .name = "all0315n:yellow:rssimedium", - .gpio = ALL0315N_GPIO_LED_RSSIMEDIUM, - .active_low = 1, - }, { - .name = "all0315n:red:rssilow", - .gpio = ALL0315N_GPIO_LED_RSSILOW, - .active_low = 1, - } -}; - -static struct gpio_keys_button all0315n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALL0315N_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALL0315N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init all0315n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1ffc0000); - u8 *ee = (u8 *) KSEG1ADDR(0x1ffc1000); - - ath79_register_m25p80(NULL); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(all0315n_leds_gpio), - all0315n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, ALL0315N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(all0315n_gpio_keys), - all0315n_gpio_keys); - - ap9x_pci_setup_wmac_led_pin(0, 1); - ap91_pci_init(ee, NULL); -} - -MIPS_MACHINE(ATH79_MACH_ALL0315N, "ALL0315N", "Allnet ALL0315N", - all0315n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap113.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap113.c deleted file mode 100644 index 9b38faa..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap113.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Atheros AP113 board support - * - * Copyright (C) 2011 Florian Fainelli <florian@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "pci.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define AP113_GPIO_LED_USB 0 -#define AP113_GPIO_LED_STATUS 1 -#define AP113_GPIO_LED_ST 11 - -#define AP113_GPIO_BTN_JUMPSTART 12 - -#define AP113_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP113_KEYS_DEBOUNCE_INTERVAL (3 * AP113_KEYS_POLL_INTERVAL) - -static struct gpio_led ap113_leds_gpio[] __initdata = { - { - .name = "ap113:green:usb", - .gpio = AP113_GPIO_LED_USB, - .active_low = 1, - }, - { - .name = "ap113:green:status", - .gpio = AP113_GPIO_LED_STATUS, - .active_low = 1, - }, - { - .name = "ap113:green:st", - .gpio = AP113_GPIO_LED_ST, - .active_low = 1, - } -}; - -static struct gpio_keys_button ap113_gpio_keys[] __initdata = { - { - .desc = "jumpstart button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP113_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP113_GPIO_BTN_JUMPSTART, - .active_low = 1, - }, -}; - -static void __init ap113_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(NULL); - - ath79_register_mdio(0, ~BIT(0)); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_eth(0); - - ath79_register_gpio_keys_polled(-1, AP113_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap113_gpio_keys), - ap113_gpio_keys); - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap113_leds_gpio), - ap113_leds_gpio); - - ath79_register_pci(); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_AP113, "AP113", "Atheros AP113", - ap113_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap132.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap132.c deleted file mode 100644 index 86fd8bd..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap132.c +++ /dev/null @@ -1,189 +0,0 @@ -/* - * Atheros AP132 reference board support - * - * Copyright (c) 2012 Qualcomm Atheros - * Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (c) 2013 Embedded Wireless GmbH <info@embeddedwireless.de> - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include <linux/platform_device.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-eth.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define AP132_GPIO_LED_USB 4 -#define AP132_GPIO_LED_WLAN_5G 12 -#define AP132_GPIO_LED_WLAN_2G 13 -#define AP132_GPIO_LED_STATUS_RED 14 -#define AP132_GPIO_LED_WPS_RED 15 - -#define AP132_GPIO_BTN_WPS 16 - -#define AP132_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP132_KEYS_DEBOUNCE_INTERVAL (3 * AP132_KEYS_POLL_INTERVAL) - -#define AP132_MAC0_OFFSET 0 -#define AP132_WMAC_CALDATA_OFFSET 0x1000 - -static struct gpio_led ap132_leds_gpio[] __initdata = { - { - .name = "ap132:red:status", - .gpio = AP132_GPIO_LED_STATUS_RED, - .active_low = 1, - }, - { - .name = "ap132:red:wps", - .gpio = AP132_GPIO_LED_WPS_RED, - .active_low = 1, - }, - { - .name = "ap132:red:wlan-2g", - .gpio = AP132_GPIO_LED_WLAN_2G, - .active_low = 1, - }, - { - .name = "ap132:red:usb", - .gpio = AP132_GPIO_LED_USB, - .active_low = 1, - } -}; - -static struct gpio_keys_button ap132_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP132_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP132_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -static struct ar8327_pad_cfg ap132_ar8327_pad0_cfg; - -static struct ar8327_platform_data ap132_ar8327_data = { - .pad0_cfg = &ap132_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, -}; - -static struct mdio_board_info ap132_mdio1_info[] = { - { - .bus_id = "ag71xx-mdio.1", - .phy_addr = 0, - .platform_data = &ap132_ar8327_data, - }, -}; - -static void __init ap132_mdio_setup(void) -{ - void __iomem *base; - u32 t; - -#define GPIO_IN_ENABLE3_ADDRESS 0x0050 -#define GPIO_IN_ENABLE3_MII_GE1_MDI_MASK 0x00ff0000 -#define GPIO_IN_ENABLE3_MII_GE1_MDI_LSB 16 -#define GPIO_IN_ENABLE3_MII_GE1_MDI_SET(x) (((x) << GPIO_IN_ENABLE3_MII_GE1_MDI_LSB) & GPIO_IN_ENABLE3_MII_GE1_MDI_MASK) -#define GPIO_OUT_FUNCTION4_ADDRESS 0x003c -#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK 0xff000000 -#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB 24 -#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK) -#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK 0x0000ff00 -#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB 8 -#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK) - - base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE); - - t = __raw_readl(base + GPIO_IN_ENABLE3_ADDRESS); - t &= ~GPIO_IN_ENABLE3_MII_GE1_MDI_MASK; - t |= GPIO_IN_ENABLE3_MII_GE1_MDI_SET(19); - __raw_writel(t, base + GPIO_IN_ENABLE3_ADDRESS); - - - __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 19), base + AR71XX_GPIO_REG_OE); - - __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 17), base + AR71XX_GPIO_REG_OE); - - - t = __raw_readl(base + GPIO_OUT_FUNCTION4_ADDRESS); - t &= ~(GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK); - t |= GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(0x20) | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(0x21); - __raw_writel(t, base + GPIO_OUT_FUNCTION4_ADDRESS); - - iounmap(base); - -} - -static void __init ap132_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap132_leds_gpio), - ap132_leds_gpio); - ath79_register_gpio_keys_polled(-1, AP132_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap132_gpio_keys), - ap132_gpio_keys); - - ath79_register_usb(); - - ath79_register_wmac(art + AP132_WMAC_CALDATA_OFFSET, NULL); - - /* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */ - ap132_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII; - ap132_ar8327_pad0_cfg.sgmii_delay_en = true; - - ath79_eth1_pll_data.pll_1000 = 0x03000101; - - ap132_mdio_setup(); - - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth1_data.mac_addr, art + AP132_MAC0_OFFSET, 0); - - mdiobus_register_board_info(ap132_mdio1_info, - ARRAY_SIZE(ap132_mdio1_info)); - - /* GMAC1 is connected to the SGMII interface */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - ath79_eth1_data.phy_mask = BIT(0); - ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev; - - ath79_register_eth(1); -} - -MIPS_MACHINE(ATH79_MACH_AP132, "AP132", - "Atheros AP132 reference board", - ap132_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap83.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap83.c deleted file mode 100644 index 8519a9d..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap83.c +++ /dev/null @@ -1,275 +0,0 @@ -/* - * Atheros AP83 board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> -#include <linux/spi/vsc7385.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define AP83_GPIO_LED_WLAN 6 -#define AP83_GPIO_LED_POWER 14 -#define AP83_GPIO_LED_JUMPSTART 15 -#define AP83_GPIO_BTN_JUMPSTART 12 -#define AP83_GPIO_BTN_RESET 21 - -#define AP83_050_GPIO_VSC7385_CS 1 -#define AP83_050_GPIO_VSC7385_MISO 3 -#define AP83_050_GPIO_VSC7385_MOSI 16 -#define AP83_050_GPIO_VSC7385_SCK 17 - -#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL) - -static struct mtd_partition ap83_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x060000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x1a0000, - .size = 0x650000, - }, { - .name = "art", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x060000, - .size = 0x790000, - } -}; - -static struct physmap_flash_data ap83_flash_data = { - .width = 2, - .parts = ap83_flash_partitions, - .nr_parts = ARRAY_SIZE(ap83_flash_partitions), -}; - -static struct resource ap83_flash_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ap83_flash_device = { - .name = "ar91xx-flash", - .id = -1, - .resource = ap83_flash_resources, - .num_resources = ARRAY_SIZE(ap83_flash_resources), - .dev = { - .platform_data = &ap83_flash_data, - } -}; - -static struct gpio_led ap83_leds_gpio[] __initdata = { - { - .name = "ap83:green:jumpstart", - .gpio = AP83_GPIO_LED_JUMPSTART, - .active_low = 0, - }, { - .name = "ap83:green:power", - .gpio = AP83_GPIO_LED_POWER, - .active_low = 0, - }, { - .name = "ap83:green:wlan", - .gpio = AP83_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button ap83_gpio_keys[] __initdata = { - { - .desc = "soft_reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP83_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "jumpstart", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP83_GPIO_BTN_JUMPSTART, - .active_low = 1, - } -}; - -static struct resource ap83_040_spi_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ap83_040_spi_device = { - .name = "ap83-spi", - .id = 0, - .resource = ap83_040_spi_resources, - .num_resources = ARRAY_SIZE(ap83_040_spi_resources), -}; - -static struct spi_gpio_platform_data ap83_050_spi_data = { - .miso = AP83_050_GPIO_VSC7385_MISO, - .mosi = AP83_050_GPIO_VSC7385_MOSI, - .sck = AP83_050_GPIO_VSC7385_SCK, - .num_chipselect = 1, -}; - -static struct platform_device ap83_050_spi_device = { - .name = "spi_gpio", - .id = 0, - .dev = { - .platform_data = &ap83_050_spi_data, - } -}; - -static void ap83_vsc7385_reset(void) -{ - ath79_device_reset_set(AR71XX_RESET_GE1_PHY); - udelay(10); - ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); - mdelay(50); -} - -static struct vsc7385_platform_data ap83_vsc7385_data = { - .reset = ap83_vsc7385_reset, - .ucode_name = "vsc7385_ucode_ap83.bin", - .mac_cfg = { - .tx_ipg = 6, - .bit2 = 0, - .clk_sel = 3, - }, -}; - -static struct spi_board_info ap83_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "spi-vsc7385", - .platform_data = &ap83_vsc7385_data, - .controller_data = (void *) AP83_050_GPIO_VSC7385_CS, - } -}; - -static void __init ap83_generic_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, 0xfffffffe); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = 0x1; - - ath79_register_eth(0); - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_eth1_pll_data.pll_1000 = 0x1f000000; - - ath79_register_eth(1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio), - ap83_leds_gpio); - - ath79_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap83_gpio_keys), - ap83_gpio_keys); - - ath79_register_usb(); - - ath79_register_wmac(eeprom, NULL); - - platform_device_register(&ap83_flash_device); - - spi_register_board_info(ap83_spi_info, ARRAY_SIZE(ap83_spi_info)); -} - -static void ap83_040_flash_lock(struct platform_device *pdev) -{ - ath79_flash_acquire(); -} - -static void ap83_040_flash_unlock(struct platform_device *pdev) -{ - ath79_flash_release(); -} - -static void __init ap83_040_setup(void) -{ - ap83_flash_data.lock = ap83_040_flash_lock; - ap83_flash_data.unlock = ap83_040_flash_unlock; - ap83_generic_setup(); - platform_device_register(&ap83_040_spi_device); -} - -static void __init ap83_050_setup(void) -{ - ap83_generic_setup(); - platform_device_register(&ap83_050_spi_device); -} - -static void __init ap83_setup(void) -{ - u8 *board_id = (u8 *) KSEG1ADDR(0x1fff1244); - unsigned int board_version; - - board_version = (unsigned int)(board_id[0] - '0'); - board_version += ((unsigned int)(board_id[1] - '0')) * 10; - - switch (board_version) { - case 40: - ap83_040_setup(); - break; - case 50: - ap83_050_setup(); - break; - default: - printk(KERN_WARNING "AP83-%03u board is not yet supported\n", - board_version); - } -} - -MIPS_MACHINE(ATH79_MACH_AP83, "AP83", "Atheros AP83", ap83_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap96.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap96.c deleted file mode 100644 index 35120d3..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap96.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Atheros AP96 board support - * - * Copyright (C) 2009 Marco Porsch - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2010 Atheros Communications - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define AP96_GPIO_LED_12_GREEN 0 -#define AP96_GPIO_LED_3_GREEN 1 -#define AP96_GPIO_LED_2_GREEN 2 -#define AP96_GPIO_LED_WPS_GREEN 4 -#define AP96_GPIO_LED_5_GREEN 5 -#define AP96_GPIO_LED_4_ORANGE 6 - -/* Reset button - next to the power connector */ -#define AP96_GPIO_BTN_RESET 3 -/* WPS button - next to a led on right */ -#define AP96_GPIO_BTN_WPS 8 - -#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL) - -#define AP96_WMAC0_MAC_OFFSET 0x120c -#define AP96_WMAC1_MAC_OFFSET 0x520c -#define AP96_CALDATA0_OFFSET 0x1000 -#define AP96_CALDATA1_OFFSET 0x5000 - -/* - * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12 - * below (from left to right on the board). Led 1 seems to be on whenever the - * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange; - * others are green. - * - * In addition, there is one led next to a button on the right side for WPS. - */ -static struct gpio_led ap96_leds_gpio[] __initdata = { - { - .name = "ap96:green:led2", - .gpio = AP96_GPIO_LED_2_GREEN, - .active_low = 1, - }, { - .name = "ap96:green:led3", - .gpio = AP96_GPIO_LED_3_GREEN, - .active_low = 1, - }, { - .name = "ap96:orange:led4", - .gpio = AP96_GPIO_LED_4_ORANGE, - .active_low = 1, - }, { - .name = "ap96:green:led5", - .gpio = AP96_GPIO_LED_5_GREEN, - .active_low = 1, - }, { - .name = "ap96:green:led12", - .gpio = AP96_GPIO_LED_12_GREEN, - .active_low = 1, - }, { /* next to a button on right */ - .name = "ap96:green:wps", - .gpio = AP96_GPIO_LED_WPS_GREEN, - .active_low = 1, - } -}; - -static struct gpio_keys_button ap96_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP96_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP96_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -#define AP96_WAN_PHYMASK 0x10 -#define AP96_LAN_PHYMASK 0x0f - -static void __init ap96_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK)); - - ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - - ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK; - - ath79_eth1_pll_data.pll_1000 = 0x1f000000; - - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio), - ap96_leds_gpio); - - ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap96_gpio_keys), - ap96_gpio_keys); - - ap94_pci_init(art + AP96_CALDATA0_OFFSET, - art + AP96_WMAC0_MAC_OFFSET, - art + AP96_CALDATA1_OFFSET, - art + AP96_WMAC1_MAC_OFFSET); -} - -MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c deleted file mode 100644 index fc12513..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c +++ /dev/null @@ -1,266 +0,0 @@ -/* - * TP-LINK Archer C5/C7/TL-WDR4900 v2 board support - * - * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org> - * Copyright (c) 2014 施康成 <tenninjas@tenninjas.ca> - * Copyright (c) 2014 Imre Kaloz <kaloz@openwrt.org> - * - * Based on the Qualcomm Atheros AP135/AP136 reference board support code - * Copyright (c) 2012 Qualcomm Atheros - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "pci.h" - -#define ARCHER_C7_GPIO_LED_WLAN2G 12 -#define ARCHER_C7_GPIO_LED_SYSTEM 14 -#define ARCHER_C7_GPIO_LED_QSS 15 -#define ARCHER_C7_GPIO_LED_WLAN5G 17 -#define ARCHER_C7_GPIO_LED_USB1 18 -#define ARCHER_C7_GPIO_LED_USB2 19 - -#define ARCHER_C7_GPIO_BTN_RFKILL 13 -#define ARCHER_C7_GPIO_BTN_RESET 16 - -#define ARCHER_C7_GPIO_USB1_POWER 22 -#define ARCHER_C7_GPIO_USB2_POWER 21 - -#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL) - -#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000 -#define ARCHER_C7_PCIE_CALDATA_OFFSET 0x5000 - -static const char *archer_c7_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data archer_c7_flash_data = { - .part_probes = archer_c7_part_probes, -}; - -static struct gpio_led archer_c7_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:qss", - .gpio = ARCHER_C7_GPIO_LED_QSS, - .active_low = 1, - }, - { - .name = "tp-link:blue:system", - .gpio = ARCHER_C7_GPIO_LED_SYSTEM, - .active_low = 1, - }, - { - .name = "tp-link:blue:wlan2g", - .gpio = ARCHER_C7_GPIO_LED_WLAN2G, - .active_low = 1, - }, - { - .name = "tp-link:blue:wlan5g", - .gpio = ARCHER_C7_GPIO_LED_WLAN5G, - .active_low = 1, - }, - { - .name = "tp-link:green:usb1", - .gpio = ARCHER_C7_GPIO_LED_USB1, - .active_low = 1, - }, - { - .name = "tp-link:green:usb2", - .gpio = ARCHER_C7_GPIO_LED_USB2, - .active_low = 1, - }, -}; - -static struct gpio_keys_button archer_c7_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL, - .gpio = ARCHER_C7_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "RFKILL switch", - .type = EV_SW, - .code = KEY_RFKILL, - .debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL, - .gpio = ARCHER_C7_GPIO_BTN_RFKILL, - }, -}; - -static const struct ar8327_led_info archer_c7_leds_ar8327[] __initconst = { - AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), - AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), - AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), - AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"), - AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"), -}; - -/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ -static struct ar8327_pad_cfg archer_c7_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_SGMII, - .sgmii_delay_en = true, -}; - -/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ -static struct ar8327_pad_cfg archer_c7_ar8327_pad6_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_led_cfg archer_c7_ar8327_led_cfg = { - .led_ctrl0 = 0xc737c737, - .led_ctrl1 = 0x00000000, - .led_ctrl2 = 0x00000000, - .led_ctrl3 = 0x0030c300, - .open_drain = false, -}; - -static struct ar8327_platform_data archer_c7_ar8327_data = { - .pad0_cfg = &archer_c7_ar8327_pad0_cfg, - .pad6_cfg = &archer_c7_ar8327_pad6_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .port6_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &archer_c7_ar8327_led_cfg, - .num_leds = ARRAY_SIZE(archer_c7_leds_ar8327), - .leds = archer_c7_leds_ar8327, -}; - -static struct mdio_board_info archer_c7_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &archer_c7_ar8327_data, - }, -}; - -static void __init common_setup(bool pcie_slot) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(&archer_c7_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio), - archer_c7_leds_gpio); - ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL, - ARRAY_SIZE(archer_c7_gpio_keys), - archer_c7_gpio_keys); - - ath79_init_mac(tmpmac, mac, -1); - ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac); - - if (pcie_slot) { - ath79_register_pci(); - } else { - ath79_init_mac(tmpmac, mac, -1); - ap9x_pci_setup_wmac_led_pin(0, 0); - ap91_pci_init(art + ARCHER_C7_PCIE_CALDATA_OFFSET, tmpmac); - } - - mdiobus_register_board_info(archer_c7_mdio0_info, - ARRAY_SIZE(archer_c7_mdio0_info)); - ath79_register_mdio(0, 0x0); - - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - - /* GMAC0 is connected to the RMGII interface */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x56000000; - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_register_eth(0); - - /* GMAC1 is connected to the SGMII interface */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - ath79_eth1_pll_data.pll_1000 = 0x03000101; - - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - ath79_register_eth(1); - - gpio_request_one(ARCHER_C7_GPIO_USB1_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB1 power"); - gpio_request_one(ARCHER_C7_GPIO_USB2_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB2 power"); - ath79_register_usb(); -} - -static void __init archer_c5_setup(void) -{ - common_setup(true); -} - -MIPS_MACHINE(ATH79_MACH_ARCHER_C5, "ARCHER-C5", "TP-LINK Archer C5", - archer_c5_setup); - -static void __init archer_c7_setup(void) -{ - common_setup(true); -} - -MIPS_MACHINE(ATH79_MACH_ARCHER_C7, "ARCHER-C7", "TP-LINK Archer C7", - archer_c7_setup); - -static void __init tl_wdr4900_v2_setup(void) -{ - common_setup(false); -} - -MIPS_MACHINE(ATH79_MACH_TL_WDR4900_V2, "TL-WDR4900-v2", "TP-LINK TL-WDR4900 v2", - tl_wdr4900_v2_setup) - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-aw-nr580.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-aw-nr580.c deleted file mode 100644 index 281129b..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-aw-nr580.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * AzureWave AW-NR580 board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "machtypes.h" -#include "pci.h" - -#define AW_NR580_GPIO_LED_READY_RED 0 -#define AW_NR580_GPIO_LED_WLAN 1 -#define AW_NR580_GPIO_LED_READY_GREEN 2 -#define AW_NR580_GPIO_LED_WPS_GREEN 4 -#define AW_NR580_GPIO_LED_WPS_AMBER 5 - -#define AW_NR580_GPIO_BTN_WPS 3 -#define AW_NR580_GPIO_BTN_RESET 11 - -#define AW_NR580_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AW_NR580_KEYS_DEBOUNCE_INTERVAL (3 * AW_NR580_KEYS_POLL_INTERVAL) - -static struct gpio_led aw_nr580_leds_gpio[] __initdata = { - { - .name = "aw-nr580:red:ready", - .gpio = AW_NR580_GPIO_LED_READY_RED, - .active_low = 0, - }, { - .name = "aw-nr580:green:ready", - .gpio = AW_NR580_GPIO_LED_READY_GREEN, - .active_low = 0, - }, { - .name = "aw-nr580:green:wps", - .gpio = AW_NR580_GPIO_LED_WPS_GREEN, - .active_low = 0, - }, { - .name = "aw-nr580:amber:wps", - .gpio = AW_NR580_GPIO_LED_WPS_AMBER, - .active_low = 0, - }, { - .name = "aw-nr580:green:wlan", - .gpio = AW_NR580_GPIO_LED_WLAN, - .active_low = 0, - } -}; - -static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, - .gpio = AW_NR580_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, - .gpio = AW_NR580_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static const char *aw_nr580_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data aw_nr580_flash_data = { - .part_probes = aw_nr580_part_probes, -}; - -static void __init aw_nr580_setup(void) -{ - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - - ath79_register_pci(); - - ath79_register_m25p80(&aw_nr580_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio), - aw_nr580_leds_gpio); - - ath79_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL, - ARRAY_SIZE(aw_nr580_gpio_keys), - aw_nr580_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580", - aw_nr580_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-bhu-bxu2000n2-a.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-bhu-bxu2000n2-a.c deleted file mode 100644 index 8d7c611..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-bhu-bxu2000n2-a.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * BHU BXU2000n-2 A1 board support - * - * Copyright (C) 2013 Terry Yang <yangbo@bhunetworks.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define BHU_BXU2000N2_A1_GPIO_LED_WLAN 13 -#define BHU_BXU2000N2_A1_GPIO_LED_WAN 19 -#define BHU_BXU2000N2_A1_GPIO_LED_LAN 21 -#define BHU_BXU2000N2_A1_GPIO_LED_SYSTEM 14 - -#define BHU_BXU2000N2_A1_GPIO_BTN_RESET 17 - -#define BHU_BXU2000N2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL \ - (3 * BHU_BXU2000N2_KEYS_POLL_INTERVAL) - -static const char *bhu_bxu2000n2_part_probes[] = { - "cmdlinepart", - NULL, -}; - -static struct flash_platform_data bhu_bxu2000n2_flash_data = { - .part_probes = bhu_bxu2000n2_part_probes, -}; - -static struct gpio_led bhu_bxu2000n2_a1_leds_gpio[] __initdata = { - { - .name = "bhu:green:status", - .gpio = BHU_BXU2000N2_A1_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "bhu:green:lan", - .gpio = BHU_BXU2000N2_A1_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "bhu:green:wan", - .gpio = BHU_BXU2000N2_A1_GPIO_LED_WAN, - .active_low = 1, - }, { - .name = "bhu:green:wlan", - .gpio = BHU_BXU2000N2_A1_GPIO_LED_WLAN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button bhu_bxu2000n2_a1_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = BHU_BXU2000N2_KEYS_DEBOUNCE_INTERVAL, - .gpio = BHU_BXU2000N2_A1_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init bhu_ap123_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&bhu_bxu2000n2_flash_data); - - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - /* GMAC0 is connected to the PHY4 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(4); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(4); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - /* GMAC1 is connected to the internal switch. Only use PHY3 */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_eth1_data.phy_mask = BIT(3); - ath79_register_eth(1); - - ath79_register_wmac(ee, ee+2); -} - -static void __init bhu_bxu2000n2_a1_setup(void) -{ - bhu_ap123_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(bhu_bxu2000n2_a1_leds_gpio), - bhu_bxu2000n2_a1_leds_gpio); - - ath79_register_gpio_keys_polled(1, BHU_BXU2000N2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(bhu_bxu2000n2_a1_gpio_keys), - bhu_bxu2000n2_a1_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_BHU_BXU2000N2_A1, "BXU2000n-2-A1", - "BHU BXU2000n-2 rev. A1", - bhu_bxu2000n2_a1_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c deleted file mode 100644 index 18944c4..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-cap4200ag.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * Senao CAP4200AG board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define CAP4200AG_GPIO_LED_PWR_GREEN 12 -#define CAP4200AG_GPIO_LED_PWR_AMBER 13 -#define CAP4200AG_GPIO_LED_LAN_GREEN 14 -#define CAP4200AG_GPIO_LED_LAN_AMBER 15 -#define CAP4200AG_GPIO_LED_WLAN_GREEN 18 -#define CAP4200AG_GPIO_LED_WLAN_AMBER 19 - -#define CAP4200AG_GPIO_BTN_RESET 17 - -#define CAP4200AG_KEYS_POLL_INTERVAL 20 /* msecs */ -#define CAP4200AG_KEYS_DEBOUNCE_INTERVAL (3 * CAP4200AG_KEYS_POLL_INTERVAL) - -#define CAP4200AG_MAC_OFFSET 0 -#define CAP4200AG_WMAC_CALDATA_OFFSET 0x1000 -#define CAP4200AG_PCIE_CALDATA_OFFSET 0x5000 - -static struct gpio_led cap4200ag_leds_gpio[] __initdata = { - { - .name = "senao:green:pwr", - .gpio = CAP4200AG_GPIO_LED_PWR_GREEN, - .active_low = 1, - }, - { - .name = "senao:amber:pwr", - .gpio = CAP4200AG_GPIO_LED_PWR_AMBER, - .active_low = 1, - }, - { - .name = "senao:green:lan", - .gpio = CAP4200AG_GPIO_LED_LAN_GREEN, - .active_low = 1, - }, - { - .name = "senao:amber:lan", - .gpio = CAP4200AG_GPIO_LED_LAN_AMBER, - .active_low = 1, - }, - { - .name = "senao:green:wlan", - .gpio = CAP4200AG_GPIO_LED_WLAN_GREEN, - .active_low = 1, - }, - { - .name = "senao:amber:wlan", - .gpio = CAP4200AG_GPIO_LED_WLAN_AMBER, - .active_low = 1, - }, -}; - -static struct gpio_keys_button cap4200ag_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = CAP4200AG_KEYS_DEBOUNCE_INTERVAL, - .gpio = CAP4200AG_GPIO_BTN_RESET, - .active_low = 1, - }, -}; - -static void __init cap4200ag_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 mac[6]; - - ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_GREEN, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(CAP4200AG_GPIO_LED_LAN_AMBER, - AR934X_GPIO_OUT_GPIO); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(cap4200ag_leds_gpio), - cap4200ag_leds_gpio); - ath79_register_gpio_keys_polled(-1, CAP4200AG_KEYS_POLL_INTERVAL, - ARRAY_SIZE(cap4200ag_gpio_keys), - cap4200ag_gpio_keys); - - ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -1); - ath79_wmac_disable_2ghz(); - ath79_register_wmac(art + CAP4200AG_WMAC_CALDATA_OFFSET, mac); - - ath79_init_mac(mac, art + CAP4200AG_MAC_OFFSET, -2); - ap91_pci_init(art + CAP4200AG_PCIE_CALDATA_OFFSET, mac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, - art + CAP4200AG_MAC_OFFSET, -2); - - /* GMAC0 is connected to an external PHY */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - ath79_register_eth(0); -} - -MIPS_MACHINE(ATH79_MACH_CAP4200AG, "CAP4200AG", "Senao CAP4200AG", - cap4200ag_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-carambola2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-carambola2.c deleted file mode 100644 index babe101..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-carambola2.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * 8devices Carambola2 board support - * - * Copyright (C) 2013 Darius Augulis <darius@8devices.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define CARAMBOLA2_GPIO_LED_WLAN 0 -#define CARAMBOLA2_GPIO_LED_ETH0 14 -#define CARAMBOLA2_GPIO_LED_ETH1 13 - -#define CARAMBOLA2_GPIO_BTN_JUMPSTART 11 - -#define CARAMBOLA2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL (3 * CARAMBOLA2_KEYS_POLL_INTERVAL) - -#define CARAMBOLA2_MAC0_OFFSET 0x0000 -#define CARAMBOLA2_MAC1_OFFSET 0x0006 -#define CARAMBOLA2_CALDATA_OFFSET 0x1000 -#define CARAMBOLA2_WMAC_MAC_OFFSET 0x1002 - -static struct gpio_led carambola2_leds_gpio[] __initdata = { - { - .name = "carambola2:green:wlan", - .gpio = CARAMBOLA2_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "carambola2:orange:eth0", - .gpio = CARAMBOLA2_GPIO_LED_ETH0, - .active_low = 0, - }, { - .name = "carambola2:orange:eth1", - .gpio = CARAMBOLA2_GPIO_LED_ETH1, - .active_low = 0, - } -}; - -static struct gpio_keys_button carambola2_gpio_keys[] __initdata = { - { - .desc = "jumpstart button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = CARAMBOLA2_KEYS_DEBOUNCE_INTERVAL, - .gpio = CARAMBOLA2_GPIO_BTN_JUMPSTART, - .active_low = 1, - }, -}; - -static void __init carambola2_common_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(NULL); - ath79_register_wmac(art + CARAMBOLA2_CALDATA_OFFSET, - art + CARAMBOLA2_WMAC_MAC_OFFSET); - - ath79_setup_ar933x_phy4_switch(true, true); - - ath79_init_mac(ath79_eth0_data.mac_addr, art + CARAMBOLA2_MAC0_OFFSET, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, art + CARAMBOLA2_MAC1_OFFSET, 0); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); -} - -static void __init carambola2_setup(void) -{ - carambola2_common_setup(); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(carambola2_leds_gpio), - carambola2_leds_gpio); - ath79_register_gpio_keys_polled(-1, CARAMBOLA2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(carambola2_gpio_keys), - carambola2_gpio_keys); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_CARAMBOLA2, "CARAMBOLA2", "8devices Carambola2 board", - carambola2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-505-a1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-505-a1.c deleted file mode 100644 index d391465..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-505-a1.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * DLink DIR-505 A1 board support - * - * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define DIR_505A1_GPIO_BTN_WPS 11 /* verify */ -#define DIR_505A1_GPIO_BTN_RESET 12 /* verify */ - -#define DIR_505A1_GPIO_LED_RED 26 /* unused, fyi */ -#define DIR_505A1_GPIO_LED_GREEN 27 - -#define DIR_505A1_GPIO_WAN_LED_ENABLE 1 - -#define DIR_505A1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR_505A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_505A1_KEYS_POLL_INTERVAL) - -#define DIR_505A1_ART_ADDRESS 0x1f010000 -#define DIR_505A1_CALDATA_OFFSET 0x1000 - -#define DIR_505A1_MAC_PART_ADDRESS 0x1f020000 -#define DIR_505A1_LAN_MAC_OFFSET 0x04 -#define DIR_505A1_WAN_MAC_OFFSET 0x16 - -static struct gpio_led dir_505_a1_leds_gpio[] __initdata = { - { - .name = "d-link:green:power", - .gpio = DIR_505A1_GPIO_LED_GREEN, - .active_low = 1, - }, { - .name = "d-link:red:status", - .gpio = DIR_505A1_GPIO_LED_RED, - .active_low = 1, - }, -}; - -static struct gpio_keys_button dir_505_a1_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_505A1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR_505A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_505A1_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init dir_505_a1_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(DIR_505A1_ART_ADDRESS); - u8 *mac = (u8 *) KSEG1ADDR(DIR_505A1_MAC_PART_ADDRESS); - u8 lan_mac[ETH_ALEN]; - u8 wan_mac[ETH_ALEN]; - - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - gpio_request_one(DIR_505A1_GPIO_WAN_LED_ENABLE, - GPIOF_OUT_INIT_LOW, "WAN LED enable"); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_505_a1_leds_gpio), - dir_505_a1_leds_gpio); - - ath79_register_gpio_keys_polled(1, DIR_505A1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir_505_a1_gpio_keys), - dir_505_a1_gpio_keys); - - ath79_register_m25p80(NULL); - - ath79_register_usb(); - - ath79_parse_ascii_mac(mac + DIR_505A1_LAN_MAC_OFFSET, lan_mac); - ath79_parse_ascii_mac(mac + DIR_505A1_WAN_MAC_OFFSET, wan_mac); - - ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(art + DIR_505A1_CALDATA_OFFSET, lan_mac); -} - -MIPS_MACHINE(ATH79_MACH_DIR_505_A1, "DIR-505-A1", - "D-Link DIR-505 rev. A1", dir_505_a1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-600-a1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-600-a1.c deleted file mode 100644 index 321fdce..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-600-a1.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * D-Link DIR-600 rev. A1 board support - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2012 Vadim Girlin <vadimgirlin@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" -#include "nvram.h" - -#define DIR_600_A1_GPIO_LED_WPS 0 -#define DIR_600_A1_GPIO_LED_POWER_AMBER 1 -#define DIR_600_A1_GPIO_LED_POWER_GREEN 6 -#define DIR_600_A1_GPIO_LED_LAN1 13 -#define DIR_600_A1_GPIO_LED_LAN2 14 -#define DIR_600_A1_GPIO_LED_LAN3 15 -#define DIR_600_A1_GPIO_LED_LAN4 16 -#define DIR_600_A1_GPIO_LED_WAN_AMBER 7 -#define DIR_600_A1_GPIO_LED_WAN_GREEN 17 - -#define DIR_600_A1_GPIO_BTN_RESET 8 -#define DIR_600_A1_GPIO_BTN_WPS 12 - -#define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL) - -#define DIR_600_A1_NVRAM_ADDR 0x1f030000 -#define DIR_600_A1_NVRAM_SIZE 0x10000 - -static struct gpio_led dir_600_a1_leds_gpio[] __initdata = { - { - .name = "d-link:green:power", - .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN, - }, { - .name = "d-link:amber:power", - .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER, - }, { - .name = "d-link:amber:wan", - .gpio = DIR_600_A1_GPIO_LED_WAN_AMBER, - }, { - .name = "d-link:green:wan", - .gpio = DIR_600_A1_GPIO_LED_WAN_GREEN, - .active_low = 1, - }, { - .name = "d-link:green:lan1", - .gpio = DIR_600_A1_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "d-link:green:lan2", - .gpio = DIR_600_A1_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "d-link:green:lan3", - .gpio = DIR_600_A1_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "d-link:green:lan4", - .gpio = DIR_600_A1_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "d-link:blue:wps", - .gpio = DIR_600_A1_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_600_A1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_600_A1_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init dir_600_a1_setup(void) -{ - const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac_buff[6]; - u8 *mac = NULL; - - if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, - "lan_mac=", mac_buff) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1); - mac = mac_buff; - } - - ath79_register_m25p80(NULL); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio), - dir_600_a1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir_600_a1_gpio_keys), - dir_600_a1_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1", - dir_600_a1_setup); - -static void __init dir_615_e1_setup(void) -{ - dir_600_a1_setup(); -} - -MIPS_MACHINE(ATH79_MACH_DIR_615_E1, "DIR-615-E1", "D-Link DIR-615 rev. E1", - dir_615_e1_setup); - -static void __init dir_615_e4_setup(void) -{ - dir_600_a1_setup(); - ap9x_pci_setup_wmac_led_pin(0, 1); -} - -MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4", - dir_615_e4_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-615-c1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-615-c1.c deleted file mode 100644 index 425be30..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-615-c1.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * D-Link DIR-615 rev C1 board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define DIR_615C1_GPIO_LED_ORANGE_STATUS 1 /* ORANGE:STATUS:TRICOLOR */ -#define DIR_615C1_GPIO_LED_BLUE_WPS 3 /* BLUE:WPS */ -#define DIR_615C1_GPIO_LED_GREEN_WAN 4 /* GREEN:WAN:TRICOLOR */ -#define DIR_615C1_GPIO_LED_GREEN_WANCPU 5 /* GREEN:WAN:CPU:TRICOLOR */ -#define DIR_615C1_GPIO_LED_GREEN_WLAN 6 /* GREEN:WLAN */ -#define DIR_615C1_GPIO_LED_GREEN_STATUS 14 /* GREEN:STATUS:TRICOLOR */ -#define DIR_615C1_GPIO_LED_ORANGE_WAN 15 /* ORANGE:WAN:TRICOLOR */ - -/* buttons may need refinement */ - -#define DIR_615C1_GPIO_BTN_WPS 12 -#define DIR_615C1_GPIO_BTN_RESET 21 - -#define DIR_615C1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL) - -#define DIR_615C1_CONFIG_ADDR 0x1f020000 -#define DIR_615C1_CONFIG_SIZE 0x10000 - -static struct gpio_led dir_615c1_leds_gpio[] __initdata = { - { - .name = "d-link:orange:status", - .gpio = DIR_615C1_GPIO_LED_ORANGE_STATUS, - .active_low = 1, - }, { - .name = "d-link:blue:wps", - .gpio = DIR_615C1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, { - .name = "d-link:green:wan", - .gpio = DIR_615C1_GPIO_LED_GREEN_WAN, - .active_low = 1, - }, { - .name = "d-link:green:wancpu", - .gpio = DIR_615C1_GPIO_LED_GREEN_WANCPU, - .active_low = 1, - }, { - .name = "d-link:green:wlan", - .gpio = DIR_615C1_GPIO_LED_GREEN_WLAN, - .active_low = 1, - }, { - .name = "d-link:green:status", - .gpio = DIR_615C1_GPIO_LED_GREEN_STATUS, - .active_low = 1, - }, { - .name = "d-link:orange:wan", - .gpio = DIR_615C1_GPIO_LED_ORANGE_WAN, - .active_low = 1, - } - -}; - -static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_615C1_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_615C1_GPIO_BTN_WPS, - } -}; - -#define DIR_615C1_LAN_PHYMASK BIT(0) -#define DIR_615C1_WAN_PHYMASK BIT(4) -#define DIR_615C1_MDIO_MASK (~(DIR_615C1_LAN_PHYMASK | \ - DIR_615C1_WAN_PHYMASK)) - -static void __init dir_615c1_setup(void) -{ - const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - u8 *wlan_mac = NULL; - - if (ath79_nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE, - "lan_mac=", mac) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - wlan_mac = mac; - } - - ath79_register_mdio(0, DIR_615C1_MDIO_MASK); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio), - dir_615c1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir_615c1_gpio_keys), - dir_615c1_gpio_keys); - - ath79_register_wmac(eeprom, wlan_mac); -} - -MIPS_MACHINE(ATH79_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1", - dir_615c1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c deleted file mode 100644 index 9b82990..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c +++ /dev/null @@ -1,191 +0,0 @@ -/* - * D-Link DIR-825 rev. B1 board support - * - * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o. - * - * based on mach-wndr3700.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/rtl8366.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define DIR825B1_GPIO_LED_BLUE_USB 0 -#define DIR825B1_GPIO_LED_ORANGE_POWER 1 -#define DIR825B1_GPIO_LED_BLUE_POWER 2 -#define DIR825B1_GPIO_LED_BLUE_WPS 4 -#define DIR825B1_GPIO_LED_ORANGE_PLANET 6 -#define DIR825B1_GPIO_LED_BLUE_PLANET 11 - -#define DIR825B1_GPIO_BTN_RESET 3 -#define DIR825B1_GPIO_BTN_WPS 8 - -#define DIR825B1_GPIO_RTL8366_SDA 5 -#define DIR825B1_GPIO_RTL8366_SCK 7 - -#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL) - -#define DIR825B1_CAL0_OFFSET 0x1000 -#define DIR825B1_CAL1_OFFSET 0x5000 -#define DIR825B1_MAC0_OFFSET 0xffa0 -#define DIR825B1_MAC1_OFFSET 0xffb4 - -#define DIR825B1_CAL_LOCATION_0 0x1f660000 -#define DIR825B1_CAL_LOCATION_1 0x1f7f0000 - -static struct gpio_led dir825b1_leds_gpio[] __initdata = { - { - .name = "d-link:blue:usb", - .gpio = DIR825B1_GPIO_LED_BLUE_USB, - .active_low = 1, - }, { - .name = "d-link:orange:power", - .gpio = DIR825B1_GPIO_LED_ORANGE_POWER, - .active_low = 1, - }, { - .name = "d-link:blue:power", - .gpio = DIR825B1_GPIO_LED_BLUE_POWER, - .active_low = 1, - }, { - .name = "d-link:blue:wps", - .gpio = DIR825B1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, { - .name = "d-link:orange:planet", - .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET, - .active_low = 1, - }, { - .name = "d-link:blue:planet", - .gpio = DIR825B1_GPIO_LED_BLUE_PLANET, - .active_low = 1, - } -}; - -static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825B1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825B1_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = { - { .reg = 0x06, .val = 0x0108 }, -}; - -static struct rtl8366_platform_data dir825b1_rtl8366s_data = { - .gpio_sda = DIR825B1_GPIO_RTL8366_SDA, - .gpio_sck = DIR825B1_GPIO_RTL8366_SCK, - .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals), - .initvals = dir825b1_rtl8366s_initvals, -}; - -static struct platform_device dir825b1_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &dir825b1_rtl8366s_data, - } -}; - -static bool __init dir825b1_is_caldata_valid(u8 *p) -{ - u16 *magic0, *magic1; - - magic0 = (u16 *)(p + DIR825B1_CAL0_OFFSET); - magic1 = (u16 *)(p + DIR825B1_CAL1_OFFSET); - - return (*magic0 == 0xa55a && *magic1 == 0xa55a); -} - -static void __init dir825b1_wlan_init(void) -{ - u8 *caldata; - u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; - u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; - - caldata = (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0); - if (!dir825b1_is_caldata_valid(caldata)) { - caldata = (u8 *)KSEG1ADDR(DIR825B1_CAL_LOCATION_1); - if (!dir825b1_is_caldata_valid(caldata)) { - pr_err("no calibration data found\n"); - return; - } - } - - ath79_parse_ascii_mac(caldata + DIR825B1_MAC0_OFFSET, mac0); - ath79_parse_ascii_mac(caldata + DIR825B1_MAC1_OFFSET, mac1); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 0); - ath79_init_mac(wmac0, mac0, 0); - ath79_init_mac(wmac1, mac1, 1); - - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_led_pin(1, 5); - - ap94_pci_init(caldata + DIR825B1_CAL0_OFFSET, wmac0, - caldata + DIR825B1_CAL1_OFFSET, wmac1); -} - -static void __init dir825b1_setup(void) -{ - dir825b1_wlan_init(); - - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x11110000; - - ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - ath79_eth1_pll_data.pll_1000 = 0x11110000; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio), - dir825b1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir825b1_gpio_keys), - dir825b1_gpio_keys); - - ath79_register_usb(); - - platform_device_register(&dir825b1_rtl8366s_device); -} - -MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1", - dir825b1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-c1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-c1.c deleted file mode 100644 index 9c4c1a8..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-c1.c +++ /dev/null @@ -1,241 +0,0 @@ -/* - * D-Link DIR-825 rev. C1 board support - * - * Copyright (C) 2013 Alexander Stadler - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define DIR825C1_GPIO_LED_BLUE_USB 11 -#define DIR825C1_GPIO_LED_AMBER_POWER 14 -#define DIR825C1_GPIO_LED_BLUE_POWER 22 -#define DIR825C1_GPIO_LED_BLUE_WPS 15 -#define DIR825C1_GPIO_LED_AMBER_PLANET 19 -#define DIR825C1_GPIO_LED_BLUE_PLANET 18 -#define DIR825C1_GPIO_LED_WLAN_2G 13 - -#define DIR825C1_GPIO_WAN_LED_ENABLE 20 - -#define DIR825C1_GPIO_BTN_RESET 17 -#define DIR825C1_GPIO_BTN_WPS 16 - -#define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL) - -#define DIR825C1_MAC0_OFFSET 0x4 -#define DIR825C1_MAC1_OFFSET 0x18 -#define DIR825C1_WMAC_CALDATA_OFFSET 0x1000 -#define DIR825C1_PCIE_CALDATA_OFFSET 0x5000 - -static struct gpio_led dir825c1_leds_gpio[] __initdata = { - { - .name = "d-link:blue:usb", - .gpio = DIR825C1_GPIO_LED_BLUE_USB, - .active_low = 1, - }, - { - .name = "d-link:amber:power", - .gpio = DIR825C1_GPIO_LED_AMBER_POWER, - .active_low = 1, - }, - { - .name = "d-link:blue:power", - .gpio = DIR825C1_GPIO_LED_BLUE_POWER, - .active_low = 1, - }, - { - .name = "d-link:blue:wps", - .gpio = DIR825C1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, - { - .name = "d-link:amber:planet", - .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, - .active_low = 1, - }, - { - .name = "d-link:blue:wlan2g", - .gpio = DIR825C1_GPIO_LED_WLAN_2G, - .active_low = 1, - }, -}; - -static struct gpio_led dir835a1_leds_gpio[] __initdata = { - { - .name = "d-link:amber:power", - .gpio = DIR825C1_GPIO_LED_AMBER_POWER, - .active_low = 1, - }, - { - .name = "d-link:green:power", - .gpio = DIR825C1_GPIO_LED_BLUE_POWER, - .active_low = 1, - }, - { - .name = "d-link:blue:wps", - .gpio = DIR825C1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, - { - .name = "d-link:amber:planet", - .gpio = DIR825C1_GPIO_LED_AMBER_PLANET, - .active_low = 1, - }, - { - .name = "d-link:green:planet", - .gpio = DIR825C1_GPIO_LED_BLUE_PLANET, - .active_low = 1, - }, -}; - -static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = { - { - .desc = "Soft reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825C1_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825C1_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = { - .led_ctrl0 = 0x00000000, - .led_ctrl1 = 0xc737c737, - .led_ctrl2 = 0x00000000, - .led_ctrl3 = 0x00c30c00, - .open_drain = true, -}; - -static struct ar8327_platform_data dir825c1_ar8327_data = { - .pad0_cfg = &dir825c1_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &dir825c1_ar8327_led_cfg, -}; - -static struct mdio_board_info dir825c1_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &dir825c1_ar8327_data, - }, -}; - -static void __init dir825c1_generic_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 mac0[ETH_ALEN], mac1[ETH_ALEN]; - u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN]; - - ath79_parse_ascii_mac(mac + DIR825C1_MAC0_OFFSET, mac0); - ath79_parse_ascii_mac(mac + DIR825C1_MAC1_OFFSET, mac1); - - ath79_register_m25p80(NULL); - - ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir825c1_gpio_keys), - dir825c1_gpio_keys); - - ath79_init_mac(wmac0, mac0, 0); - ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0); - - ath79_init_mac(wmac1, mac1, 1); - ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); - - mdiobus_register_board_info(dir825c1_mdio0_info, - ARRAY_SIZE(dir825c1_mdio0_info)); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); - - /* GMAC0 is connected to an AR8327N switch */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - ath79_register_eth(0); - - ath79_register_usb(); -} - -static void __init dir825c1_setup(void) -{ - ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB, - AR934X_GPIO_OUT_GPIO); - - gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE, - GPIOF_OUT_INIT_LOW, "WAN LED enable"); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio), - dir825c1_leds_gpio); - - ap9x_pci_setup_wmac_led_pin(0, 0); - - dir825c1_generic_setup(); -} - -static void __init dir835a1_setup(void) -{ - dir825c1_ar8327_data.led_cfg = NULL; - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio), - dir835a1_leds_gpio); - - dir825c1_generic_setup(); -} - -MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1", - "D-Link DIR-825 rev. C1", - dir825c1_setup); - -MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1", - "D-Link DIR-835 rev. A1", - dir835a1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dragino2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dragino2.c deleted file mode 100644 index 156fbe5..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-dragino2.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * DRAGINO V2 board support, based on Atheros AP121 board support - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2012 Elektra Wagenrad <elektra@villagetelco.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define DRAGINO2_GPIO_LED_WLAN 0 -#define DRAGINO2_GPIO_LED_LAN 13 -#define DRAGINO2_GPIO_LED_WAN 17 - -/* - * The following GPIO is actually named "Router" on the board. - * However, since the "Router" feature is not supported as of yet - * we use it to display USB activity. - */ - -#define DRAGINO2_GPIO_LED_USB 28 -#define DRAGINO2_GPIO_BTN_JUMPSTART 11 -#define DRAGINO2_GPIO_BTN_RESET 12 - -#define DRAGINO2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DRAGINO2_KEYS_DEBOUNCE_INTERVAL (3 * DRAGINO2_KEYS_POLL_INTERVAL) - -#define DRAGINO2_MAC0_OFFSET 0x0000 -#define DRAGINO2_MAC1_OFFSET 0x0006 -#define DRAGINO2_CALDATA_OFFSET 0x1000 -#define DRAGINO2_WMAC_MAC_OFFSET 0x1002 - -static struct gpio_led dragino2_leds_gpio[] __initdata = { - { - .name = "dragino2:red:lan", - .gpio = DRAGINO2_GPIO_LED_LAN, - .active_low = 0, - }, - { - .name = "dragino2:red:wlan", - .gpio = DRAGINO2_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "dragino2:red:wan", - .gpio = DRAGINO2_GPIO_LED_WAN, - .active_low = 0, - }, - { - .name = "dragino2:red:usb", - .gpio = DRAGINO2_GPIO_LED_USB, - .active_low = 0, - }, -}; - -static struct gpio_keys_button dragino2_gpio_keys[] __initdata = { - { - .desc = "jumpstart button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL, - .gpio = DRAGINO2_GPIO_BTN_JUMPSTART, - .active_low = 1, - }, - { - .desc = "reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DRAGINO2_KEYS_DEBOUNCE_INTERVAL, - .gpio = DRAGINO2_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init dragino2_common_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(NULL); - ath79_register_wmac(art + DRAGINO2_CALDATA_OFFSET, - art + DRAGINO2_WMAC_MAC_OFFSET); - - ath79_init_mac(ath79_eth0_data.mac_addr, art + DRAGINO2_MAC0_OFFSET, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, art + DRAGINO2_MAC1_OFFSET, 0); - - ath79_register_mdio(0, 0x0); - - /* Enable GPIO15 and GPIO16 and possibly GPIO26 and GPIO27 */ - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); -} - -static void __init dragino2_setup(void) -{ - dragino2_common_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dragino2_leds_gpio), - dragino2_leds_gpio); - ath79_register_gpio_keys_polled(-1, DRAGINO2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dragino2_gpio_keys), - dragino2_gpio_keys); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_DRAGINO2, "DRAGINO2", "Dragino Dragino v2", - dragino2_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-eap300v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-eap300v2.c deleted file mode 100644 index ba577e2..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-eap300v2.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * EnGenius EAP300 v2 board support - * - * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define EAP300V2_GPIO_LED_POWER 0 -#define EAP300V2_GPIO_LED_LAN 16 -#define EAP300V2_GPIO_LED_WLAN 17 - -#define EAP300V2_GPIO_BTN_RESET 1 - -#define EAP300V2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define EAP300V2_KEYS_DEBOUNCE_INTERVAL (3 * EAP300V2_KEYS_POLL_INTERVAL) - -static struct gpio_led eap300v2_leds_gpio[] __initdata = { - { - .name = "engenius:blue:power", - .gpio = EAP300V2_GPIO_LED_POWER, - .active_low = 1, - }, { - .name = "engenius:blue:lan", - .gpio = EAP300V2_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "engenius:blue:wlan", - .gpio = EAP300V2_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button eap300v2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = EAP300V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = EAP300V2_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -#define EAP300V2_ART_MAC_OFFSET 2 - -#define EAP300V2_LAN_PHYMASK BIT(0) - -static void __init eap300v2_setup(void) -{ - u8 *art = (u8 *)KSEG1ADDR(0x1fff1000); - - ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); - - ath79_gpio_output_select(EAP300V2_GPIO_LED_POWER, AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(EAP300V2_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(EAP300V2_GPIO_LED_WLAN, AR934X_GPIO_OUT_GPIO); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(eap300v2_leds_gpio), - eap300v2_leds_gpio); - ath79_register_gpio_keys_polled(-1, EAP300V2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(eap300v2_gpio_keys), - eap300v2_gpio_keys); - - ath79_register_m25p80(NULL); - ath79_register_wmac(art, NULL); - ath79_register_mdio(1, 0x0); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); - - ath79_init_mac(ath79_eth0_data.mac_addr, - art + EAP300V2_ART_MAC_OFFSET, 0); - - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = EAP300V2_LAN_PHYMASK; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = EAP300V2_LAN_PHYMASK; - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); -} - -MIPS_MACHINE(ATH79_MACH_EAP300V2, "EAP300V2", "EnGenius EAP300 v2", - eap300v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-eap7660d.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-eap7660d.c deleted file mode 100644 index 787e627..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-eap7660d.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * Senao EAP7660D board support - * - * Copyright (C) 2010 Daniel Golle <daniel.golle@gmail.com> - * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/ath5k_platform.h> -#include <linux/delay.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" -#include "pci.h" - -#define EAP7660D_KEYS_POLL_INTERVAL 20 /* msecs */ -#define EAP7660D_KEYS_DEBOUNCE_INTERVAL (3 * EAP7660D_KEYS_POLL_INTERVAL) - -#define EAP7660D_GPIO_DS4 7 -#define EAP7660D_GPIO_DS5 2 -#define EAP7660D_GPIO_DS7 0 -#define EAP7660D_GPIO_DS8 4 -#define EAP7660D_GPIO_SW1 3 -#define EAP7660D_GPIO_SW3 8 -#define EAP7660D_PHYMASK BIT(20) -#define EAP7660D_BOARDCONFIG 0x1F7F0000 -#define EAP7660D_GBIC_MAC_OFFSET 0x1000 -#define EAP7660D_WMAC0_MAC_OFFSET 0x1010 -#define EAP7660D_WMAC1_MAC_OFFSET 0x1016 -#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000 -#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000 - -#ifdef CONFIG_PCI -static struct ath5k_platform_data eap7660d_wmac0_data; -static struct ath5k_platform_data eap7660d_wmac1_data; -static char eap7660d_wmac0_mac[6]; -static char eap7660d_wmac1_mac[6]; -static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; -static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; - -static int eap7660d_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 17: - dev->dev.platform_data = &eap7660d_wmac0_data; - break; - - case 18: - dev->dev.platform_data = &eap7660d_wmac1_data; - break; - } - - return 0; -} - -void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ - if (cal_data0 && *cal_data0 == 0xa55a) { - memcpy(eap7660d_wmac0_eeprom, cal_data0, - ATH5K_PLAT_EEP_MAX_WORDS); - eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom; - } - - if (cal_data1 && *cal_data1 == 0xa55a) { - memcpy(eap7660d_wmac1_eeprom, cal_data1, - ATH5K_PLAT_EEP_MAX_WORDS); - eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom; - } - - if (mac_addr0) { - memcpy(eap7660d_wmac0_mac, mac_addr0, - sizeof(eap7660d_wmac0_mac)); - eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac; - } - - if (mac_addr1) { - memcpy(eap7660d_wmac1_mac, mac_addr1, - sizeof(eap7660d_wmac1_mac)); - eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac; - } - - ath79_pci_set_plat_dev_init(eap7660d_pci_plat_dev_init); - ath79_register_pci(); -} -#else -static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ -} -#endif /* CONFIG_PCI */ - -static struct gpio_led eap7660d_leds_gpio[] __initdata = { - { - .name = "eap7660d:green:ds8", - .gpio = EAP7660D_GPIO_DS8, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds5", - .gpio = EAP7660D_GPIO_DS5, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds7", - .gpio = EAP7660D_GPIO_DS7, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds4", - .gpio = EAP7660D_GPIO_DS4, - .active_low = 0, - } -}; - -static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, - .gpio = EAP7660D_GPIO_SW1, - .active_low = 1, - }, - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, - .gpio = EAP7660D_GPIO_SW3, - .active_low = 1, - } -}; - -static const char *eap7660d_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data eap7660d_flash_data = { - .part_probes = eap7660d_part_probes, -}; - -static void __init eap7660d_setup(void) -{ - u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG); - - ath79_register_mdio(0, ~EAP7660D_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, - boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = EAP7660D_PHYMASK; - ath79_register_eth(0); - ath79_register_m25p80(&eap7660d_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio), - eap7660d_leds_gpio); - ath79_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL, - ARRAY_SIZE(eap7660d_gpio_keys), - eap7660d_gpio_keys); - eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET, - boardconfig + EAP7660D_WMAC0_MAC_OFFSET, - boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET, - boardconfig + EAP7660D_WMAC1_MAC_OFFSET); -}; - -MIPS_MACHINE(ATH79_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D", - eap7660d_setup); - -MIPS_MACHINE(ATH79_MACH_ALL0305, "ALL0305", "Allnet ALL0305", - eap7660d_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-el-m150.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-el-m150.c deleted file mode 100644 index 72a396d..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-el-m150.c +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Easy-Link EL-M150 board support - * - * Copyright (C) 2012 huangfc <huangfangcheng@163.com> - * Copyright (C) 2012 HYS <550663898@qq.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "dev-usb.h" - -#define EL_M150_GPIO_BTN6 6 -#define EL_M150_GPIO_BTN7 7 -#define EL_M150_GPIO_BTN_RESET 11 - -#define EL_M150_GPIO_LED_SYSTEM 27 -#define EL_M150_GPIO_USB_POWER 8 - -#define EL_M150_KEYS_POLL_INTERVAL 20 /* msecs */ -#define EL_M150_KEYS_DEBOUNCE_INTERVAL (3 * EL_M150_KEYS_POLL_INTERVAL) - -static const char *EL_M150_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data EL_M150_flash_data = { - .part_probes = EL_M150_part_probes, -}; - -static struct gpio_led EL_M150_leds_gpio[] __initdata = { - { - .name = "ELINK:green:system", - .gpio = EL_M150_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button EL_M150_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, - .gpio = EL_M150_GPIO_BTN_RESET, - .active_low = 0, - }, - { - .desc = "BTN_6", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, - .gpio = EL_M150_GPIO_BTN6, - .active_low = 1, - }, - { - .desc = "BTN_7", - .type = EV_KEY, - .code = BTN_7, - .debounce_interval = EL_M150_KEYS_DEBOUNCE_INTERVAL, - .gpio = EL_M150_GPIO_BTN7, - .active_low = 1, - }, -}; - -static void __init el_m150_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(EL_M150_leds_gpio), - EL_M150_leds_gpio); - - ath79_register_gpio_keys_polled(-1, EL_M150_KEYS_POLL_INTERVAL, - ARRAY_SIZE(EL_M150_gpio_keys), - EL_M150_gpio_keys); - - gpio_request_one(EL_M150_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_register_m25p80(&EL_M150_flash_data); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_EL_M150, "EL-M150", - "EasyLink EL-M150", el_m150_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-el-mini.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-el-mini.c deleted file mode 100644 index aaccb0d..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-el-mini.c +++ /dev/null @@ -1,86 +0,0 @@ -/* - * Easy-Link EL-MINI board support - * - * Copyright (C) 2012 huangfc <huangfangcheng@163.com> - * Copyright (C) 2011 hys <550663898@qq.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define MINI_GPIO_LED_SYSTEM 27 -#define MINI_GPIO_BTN_RESET 11 - -#define MINI_GPIO_USB_POWER 8 - -#define MINI_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MINI_KEYS_DEBOUNCE_INTERVAL (3 * MINI_KEYS_POLL_INTERVAL) - -static const char *mini_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data mini_flash_data = { - .part_probes = mini_part_probes, -}; - -static struct gpio_led mini_leds_gpio[] __initdata = { - { - .name = "ELINK:green:system", - .gpio = MINI_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button mini_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MINI_KEYS_DEBOUNCE_INTERVAL, - .gpio = MINI_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init el_mini_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&mini_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(mini_leds_gpio), - mini_leds_gpio); - ath79_register_gpio_keys_polled(-1, MINI_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mini_gpio_keys), - mini_gpio_keys); - - gpio_request_one(MINI_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_EL_MINI, "EL-MINI", "EasyLink EL-MINI", - el_mini_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c deleted file mode 100644 index 2a34b3a..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * EnGenius ESR1750 board support - * - * Copyright (c) 2014 Jon Suphammer <jon@suphammer.net> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "pci.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-eth.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define ESR1750_GPIO_LED_WLAN_5G 23 -#define ESR1750_GPIO_LED_WLAN_2G 13 -#define ESR1750_GPIO_LED_POWER_AMBER 2 -#define ESR1750_GPIO_LED_WPS_AMBER 22 -#define ESR1750_GPIO_LED_WPS_BLUE 19 - -#define ESR1750_GPIO_BTN_WPS 16 -#define ESR1750_GPIO_BTN_RESET 17 - -#define ESR1750_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ESR1750_KEYS_DEBOUNCE_INTERVAL (3 * ESR1750_KEYS_POLL_INTERVAL) - -#define ESR1750_CALDATA_ADDR 0x1fff0000 -#define ESR1750_WMAC_CALDATA_OFFSET 0x1000 -#define ESR1750_PCIE_CALDATA_OFFSET 0x5000 - -#define ESR1750_NVRAM_ADDR 0x1f030000 -#define ESR1750_NVRAM_SIZE 0x10000 - -static struct gpio_led esr1750_leds_gpio[] __initdata = { - { - .name = "esr1750:amber:power", - .gpio = ESR1750_GPIO_LED_POWER_AMBER, - .active_low = 1, - }, - { - .name = "esr1750:blue:wps", - .gpio = ESR1750_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, - { - .name = "esr1750:amber:wps", - .gpio = ESR1750_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, - { - .name = "esr1750:blue:wlan-2g", - .gpio = ESR1750_GPIO_LED_WLAN_2G, - .active_low = 1, - }, - { - .name = "esr1750:blue:wlan-5g", - .gpio = ESR1750_GPIO_LED_WLAN_5G, - .active_low = 1, - } -}; - -static struct gpio_keys_button esr1750_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL, - .gpio = ESR1750_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ESR1750_KEYS_DEBOUNCE_INTERVAL, - .gpio = ESR1750_GPIO_BTN_RESET, - .active_low = 1, - }, -}; - -static struct ar8327_pad_cfg esr1750_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL2, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_platform_data esr1750_ar8327_data = { - .pad0_cfg = &esr1750_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, -}; - -static struct mdio_board_info esr1750_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &esr1750_ar8327_data, - }, -}; - -static int esr1750_get_mac(const char *name, char *mac) -{ - u8 *nvram = (u8 *) KSEG1ADDR(ESR1750_NVRAM_ADDR); - int err; - - err = ath79_nvram_parse_mac_addr(nvram, ESR1750_NVRAM_SIZE, - name, mac); - if (err) { - pr_err("no MAC address found for %s\n", name); - return false; - } - - return true; -} - -static void __init esr1750_setup(void) -{ - u8 *caldata = (u8 *) KSEG1ADDR(ESR1750_CALDATA_ADDR); - u8 mac1[ETH_ALEN]; - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(esr1750_leds_gpio), - esr1750_leds_gpio); - ath79_register_gpio_keys_polled(-1, ESR1750_KEYS_POLL_INTERVAL, - ARRAY_SIZE(esr1750_gpio_keys), - esr1750_gpio_keys); - - ath79_register_usb(); - - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - - ath79_register_mdio(0, 0x0); - - mdiobus_register_board_info(esr1750_mdio0_info, - ARRAY_SIZE(esr1750_mdio0_info)); - - /* GMAC0 is connected to an QCA8327N switch */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - - if (esr1750_get_mac("ethaddr=", mac1)) - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - - ath79_eth0_pll_data.pll_1000 = 0xa6000000; - ath79_register_eth(0); - - ath79_register_wmac(caldata + ESR1750_WMAC_CALDATA_OFFSET, mac1); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_ESR1750, "ESR1750", - "EnGenius ESR1750", - esr1750_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c deleted file mode 100644 index ca36e36..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * EnGenius ESR900 board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define pr_fmt(fmt) "esr900: " fmt - -#include <linux/platform_device.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "pci.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-eth.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define ESR900_GPIO_LED_POWER 2 -#define ESR900_GPIO_LED_WLAN_2G 13 -#define ESR900_GPIO_LED_WPS_BLUE 19 -#define ESR900_GPIO_LED_WPS_AMBER 22 -#define ESR900_GPIO_LED_WLAN_5G 23 - -#define ESR900_GPIO_BTN_WPS 16 -#define ESR900_GPIO_BTN_RESET 17 - -#define ESR900_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ESR900_KEYS_DEBOUNCE_INTERVAL (3 * ESR900_KEYS_POLL_INTERVAL) - -#define ESR900_CALDATA_ADDR 0x1fff0000 -#define ESR900_WMAC_CALDATA_OFFSET 0x1000 -#define ESR900_PCIE_CALDATA_OFFSET 0x5000 - -#define ESR900_CONFIG_ADDR 0x1f030000 -#define ESR900_CONFIG_SIZE 0x10000 - -#define ESR900_LAN_PHYMASK BIT(0) -#define ESR900_WAN_PHYMASK BIT(5) -#define ESR900_MDIO_MASK (~(ESR900_LAN_PHYMASK | ESR900_WAN_PHYMASK)) - -static struct gpio_led esr900_leds_gpio[] __initdata = { - { - .name = "engenius:amber:power", - .gpio = ESR900_GPIO_LED_POWER, - .active_low = 1, - }, - { - .name = "engenius:blue:wlan-2g", - .gpio = ESR900_GPIO_LED_WLAN_2G, - .active_low = 1, - }, - { - .name = "engenius:blue:wps", - .gpio = ESR900_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, - { - .name = "engenius:amber:wps", - .gpio = ESR900_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, - { - .name = "engenius:blue:wlan-5g", - .gpio = ESR900_GPIO_LED_WLAN_5G, - .active_low = 1, - } -}; - -static struct gpio_keys_button esr900_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL, - .gpio = ESR900_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ESR900_KEYS_DEBOUNCE_INTERVAL, - .gpio = ESR900_GPIO_BTN_RESET, - .active_low = 1, - }, -}; - -static struct ar8327_pad_cfg esr900_ar8327_pad0_cfg = { - /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_pad_cfg esr900_ar8327_pad6_cfg = { - /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ - .mode = AR8327_PAD_MAC_SGMII, - .rxclk_delay_en = true, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, -}; - -static struct ar8327_platform_data esr900_ar8327_data = { - .pad0_cfg = &esr900_ar8327_pad0_cfg, - .pad6_cfg = &esr900_ar8327_pad6_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .port6_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, -}; - -static struct mdio_board_info esr900_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &esr900_ar8327_data, - }, -}; - -static void __init esr900_setup(void) -{ - const char *config = (char *) KSEG1ADDR(ESR900_CONFIG_ADDR); - u8 *art = (u8 *) KSEG1ADDR(ESR900_CALDATA_ADDR); - u8 lan_mac[6]; - u8 wlan0_mac[6]; - u8 wlan1_mac[6]; - - if (ath79_nvram_parse_mac_addr(config, ESR900_CONFIG_SIZE, - "ethaddr=", lan_mac) == 0) { - ath79_init_local_mac(ath79_eth0_data.mac_addr, lan_mac); - ath79_init_mac(wlan0_mac, lan_mac, 0); - ath79_init_mac(wlan1_mac, lan_mac, 1); - } else { - pr_err("could not find ethaddr in u-boot environment\n"); - } - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(esr900_leds_gpio), - esr900_leds_gpio); - ath79_register_gpio_keys_polled(-1, ESR900_KEYS_POLL_INTERVAL, - ARRAY_SIZE(esr900_gpio_keys), - esr900_gpio_keys); - - ath79_register_usb(); - - ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac); - - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - - ath79_register_mdio(0, 0x0); - - mdiobus_register_board_info(esr900_mdio0_info, - ARRAY_SIZE(esr900_mdio0_info)); - - /* GMAC0 is connected to the RMGII interface */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = ESR900_LAN_PHYMASK; - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - - ath79_eth0_pll_data.pll_1000 = 0xa6000000; - ath79_register_eth(0); - - /* GMAC1 is connected to the SGMII interface */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_eth1_pll_data.pll_1000 = 0x03000101; - ath79_register_eth(1); - - ap91_pci_init(art + ESR900_PCIE_CALDATA_OFFSET, wlan1_mac); -} - -MIPS_MACHINE(ATH79_MACH_ESR900, "ESR900", "EnGenius ESR900", esr900_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c deleted file mode 100644 index 47ed51b..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ew-dorin.c +++ /dev/null @@ -1,144 +0,0 @@ -/* - * EW Dorin board support - * (based on Atheros Ref. Design AP121) - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2012 Embedded Wireless GmbH www.80211.de - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define DORIN_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DORIN_KEYS_DEBOUNCE_INTERVAL (3 * DORIN_KEYS_POLL_INTERVAL) - -#define DORIN_CALDATA_OFFSET 0x1000 -#define DORIN_WMAC_MAC_OFFSET 0x1002 - -#define DORIN_GPIO_LED_21 21 -#define DORIN_GPIO_LED_22 22 - -#define DORIN_GPIO_BTN_JUMPSTART 11 -#define DORIN_GPIO_BTN_RESET 6 - -static struct gpio_led dorin_leds_gpio[] __initdata = { - { - .name = "dorin:green:led21", - .gpio = DORIN_GPIO_LED_21, - .active_low = 1, - }, - { - .name = "dorin:green:led22", - .gpio = DORIN_GPIO_LED_22, - .active_low = 1, - }, -}; - -static struct gpio_keys_button dorin_gpio_keys[] __initdata = { - { - .desc = "jumpstart button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL, - .gpio = DORIN_GPIO_BTN_JUMPSTART, - .active_low = 1, - }, - { - .desc = "reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DORIN_KEYS_DEBOUNCE_INTERVAL, - .gpio = DORIN_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init ew_dorin_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - static u8 mac[6]; - - ath79_register_m25p80(NULL); - - ath79_register_usb(); - - if (ar93xx_wmac_read_mac_address(mac)) { - ath79_register_wmac(NULL, NULL); - } else { - ath79_register_wmac(art + DORIN_CALDATA_OFFSET, - art + DORIN_WMAC_MAC_OFFSET); - memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac)); - } - - mac[3] |= 0x40; - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio), - dorin_leds_gpio); - ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dorin_gpio_keys), - dorin_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_EW_DORIN, "EW-DORIN", "EmbWir-Dorin", - ew_dorin_setup); - - -static void __init ew_dorin_router_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - static u8 mac[6]; - - ath79_register_m25p80(NULL); - - ath79_register_usb(); - - if (ar93xx_wmac_read_mac_address(mac)) { - ath79_register_wmac(NULL, NULL); - } else { - ath79_register_wmac(art + DORIN_CALDATA_OFFSET, - art + DORIN_WMAC_MAC_OFFSET); - memcpy(mac, art + DORIN_WMAC_MAC_OFFSET, sizeof(mac)); - } - - mac[3] |= 0x40; - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - - mac[3] &= 0x3F; - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_setup_ar933x_phy4_switch(true, true); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dorin_leds_gpio), - dorin_leds_gpio); - ath79_register_gpio_keys_polled(-1, DORIN_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dorin_gpio_keys), - dorin_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_EW_DORIN_ROUTER, "EW-DORIN-ROUTER", - "EmbWir-Dorin-Router", ew_dorin_router_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-inet.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-inet.c deleted file mode 100644 index 0713f14..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gl-inet.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * GL-CONNECT iNet board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2013 alzhao <alzhao@gmail.com> - * Copyright (C) 2014 Michel Stempin <michel.stempin@wanadoo.fr> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define GL_INET_GPIO_LED_WLAN 0 -#define GL_INET_GPIO_LED_LAN 13 -#define GL_INET_GPIO_BTN_RESET 11 - -#define GL_INET_KEYS_POLL_INTERVAL 20 /* msecs */ -#define GL_INET_KEYS_DEBOUNCE_INTERVAL (3 * GL_INET_KEYS_POLL_INTERVAL) - -static const char * gl_inet_part_probes[] = { - "tp-link", /* dont change, this will use tplink parser */ - NULL , -}; - -static struct flash_platform_data gl_inet_flash_data = { - .part_probes = gl_inet_part_probes, -}; - -static struct gpio_led gl_inet_leds_gpio[] __initdata = { - { - .name = "gl-connect:red:wlan", - .gpio = GL_INET_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "gl-connect:green:lan", - .gpio = GL_INET_GPIO_LED_LAN, - .active_low = 0, - .default_state = 1, - }, -}; - -static struct gpio_keys_button gl_inet_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = GL_INET_KEYS_DEBOUNCE_INTERVAL, - .gpio = GL_INET_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init gl_inet_setup(void) -{ - /* get the mac address which is stored in the 1st 64k uboot MTD */ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - - /* get the art address, which is the last 64K. By using - 0x1fff1000, it doesn't matter it is 4M, 8M or 16M flash */ - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ - ath79_setup_ar933x_phy4_switch(false, false); - - /* register flash. MTD will use tp-link parser to parser MTD */ - ath79_register_m25p80(&gl_inet_flash_data); - - /* register gpio LEDs and keys */ - ath79_register_leds_gpio(-1, ARRAY_SIZE(gl_inet_leds_gpio), - gl_inet_leds_gpio); - ath79_register_gpio_keys_polled(-1, GL_INET_KEYS_POLL_INTERVAL, - ARRAY_SIZE(gl_inet_gpio_keys), - gl_inet_gpio_keys); - - /* enable usb */ - ath79_register_usb(); - - /* register eth0 as WAN, eth1 as LAN */ - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - ath79_register_eth(1); - - /* register wireless mac with cal data */ - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_GL_INET, "GL-INET", "GL-CONNECT INET v1", - gl_inet_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite.c deleted file mode 100644 index c6cb61c..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-gs-oolite.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Oolite board support - * - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "dev-usb.h" - -#define GS_OOLITE_GPIO_BTN6 6 -#define GS_OOLITE_GPIO_BTN7 7 -#define GS_OOLITE_GPIO_BTN_RESET 11 - -#define GS_OOLITE_GPIO_LED_SYSTEM 27 - -#define GS_OOLITE_KEYS_POLL_INTERVAL 20 /* msecs */ -#define GS_OOLITE_KEYS_DEBOUNCE_INTERVAL (3 * GS_OOLITE_KEYS_POLL_INTERVAL) - -static const char *gs_oolite_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data gs_oolite_flash_data = { - .part_probes = gs_oolite_part_probes, -}; - -static struct gpio_led gs_oolite_leds_gpio[] __initdata = { - { - .name = "oolite:red:system", - .gpio = GS_OOLITE_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button gs_oolite_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, - .gpio = GS_OOLITE_GPIO_BTN_RESET, - .active_low = 0, - }, - { - .desc = "BTN_6", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, - .gpio = GS_OOLITE_GPIO_BTN6, - .active_low = 0, - }, - { - .desc = "BTN_7", - .type = EV_KEY, - .code = BTN_7, - .debounce_interval = GS_OOLITE_KEYS_DEBOUNCE_INTERVAL, - .gpio = GS_OOLITE_GPIO_BTN7, - .active_low = 0, - }, -}; - -static void __init gs_oolite_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(gs_oolite_leds_gpio), - gs_oolite_leds_gpio); - - ath79_register_gpio_keys_polled(-1, GS_OOLITE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(gs_oolite_gpio_keys), - gs_oolite_gpio_keys); - - ath79_register_usb(); - - ath79_register_m25p80(&gs_oolite_flash_data); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_GS_OOLITE, "GS-OOLITE", - "Oolite V1.0", gs_oolite_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-hiwifi-hc6361.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-hiwifi-hc6361.c deleted file mode 100644 index 6600595..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-hiwifi-hc6361.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * HiWiFi HC6361 board support - * - * Copyright (C) 2012-2013 eric - * Copyright (C) 2014 Yousong Zhou <yszhou4tech@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/proc_fs.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define HIWIFI_HC6361_GPIO_LED_WLAN_2P4 0 /* 2.4G WLAN LED */ -#define HIWIFI_HC6361_GPIO_LED_SYSTEM 1 /* System LED */ -#define HIWIFI_HC6361_GPIO_LED_INTERNET 27 /* Internet LED */ - -#define HIWIFI_HC6361_GPIO_USBPOWER 20 /* USB power control */ -#define HIWIFI_HC6361_GPIO_BTN_RST 11 /* Reset button */ - -#define HIWIFI_HC6361_KEYS_POLL_INTERVAL 20 /* msecs */ -#define HIWIFI_HC6361_KEYS_DEBOUNCE_INTERVAL \ - (3 * HIWIFI_HC6361_KEYS_POLL_INTERVAL) - -static struct gpio_led hiwifi_leds_gpio[] __initdata = { - { - .name = "hiwifi:blue:wlan-2p4", - .gpio = HIWIFI_HC6361_GPIO_LED_WLAN_2P4, - .active_low = 1, - }, { - .name = "hiwifi:blue:system", - .gpio = HIWIFI_HC6361_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "hiwifi:blue:internet", - .gpio = HIWIFI_HC6361_GPIO_LED_INTERNET, - .active_low = 1, - } -}; - -static struct gpio_keys_button hiwifi_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = HIWIFI_HC6361_KEYS_DEBOUNCE_INTERVAL, - .gpio = HIWIFI_HC6361_GPIO_BTN_RST, - .active_low = 1, - } -}; - -static void __init get_mac_from_bdinfo(u8 *mac, void *bdinfo) -{ - if (sscanf(bdinfo, "fac_mac = %2hhx:%2hhx:%2hhx:%2hhx:%2hhx:%2hhx", - &mac[0], &mac[1], &mac[2], &mac[3], - &mac[4], &mac[5]) == 6) { - return; - } - - printk(KERN_WARNING "Parsing MAC address failed.\n"); - memcpy(mac, "\x00\xba\xbe\x00\x00\x00", 6); -} - -static void __init hiwifi_hc6361_setup(void) -{ - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_m25p80(NULL); - ath79_gpio_function_enable( - AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(hiwifi_leds_gpio), - hiwifi_leds_gpio); - ath79_register_gpio_keys_polled(-1, HIWIFI_HC6361_KEYS_POLL_INTERVAL, - ARRAY_SIZE(hiwifi_gpio_keys), - hiwifi_gpio_keys); - gpio_request_one(HIWIFI_HC6361_GPIO_USBPOWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - get_mac_from_bdinfo(mac, (void *) KSEG1ADDR(0x1f010180)); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_HIWIFI_HC6361, "HiWiFi-HC6361", - "HiWiFi HC6361", hiwifi_hc6361_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-hornet-ub.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-hornet-ub.c deleted file mode 100644 index 22b1e09..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-hornet-ub.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * ALFA NETWORK Hornet-UB board support - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define HORNET_UB_GPIO_LED_WLAN 0 -#define HORNET_UB_GPIO_LED_USB 1 -#define HORNET_UB_GPIO_LED_LAN 13 -#define HORNET_UB_GPIO_LED_WAN 17 -#define HORNET_UB_GPIO_LED_WPS 27 - -#define HORNET_UB_GPIO_BTN_RESET 11 -#define HORNET_UB_GPIO_BTN_WPS 12 - -#define HORNET_UB_GPIO_USB_POWER 26 - -#define HORNET_UB_KEYS_POLL_INTERVAL 20 /* msecs */ -#define HORNET_UB_KEYS_DEBOUNCE_INTERVAL (3 * HORNET_UB_KEYS_POLL_INTERVAL) - -#define HORNET_UB_MAC0_OFFSET 0x0000 -#define HORNET_UB_MAC1_OFFSET 0x0006 -#define HORNET_UB_CALDATA_OFFSET 0x1000 - -static struct gpio_led hornet_ub_leds_gpio[] __initdata = { - { - .name = "alfa:blue:lan", - .gpio = HORNET_UB_GPIO_LED_LAN, - .active_low = 0, - }, - { - .name = "alfa:blue:usb", - .gpio = HORNET_UB_GPIO_LED_USB, - .active_low = 0, - }, - { - .name = "alfa:blue:wan", - .gpio = HORNET_UB_GPIO_LED_WAN, - .active_low = 1, - }, - { - .name = "alfa:blue:wlan", - .gpio = HORNET_UB_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "alfa:blue:wps", - .gpio = HORNET_UB_GPIO_LED_WPS, - .active_low = 1, - }, -}; - -static struct gpio_keys_button hornet_ub_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, - .gpio = HORNET_UB_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, - .gpio = HORNET_UB_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init hornet_ub_gpio_setup(void) -{ - u32 t; - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; - ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); - - gpio_request_one(HORNET_UB_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); -} - -static void __init hornet_ub_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - hornet_ub_gpio_setup(); - - ath79_register_m25p80(NULL); - ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio), - hornet_ub_leds_gpio); - ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL, - ARRAY_SIZE(hornet_ub_gpio_keys), - hornet_ub_gpio_keys); - - ath79_init_mac(ath79_eth1_data.mac_addr, - art + HORNET_UB_MAC0_OFFSET, 0); - ath79_init_mac(ath79_eth0_data.mac_addr, - art + HORNET_UB_MAC1_OFFSET, 0); - - ath79_register_mdio(0, 0x0); - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_HORNET_UB, "HORNET-UB", "ALFA NETWORK Hornet-UB", - hornet_ub_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ja76pf.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ja76pf.c deleted file mode 100644 index d1fe0f8..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ja76pf.c +++ /dev/null @@ -1,190 +0,0 @@ -/* - * jjPlus JA76PF board support - */ - -#include <linux/i2c.h> -#include <linux/i2c-gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define JA76PF_KEYS_POLL_INTERVAL 20 /* msecs */ -#define JA76PF_KEYS_DEBOUNCE_INTERVAL (3 * JA76PF_KEYS_POLL_INTERVAL) - -#define JA76PF_GPIO_I2C_SCL 0 -#define JA76PF_GPIO_I2C_SDA 1 -#define JA76PF_GPIO_LED_1 5 -#define JA76PF_GPIO_LED_2 4 -#define JA76PF_GPIO_LED_3 3 -#define JA76PF_GPIO_BTN_RESET 11 - -static struct gpio_led ja76pf_leds_gpio[] __initdata = { - { - .name = "jjplus:green:led1", - .gpio = JA76PF_GPIO_LED_1, - .active_low = 1, - }, { - .name = "jjplus:green:led2", - .gpio = JA76PF_GPIO_LED_2, - .active_low = 1, - }, { - .name = "jjplus:green:led3", - .gpio = JA76PF_GPIO_LED_3, - .active_low = 1, - } -}; - -static struct gpio_keys_button ja76pf_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, - .gpio = JA76PF_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data ja76pf_i2c_gpio_data = { - .sda_pin = JA76PF_GPIO_I2C_SDA, - .scl_pin = JA76PF_GPIO_I2C_SCL, -}; - -static struct platform_device ja76pf_i2c_gpio_device = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &ja76pf_i2c_gpio_data, - } -}; - -static const char *ja76pf_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data ja76pf_flash_data = { - .part_probes = ja76pf_part_probes, -}; - -#define JA76PF_WAN_PHYMASK (1 << 4) -#define JA76PF_LAN_PHYMASK ((1 << 0) | (1 << 1) | (1 << 2) | (1 < 3)) -#define JA76PF_MDIO_PHYMASK (JA76PF_LAN_PHYMASK | JA76PF_WAN_PHYMASK) - -static void __init ja76pf_init(void) -{ - ath79_register_m25p80(&ja76pf_flash_data); - - ath79_register_mdio(0, ~JA76PF_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = JA76PF_LAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = JA76PF_WAN_PHYMASK; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - platform_device_register(&ja76pf_i2c_gpio_device); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio), - ja76pf_leds_gpio); - - ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ja76pf_gpio_keys), - ja76pf_gpio_keys); - - ath79_register_usb(); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_JA76PF, "JA76PF", "jjPlus JA76PF", ja76pf_init); - -#define JA76PF2_GPIO_LED_D2 5 -#define JA76PF2_GPIO_LED_D3 4 -#define JA76PF2_GPIO_LED_D4 3 -#define JA76PF2_GPIO_BTN_RESET 7 -#define JA76PF2_GPIO_BTN_WPS 8 - -static struct gpio_led ja76pf2_leds_gpio[] __initdata = { - { - .name = "jjplus:green:led1", - .gpio = JA76PF2_GPIO_LED_D2, - .active_low = 1, - }, { - .name = "jjplus:green:led2", - .gpio = JA76PF2_GPIO_LED_D3, - .active_low = 0, - }, { - .name = "jjplus:green:led3", - .gpio = JA76PF2_GPIO_LED_D4, - .active_low = 0, - } -}; - -static struct gpio_keys_button ja76pf2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, - .gpio = JA76PF2_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, - .gpio = JA76PF2_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -#define JA76PF2_LAN_PHYMASK BIT(0) -#define JA76PF2_WAN_PHYMASK BIT(4) -#define JA76PF2_MDIO_PHYMASK (JA76PF2_LAN_PHYMASK | JA76PF2_WAN_PHYMASK) - -static void __init ja76pf2_init(void) -{ - ath79_register_m25p80(&ja76pf_flash_data); - - ath79_register_mdio(0, ~JA76PF2_MDIO_PHYMASK); - - /* MAC0 is connected to the CPU port of the AR8316 switch */ - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - - /* MAC1 is connected to the PHY4 of the AR8316 switch */ - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = BIT(4); - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf2_leds_gpio), - ja76pf2_leds_gpio); - - ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ja76pf2_gpio_keys), - ja76pf2_gpio_keys); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_JA76PF2, "JA76PF2", "jjPlus JA76PF2", ja76pf2_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap003.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap003.c deleted file mode 100644 index a3c93cc..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap003.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * jjPlus JWAP003 board support - * - */ - -#include <linux/i2c.h> -#include <linux/i2c-gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define JWAP003_KEYS_POLL_INTERVAL 20 /* msecs */ -#define JWAP003_KEYS_DEBOUNCE_INTERVAL (3 * JWAP003_KEYS_POLL_INTERVAL) - -#define JWAP003_GPIO_WPS 11 -#define JWAP003_GPIO_I2C_SCL 0 -#define JWAP003_GPIO_I2C_SDA 1 - -static struct gpio_keys_button jwap003_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = JWAP003_KEYS_DEBOUNCE_INTERVAL, - .gpio = JWAP003_GPIO_WPS, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data jwap003_i2c_gpio_data = { - .sda_pin = JWAP003_GPIO_I2C_SDA, - .scl_pin = JWAP003_GPIO_I2C_SCL, -}; - -static struct platform_device jwap003_i2c_gpio_device = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &jwap003_i2c_gpio_data, - } -}; - -static const char *jwap003_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data jwap003_flash_data = { - .part_probes = jwap003_part_probes, -}; - -#define JWAP003_WAN_PHYMASK BIT(0) -#define JWAP003_LAN_PHYMASK BIT(4) - -static void __init jwap003_init(void) -{ - ath79_register_m25p80(&jwap003_flash_data); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = JWAP003_WAN_PHYMASK; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = JWAP003_LAN_PHYMASK; - ath79_eth1_data.speed = SPEED_100; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - platform_device_register(&jwap003_i2c_gpio_device); - - ath79_register_usb(); - - ath79_register_gpio_keys_polled(-1, JWAP003_KEYS_POLL_INTERVAL, - ARRAY_SIZE(jwap003_gpio_keys), - jwap003_gpio_keys); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_JWAP003, "JWAP003", "jjPlus JWAP003", jwap003_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr600.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr600.c deleted file mode 100644 index 701330c..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr600.c +++ /dev/null @@ -1,177 +0,0 @@ -/* - * OpenMesh OM2P board support - * - * Copyright (C) 2012 Marek Lindner <marek@open-mesh.com> - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define MR600_GPIO_LED_WLAN58 12 -#define MR600_GPIO_LED_WPS 13 -#define MR600_GPIO_LED_POWER 14 - -#define MR600V2_GPIO_LED_WLAN58_RED 12 -#define MR600V2_GPIO_LED_WPS 13 -#define MR600V2_GPIO_LED_POWER 14 -#define MR600V2_GPIO_LED_WLAN24_GREEN 18 -#define MR600V2_GPIO_LED_WLAN24_YELLOW 19 -#define MR600V2_GPIO_LED_WLAN24_RED 20 -#define MR600V2_GPIO_LED_WLAN58_GREEN 21 -#define MR600V2_GPIO_LED_WLAN58_YELLOW 22 - -#define MR600_GPIO_BTN_RESET 17 - -#define MR600_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MR600_KEYS_DEBOUNCE_INTERVAL (3 * MR600_KEYS_POLL_INTERVAL) - -#define MR600_MAC_OFFSET 0 -#define MR600_WMAC_CALDATA_OFFSET 0x1000 -#define MR600_PCIE_CALDATA_OFFSET 0x5000 - -static struct gpio_led mr600_leds_gpio[] __initdata = { - { - .name = "mr600:orange:power", - .gpio = MR600_GPIO_LED_POWER, - .active_low = 1, - }, - { - .name = "mr600:blue:wps", - .gpio = MR600_GPIO_LED_WPS, - .active_low = 1, - }, - { - .name = "mr600:green:wlan58", - .gpio = MR600_GPIO_LED_WLAN58, - .active_low = 1, - }, -}; - -static struct gpio_led mr600v2_leds_gpio[] __initdata = { - { - .name = "mr600:blue:power", - .gpio = MR600V2_GPIO_LED_POWER, - .active_low = 1, - }, - { - .name = "mr600:blue:wps", - .gpio = MR600V2_GPIO_LED_WPS, - .active_low = 1, - }, - { - .name = "mr600:red:wlan24", - .gpio = MR600V2_GPIO_LED_WLAN24_RED, - .active_low = 1, - }, - { - .name = "mr600:yellow:wlan24", - .gpio = MR600V2_GPIO_LED_WLAN24_YELLOW, - .active_low = 1, - }, - { - .name = "mr600:green:wlan24", - .gpio = MR600V2_GPIO_LED_WLAN24_GREEN, - .active_low = 1, - }, - { - .name = "mr600:red:wlan58", - .gpio = MR600V2_GPIO_LED_WLAN58_RED, - .active_low = 1, - }, - { - .name = "mr600:yellow:wlan58", - .gpio = MR600V2_GPIO_LED_WLAN58_YELLOW, - .active_low = 1, - }, - { - .name = "mr600:green:wlan58", - .gpio = MR600V2_GPIO_LED_WLAN58_GREEN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button mr600_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MR600_KEYS_DEBOUNCE_INTERVAL, - .gpio = MR600_GPIO_BTN_RESET, - .active_low = 1, - }, -}; - -static void __init mr600_base_setup(unsigned num_leds, struct gpio_led *leds) -{ - u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); - u8 mac[6]; - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, num_leds, leds); - ath79_register_gpio_keys_polled(-1, MR600_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mr600_gpio_keys), - mr600_gpio_keys); - - ath79_init_mac(mac, art + MR600_MAC_OFFSET, 1); - ath79_register_wmac(art + MR600_WMAC_CALDATA_OFFSET, mac); - - ath79_init_mac(mac, art + MR600_MAC_OFFSET, 8); - ap91_pci_init(art + MR600_PCIE_CALDATA_OFFSET, mac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, art + MR600_MAC_OFFSET, 0); - - /* GMAC0 is connected to an external PHY */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - ath79_register_eth(0); -} - -static void __init mr600_setup(void) -{ - mr600_base_setup(ARRAY_SIZE(mr600_leds_gpio), mr600_leds_gpio); - ap9x_pci_setup_wmac_led_pin(0, 0); -} - -MIPS_MACHINE(ATH79_MACH_MR600, "MR600", "OpenMesh MR600", mr600_setup); - -static void __init mr600v2_setup(void) -{ - mr600_base_setup(ARRAY_SIZE(mr600v2_leds_gpio), mr600v2_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_MR600V2, "MR600v2", "OpenMesh MR600v2", mr600v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n600.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n600.c deleted file mode 100644 index a87413d..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n600.c +++ /dev/null @@ -1,202 +0,0 @@ -/* - * WD My Net N600 board support - * - * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define MYNET_N600_GPIO_LED_WIFI 0 -#define MYNET_N600_GPIO_LED_POWER 11 -#define MYNET_N600_GPIO_LED_INTERNET 12 -#define MYNET_N600_GPIO_LED_WPS 13 - -#define MYNET_N600_GPIO_LED_LAN1 4 -#define MYNET_N600_GPIO_LED_LAN2 3 -#define MYNET_N600_GPIO_LED_LAN3 2 -#define MYNET_N600_GPIO_LED_LAN4 1 - -#define MYNET_N600_GPIO_BTN_RESET 16 -#define MYNET_N600_GPIO_BTN_WPS 17 - -#define MYNET_N600_GPIO_EXTERNAL_LNA0 14 -#define MYNET_N600_GPIO_EXTERNAL_LNA1 15 - -#define MYNET_N600_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MYNET_N600_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N600_KEYS_POLL_INTERVAL) - -#define MYNET_N600_MAC0_OFFSET 0 -#define MYNET_N600_MAC1_OFFSET 6 -#define MYNET_N600_WMAC_CALDATA_OFFSET 0x1000 -#define MYNET_N600_PCIE_CALDATA_OFFSET 0x5000 - -#define MYNET_N600_NVRAM_ADDR 0x1f058010 -#define MYNET_N600_NVRAM_SIZE 0x7ff0 - -static struct gpio_led mynet_n600_leds_gpio[] __initdata = { - { - .name = "wd:blue:power", - .gpio = MYNET_N600_GPIO_LED_POWER, - .active_low = 0, - }, - { - .name = "wd:blue:wps", - .gpio = MYNET_N600_GPIO_LED_WPS, - .active_low = 0, - }, - { - .name = "wd:blue:wireless", - .gpio = MYNET_N600_GPIO_LED_WIFI, - .active_low = 0, - }, - { - .name = "wd:blue:internet", - .gpio = MYNET_N600_GPIO_LED_INTERNET, - .active_low = 0, - }, - { - .name = "wd:green:lan1", - .gpio = MYNET_N600_GPIO_LED_LAN1, - .active_low = 1, - }, - { - .name = "wd:green:lan2", - .gpio = MYNET_N600_GPIO_LED_LAN2, - .active_low = 1, - }, - { - .name = "wd:green:lan3", - .gpio = MYNET_N600_GPIO_LED_LAN3, - .active_low = 1, - }, - { - .name = "wd:green:lan4", - .gpio = MYNET_N600_GPIO_LED_LAN4, - .active_low = 1, - }, -}; - -static struct gpio_keys_button mynet_n600_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MYNET_N600_KEYS_DEBOUNCE_INTERVAL, - .gpio = MYNET_N600_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MYNET_N600_KEYS_DEBOUNCE_INTERVAL, - .gpio = MYNET_N600_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -static void mynet_n600_get_mac(const char *name, char *mac) -{ - u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N600_NVRAM_ADDR); - int err; - - err = ath79_nvram_parse_mac_addr(nvram, MYNET_N600_NVRAM_SIZE, - name, mac); - if (err) - pr_err("no MAC address found for %s\n", name); -} - -#define MYNET_N600_WAN_PHY_MASK BIT(0) - -static void __init mynet_n600_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(NULL); - - ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN1, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN2, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN3, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_N600_GPIO_LED_LAN4, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_N600_GPIO_LED_INTERNET, - AR934X_GPIO_OUT_GPIO); - ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n600_leds_gpio), - mynet_n600_leds_gpio); - - ath79_register_gpio_keys_polled(-1, MYNET_N600_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mynet_n600_gpio_keys), - mynet_n600_gpio_keys); - - /* - * Control signal for external LNAs 0 and 1 - * Taken from GPL bootloader source: - * board/ar7240/db12x/alpha_gpio.c - */ - ath79_wmac_set_ext_lna_gpio(0, MYNET_N600_GPIO_EXTERNAL_LNA0); - ath79_wmac_set_ext_lna_gpio(1, MYNET_N600_GPIO_EXTERNAL_LNA1); - - mynet_n600_get_mac("wlan24mac=", tmpmac); - ath79_register_wmac(art + MYNET_N600_WMAC_CALDATA_OFFSET, tmpmac); - - mynet_n600_get_mac("wlan5mac=", tmpmac); - ap91_pci_init(art + MYNET_N600_PCIE_CALDATA_OFFSET, tmpmac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE | - AR934X_ETH_CFG_SW_PHY_SWAP); - - ath79_register_mdio(1, 0x0); - - /* LAN */ - mynet_n600_get_mac("lanmac=", ath79_eth1_data.mac_addr); - - /* GMAC1 is connected to the internal switch */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - - ath79_register_eth(1); - - /* WAN */ - mynet_n600_get_mac("wanmac=", ath79_eth0_data.mac_addr); - - /* GMAC0 is connected to the PHY4 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = MYNET_N600_WAN_PHY_MASK; - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = MYNET_N600_WAN_PHY_MASK; - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - - ath79_register_eth(0); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_MYNET_N600, "MYNET-N600", "WD My Net N600", - mynet_n600_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n750.c deleted file mode 100644 index 9d69dc5..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-n750.c +++ /dev/null @@ -1,226 +0,0 @@ -/* - * WD My Net N750 board support - * - * Copyright (C) 2013 Felix Kaechele <felix@fetzig.org> - * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - - -/* - * Taken from GPL bootloader source: - * board/ar7240/db12x/alpha_gpio.c - */ -#define MYNET_N750_GPIO_LED_WIFI 11 -#define MYNET_N750_GPIO_LED_INTERNET 12 -#define MYNET_N750_GPIO_LED_WPS 13 -#define MYNET_N750_GPIO_LED_POWER 14 - -#define MYNET_N750_GPIO_BTN_RESET 17 -#define MYNET_N750_GPIO_BTN_WPS 19 - -#define MYNET_N750_GPIO_EXTERNAL_LNA0 15 -#define MYNET_N750_GPIO_EXTERNAL_LNA1 18 - -#define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL) - -#define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000 -#define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000 - -#define MYNET_N750_NVRAM_ADDR 0x1f058010 -#define MYNET_N750_NVRAM_SIZE 0x7ff0 - -static struct gpio_led mynet_n750_leds_gpio[] __initdata = { - { - .name = "wd:blue:power", - .gpio = MYNET_N750_GPIO_LED_POWER, - .active_low = 0, - }, - { - .name = "wd:blue:wps", - .gpio = MYNET_N750_GPIO_LED_WPS, - .active_low = 0, - }, - { - .name = "wd:blue:wireless", - .gpio = MYNET_N750_GPIO_LED_WIFI, - .active_low = 0, - }, - { - .name = "wd:blue:internet", - .gpio = MYNET_N750_GPIO_LED_INTERNET, - .active_low = 0, - }, -}; - -static struct gpio_keys_button mynet_n750_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, - .gpio = MYNET_N750_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MYNET_N750_KEYS_DEBOUNCE_INTERVAL, - .gpio = MYNET_N750_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -static const struct ar8327_led_info mynet_n750_leds_ar8327[] __initconst = { - AR8327_LED_INFO(PHY0_0, HW, "wd:green:lan1"), - AR8327_LED_INFO(PHY1_0, HW, "wd:green:lan2"), - AR8327_LED_INFO(PHY2_0, HW, "wd:green:lan3"), - AR8327_LED_INFO(PHY3_0, HW, "wd:green:lan4"), - AR8327_LED_INFO(PHY4_0, HW, "wd:green:wan"), - AR8327_LED_INFO(PHY0_1, HW, "wd:yellow:lan1"), - AR8327_LED_INFO(PHY1_1, HW, "wd:yellow:lan2"), - AR8327_LED_INFO(PHY2_1, HW, "wd:yellow:lan3"), - AR8327_LED_INFO(PHY3_1, HW, "wd:yellow:lan4"), - AR8327_LED_INFO(PHY4_1, HW, "wd:yellow:wan"), -}; - -static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg = { - .led_ctrl0 = 0xcc35cc35, - .led_ctrl1 = 0xca35ca35, - .led_ctrl2 = 0xc935c935, - .led_ctrl3 = 0x03ffff00, - .open_drain = false, -}; - -static struct ar8327_platform_data mynet_n750_ar8327_data = { - .pad0_cfg = &mynet_n750_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &mynet_n750_ar8327_led_cfg, - .num_leds = ARRAY_SIZE(mynet_n750_leds_ar8327), - .leds = mynet_n750_leds_ar8327, -}; - -static struct mdio_board_info mynet_n750_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &mynet_n750_ar8327_data, - }, -}; - -static void mynet_n750_get_mac(const char *name, char *mac) -{ - u8 *nvram = (u8 *) KSEG1ADDR(MYNET_N750_NVRAM_ADDR); - int err; - - err = ath79_nvram_parse_mac_addr(nvram, MYNET_N750_NVRAM_SIZE, - name, mac); - if (err) - pr_err("no MAC address found for %s\n", name); -} - -/* - * The bootloader on this board powers down all PHYs on the switch - * before booting the kernel. We bring all PHYs back up so that they are - * discoverable by the mdio bus scan and the switch is detected - * correctly. - */ -static void mynet_n750_mdio_fixup(struct mii_bus *bus) -{ - int i; - - for (i = 0; i < 5; i++) - bus->write(bus, i, MII_BMCR, - (BMCR_RESET | BMCR_ANENABLE | BMCR_SPEED1000)); - - mdelay(1000); -} - -static void __init mynet_n750_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(NULL); - ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio), - mynet_n750_leds_gpio); - ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mynet_n750_gpio_keys), - mynet_n750_gpio_keys); - /* - * Control signal for external LNAs 0 and 1 - * Taken from GPL bootloader source: - * board/ar7240/db12x/alpha_gpio.c - */ - ath79_wmac_set_ext_lna_gpio(0, MYNET_N750_GPIO_EXTERNAL_LNA0); - ath79_wmac_set_ext_lna_gpio(1, MYNET_N750_GPIO_EXTERNAL_LNA1); - - mynet_n750_get_mac("wlan24mac=", tmpmac); - ath79_register_wmac(art + MYNET_N750_WMAC_CALDATA_OFFSET, tmpmac); - - mynet_n750_get_mac("wlan5mac=", tmpmac); - ap91_pci_init(art + MYNET_N750_PCIE_CALDATA_OFFSET, tmpmac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); - - mdiobus_register_board_info(mynet_n750_mdio0_info, - ARRAY_SIZE(mynet_n750_mdio0_info)); - - ath79_mdio0_data.reset = mynet_n750_mdio_fixup; - ath79_register_mdio(0, 0x0); - - mynet_n750_get_mac("lanmac=", ath79_eth0_data.mac_addr); - - /* GMAC0 is connected to an AR8327N switch */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - ath79_register_eth(0); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_MYNET_N750, "MYNET-N750", "WD My Net N750", - mynet_n750_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-rext.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-rext.c deleted file mode 100644 index a3deed5..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mynet-rext.c +++ /dev/null @@ -1,178 +0,0 @@ -/* - * WD My Net WI-FI Range Extender (Codename:Starfish db12x) board support - * - * Copyright (C) 2013 Christian Lamparter <chunkeey@googlemail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define MYNET_REXT_GPIO_LED_POWER 11 -#define MYNET_REXT_GPIO_LED_ETHERNET 12 -#define MYNET_REXT_GPIO_LED_WIFI 19 - -#define MYNET_REXT_GPIO_LED_RF_QTY1 20 -#define MYNET_REXT_GPIO_LED_RF_QTY2 21 -#define MYNET_REXT_GPIO_LED_RF_QTY3 22 - -#define MYNET_REXT_GPIO_BTN_RESET 13 -#define MYNET_REXT_GPIO_BTN_WPS 15 -#define MYNET_REXT_GPIO_SW_RF 14 - -#define MYNET_REXT_GPIO_PHY_SWRST 16 /* disables Ethernet PHY */ -#define MYNET_REXT_GPIO_PHY_INT 17 -#define MYNET_REXT_GPIO_18 18 - -#define MYNET_REXT_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MYNET_REXT_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_REXT_KEYS_POLL_INTERVAL) - -#define MYNET_REXT_WMAC_CALDATA_OFFSET 0x1000 - -#define MYNET_REXT_NVRAM_ADDR 0x1f7e0010 -#define MYNET_REXT_NVRAM_SIZE 0xfff0 - -#define MYNET_REXT_ART_ADDR 0x1f7f0000 - -static struct gpio_led mynet_rext_leds_gpio[] __initdata = { - { - .name = "wd:blue:power", - .gpio = MYNET_REXT_GPIO_LED_POWER, - .active_low = 0, - }, - { - .name = "wd:blue:wireless", - .gpio = MYNET_REXT_GPIO_LED_WIFI, - .active_low = 1, - }, - { - .name = "wd:blue:ethernet", - .gpio = MYNET_REXT_GPIO_LED_ETHERNET, - .active_low = 1, - }, - { - .name = "wd:blue:quality1", - .gpio = MYNET_REXT_GPIO_LED_RF_QTY1, - .active_low = 1, - }, - { - .name = "wd:blue:quality2", - .gpio = MYNET_REXT_GPIO_LED_RF_QTY2, - .active_low = 1, - }, - { - .name = "wd:blue:quality3", - .gpio = MYNET_REXT_GPIO_LED_RF_QTY3, - .active_low = 1, - }, -}; - -static struct gpio_keys_button mynet_rext_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, - .gpio = MYNET_REXT_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, - .gpio = MYNET_REXT_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "RF Band switch", - .type = EV_SW, - .code = BTN_1, - .debounce_interval = MYNET_REXT_KEYS_DEBOUNCE_INTERVAL, - .gpio = MYNET_REXT_GPIO_SW_RF, - }, -}; - -static void mynet_rext_get_mac(const char *name, char *mac) -{ - u8 *nvram = (u8 *) KSEG1ADDR(MYNET_REXT_NVRAM_ADDR); - int err; - - err = ath79_nvram_parse_mac_addr(nvram, MYNET_REXT_NVRAM_SIZE, - name, mac); - if (err) - pr_err("no MAC address found for %s\n", name); -} - -static void __init mynet_rext_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(MYNET_REXT_ART_ADDR); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(NULL); - - /* GPIO configuration from drivers/char/GPIO8.c */ - - ath79_gpio_output_select(MYNET_REXT_GPIO_LED_POWER, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_REXT_GPIO_LED_WIFI, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY1, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY2, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_REXT_GPIO_LED_RF_QTY3, - AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(MYNET_REXT_GPIO_LED_ETHERNET, - AR934X_GPIO_OUT_GPIO); - ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_rext_leds_gpio), - mynet_rext_leds_gpio); - - ath79_register_gpio_keys_polled(-1, MYNET_REXT_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mynet_rext_gpio_keys), - mynet_rext_gpio_keys); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_RXD_DELAY | - AR934X_ETH_CFG_RDV_DELAY); - - ath79_register_mdio(0, 0x0); - - /* LAN */ - mynet_rext_get_mac("et0macaddr=", ath79_eth0_data.mac_addr); - - /* GMAC0 is connected to an external PHY on Port 4 */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(4); - ath79_eth0_pll_data.pll_1000 = 0x0e000000; /* athrs_mac.c */ - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_register_eth(0); - - /* WLAN */ - mynet_rext_get_mac("wl0_hwaddr=", tmpmac); - ap91_pci_init(art + MYNET_REXT_WMAC_CALDATA_OFFSET, tmpmac); -} - -MIPS_MACHINE(ATH79_MACH_MYNET_REXT, "MYNET-REXT", - "WD My Net Wi-Fi Range Extender", mynet_rext_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w04nu.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w04nu.c deleted file mode 100644 index c2460ce..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w04nu.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Planex MZK-W04NU board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define MZK_W04NU_GPIO_LED_USB 0 -#define MZK_W04NU_GPIO_LED_STATUS 1 -#define MZK_W04NU_GPIO_LED_WPS 3 -#define MZK_W04NU_GPIO_LED_WLAN 6 -#define MZK_W04NU_GPIO_LED_AP 15 -#define MZK_W04NU_GPIO_LED_ROUTER 16 - -#define MZK_W04NU_GPIO_BTN_APROUTER 5 -#define MZK_W04NU_GPIO_BTN_WPS 12 -#define MZK_W04NU_GPIO_BTN_RESET 21 - -#define MZK_W04NU_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL) - -static struct gpio_led mzk_w04nu_leds_gpio[] __initdata = { - { - .name = "planex:green:status", - .gpio = MZK_W04NU_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "planex:blue:wps", - .gpio = MZK_W04NU_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "planex:green:wlan", - .gpio = MZK_W04NU_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "planex:green:usb", - .gpio = MZK_W04NU_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "planex:green:ap", - .gpio = MZK_W04NU_GPIO_LED_AP, - .active_low = 1, - }, { - .name = "planex:green:router", - .gpio = MZK_W04NU_GPIO_LED_ROUTER, - .active_low = 1, - } -}; - -static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "aprouter", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_APROUTER, - .active_low = 0, - } -}; - -#define MZK_W04NU_WAN_PHYMASK BIT(4) -#define MZK_W04NU_MDIO_MASK (~MZK_W04NU_WAN_PHYMASK) - -static void __init mzk_w04nu_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, MZK_W04NU_MDIO_MASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio), - mzk_w04nu_leds_gpio); - - ath79_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mzk_w04nu_gpio_keys), - mzk_w04nu_gpio_keys); - ath79_register_usb(); - - ath79_register_wmac(eeprom, NULL); -} - -MIPS_MACHINE(ATH79_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU", - mzk_w04nu_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w300nh.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w300nh.c deleted file mode 100644 index 8c40365..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w300nh.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Planex MZK-W300NH board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define MZK_W300NH_GPIO_LED_STATUS 1 -#define MZK_W300NH_GPIO_LED_WPS 3 -#define MZK_W300NH_GPIO_LED_WLAN 6 -#define MZK_W300NH_GPIO_LED_AP_GREEN 15 -#define MZK_W300NH_GPIO_LED_AP_AMBER 16 - -#define MZK_W300NH_GPIO_BTN_APROUTER 5 -#define MZK_W300NH_GPIO_BTN_WPS 12 -#define MZK_W300NH_GPIO_BTN_RESET 21 - -#define MZK_W300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MZK_W300NH_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W300NH_KEYS_POLL_INTERVAL) - -static struct gpio_led mzk_w300nh_leds_gpio[] __initdata = { - { - .name = "planex:green:status", - .gpio = MZK_W300NH_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "planex:blue:wps", - .gpio = MZK_W300NH_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "planex:green:wlan", - .gpio = MZK_W300NH_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "planex:green:aprouter", - .gpio = MZK_W300NH_GPIO_LED_AP_GREEN, - }, { - .name = "planex:amber:aprouter", - .gpio = MZK_W300NH_GPIO_LED_AP_AMBER, - } -}; - -static struct gpio_keys_button mzk_w300nh_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "aprouter", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_APROUTER, - .active_low = 0, - } -}; - -#define MZK_W300NH_WAN_PHYMASK BIT(4) -#define MZK_W300NH_MDIO_MASK (~MZK_W300NH_WAN_PHYMASK) - -static void __init mzk_w300nh_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, MZK_W300NH_MDIO_MASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w300nh_leds_gpio), - mzk_w300nh_leds_gpio); - - ath79_register_gpio_keys_polled(-1, MZK_W300NH_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mzk_w300nh_gpio_keys), - mzk_w300nh_gpio_keys); - ath79_register_wmac(eeprom, NULL); -} - -MIPS_MACHINE(ATH79_MACH_MZK_W300NH, "MZK-W300NH", "Planex MZK-W300NH", - mzk_w300nh_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg460n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg460n.c deleted file mode 100644 index ca00777..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg460n.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Zyxel NBG 460N/550N/550NH board support - * - * Copyright (C) 2010 Michael Kurz <michi.kurz@googlemail.com> - * - * based on mach-tl-wr1043nd.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/delay.h> -#include <linux/i2c.h> -#include <linux/i2c-algo-bit.h> -#include <linux/i2c-gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> -#include <linux/rtl8366.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -/* LEDs */ -#define NBG460N_GPIO_LED_WPS 3 -#define NBG460N_GPIO_LED_WAN 6 -#define NBG460N_GPIO_LED_POWER 14 -#define NBG460N_GPIO_LED_WLAN 15 - -/* Buttons */ -#define NBG460N_GPIO_BTN_WPS 12 -#define NBG460N_GPIO_BTN_RESET 21 - -#define NBG460N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define NBG460N_KEYS_DEBOUNCE_INTERVAL (3 * NBG460N_KEYS_POLL_INTERVAL) - -/* RTC chip PCF8563 I2C interface */ -#define NBG460N_GPIO_PCF8563_SDA 8 -#define NBG460N_GPIO_PCF8563_SCK 7 - -/* Switch configuration I2C interface */ -#define NBG460N_GPIO_RTL8366_SDA 16 -#define NBG460N_GPIO_RTL8366_SCK 18 - -static struct mtd_partition nbg460n_partitions[] = { - { - .name = "Bootbase", - .offset = 0, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "U-Boot Config", - .offset = 0x010000, - .size = 0x030000, - }, { - .name = "U-Boot", - .offset = 0x040000, - .size = 0x030000, - }, { - .name = "linux", - .offset = 0x070000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x150000, - .size = 0x2a0000, - }, { - .name = "CalibData", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x070000, - .size = 0x380000, - } -}; - -static struct flash_platform_data nbg460n_flash_data = { - .parts = nbg460n_partitions, - .nr_parts = ARRAY_SIZE(nbg460n_partitions), -}; - -static struct gpio_led nbg460n_leds_gpio[] __initdata = { - { - .name = "nbg460n:green:power", - .gpio = NBG460N_GPIO_LED_POWER, - .active_low = 0, - .default_trigger = "default-on", - }, { - .name = "nbg460n:green:wps", - .gpio = NBG460N_GPIO_LED_WPS, - .active_low = 0, - }, { - .name = "nbg460n:green:wlan", - .gpio = NBG460N_GPIO_LED_WLAN, - .active_low = 0, - }, { - /* Not really for controlling the LED, - when set low the LED blinks uncontrollable */ - .name = "nbg460n:green:wan", - .gpio = NBG460N_GPIO_LED_WAN, - .active_low = 0, - } -}; - -static struct gpio_keys_button nbg460n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG460N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG460N_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data nbg460n_i2c_device_platdata = { - .sda_pin = NBG460N_GPIO_PCF8563_SDA, - .scl_pin = NBG460N_GPIO_PCF8563_SCK, - .udelay = 10, -}; - -static struct platform_device nbg460n_i2c_device = { - .name = "i2c-gpio", - .id = -1, - .num_resources = 0, - .resource = NULL, - .dev = { - .platform_data = &nbg460n_i2c_device_platdata, - }, -}; - -static struct i2c_board_info nbg460n_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("pcf8563", 0x51), - }, -}; - -static void nbg460n_i2c_init(void) -{ - /* The gpio interface */ - platform_device_register(&nbg460n_i2c_device); - /* I2C devices */ - i2c_register_board_info(0, nbg460n_i2c_devs, - ARRAY_SIZE(nbg460n_i2c_devs)); -} - - -static struct rtl8366_platform_data nbg460n_rtl8366s_data = { - .gpio_sda = NBG460N_GPIO_RTL8366_SDA, - .gpio_sck = NBG460N_GPIO_RTL8366_SCK, -}; - -static struct platform_device nbg460n_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &nbg460n_rtl8366s_data, - } -}; - -static void __init nbg460n_setup(void) -{ - /* end of bootloader sector contains mac address */ - u8 *mac = (u8 *) KSEG1ADDR(0x1fc0fff8); - /* last sector contains wlan calib data */ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - /* LAN Port */ - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - /* WAN Port */ - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - ath79_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - /* register the switch phy */ - platform_device_register(&nbg460n_rtl8366s_device); - - /* register flash */ - ath79_register_m25p80(&nbg460n_flash_data); - - ath79_register_wmac(eeprom, mac); - - /* register RTC chip */ - nbg460n_i2c_init(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(nbg460n_leds_gpio), - nbg460n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, NBG460N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(nbg460n_gpio_keys), - nbg460n_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", - nbg460n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c deleted file mode 100644 index e102f2c..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c +++ /dev/null @@ -1,268 +0,0 @@ -/* - * ZyXEL NBG6716 board support - * - * Based on the Qualcomm Atheros AP135/AP136 reference board support code - * Copyright (c) 2012 Qualcomm Atheros - * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org> - * Copyright (c) 2013 Andre Valentin <avalentin@marcant.net> - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include <linux/platform_device.h> -#include <linux/ar8216_platform.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/platform/ar934x_nfc.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "pci.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-eth.h" -#include "dev-leds-gpio.h" -#include "dev-nfc.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define NBG6716_GPIO_LED_INTERNET 18 -#define NBG6716_GPIO_LED_POWER 15 -#define NBG6716_GPIO_LED_USB0 4 -#define NBG6716_GPIO_LED_USB1 13 -#define NBG6716_GPIO_LED_WIFI2G 19 -#define NBG6716_GPIO_LED_WIFI5G 17 -#define NBG6716_GPIO_LED_WPS 21 - -#define NBG6716_GPIO_BTN_RESET 23 -#define NBG6716_GPIO_BTN_RFKILL 1 -#define NBG6716_GPIO_BTN_USB0 14 -#define NBG6716_GPIO_BTN_USB1 0 -#define NBG6716_GPIO_BTN_WPS 22 - -#define NBG6716_KEYS_POLL_INTERVAL 20 /* msecs */ -#define NBG6716_KEYS_DEBOUNCE_INTERVAL (3 * NBG6716_KEYS_POLL_INTERVAL) - -#define NBG6716_MAC0_OFFSET 0 -#define NBG6716_MAC1_OFFSET 6 -#define NBG6716_WMAC_CALDATA_OFFSET 0x1000 -#define NBG6716_PCIE_CALDATA_OFFSET 0x5000 - -static struct gpio_led nbg6716_leds_gpio[] __initdata = { - { - .name = "zyxel:white:internet", - .gpio = NBG6716_GPIO_LED_INTERNET, - .active_low = 1, - }, - { - .name = "zyxel:white:power", - .gpio = NBG6716_GPIO_LED_POWER, - .active_low = 1, - }, - { - .name = "zyxel:white:usb0", - .gpio = NBG6716_GPIO_LED_USB0, - .active_low = 1, - }, - { - .name = "zyxel:white:usb1", - .gpio = NBG6716_GPIO_LED_USB1, - .active_low = 1, - }, - { - .name = "zyxel:white:wifi2g", - .gpio = NBG6716_GPIO_LED_WIFI2G, - .active_low = 1, - }, - { - .name = "zyxel:white:wifi5g", - .gpio = NBG6716_GPIO_LED_WIFI5G, - .active_low = 1, - }, - { - .name = "zyxel:white:wps", - .gpio = NBG6716_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button nbg6716_gpio_keys[] __initdata = { - { - .desc = "RESET button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG6716_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "RFKILL button", - .type = EV_KEY, - .code = KEY_RFKILL, - .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG6716_GPIO_BTN_RFKILL, - .active_low = 1, - }, - { - .desc = "USB0 eject button", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG6716_GPIO_BTN_USB0, - .active_low = 1, - }, - { - .desc = "USB1 eject button", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG6716_GPIO_BTN_USB1, - .active_low = 1, - }, - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = NBG6716_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG6716_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -static struct ar8327_pad_cfg nbg6716_ar8327_pad0_cfg; -static struct ar8327_pad_cfg nbg6716_ar8327_pad6_cfg; -static struct ar8327_led_cfg nbg6716_ar8327_led_cfg; - -static struct ar8327_platform_data nbg6716_ar8327_data = { - .pad0_cfg = &nbg6716_ar8327_pad0_cfg, - .pad6_cfg = &nbg6716_ar8327_pad6_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .port6_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &nbg6716_ar8327_led_cfg -}; - -static struct mdio_board_info nbg6716_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &nbg6716_ar8327_data, - }, -}; - -static void nbg6716_get_mac(const char *name, char *mac) -{ - u8 *nvram = (u8 *) KSEG1ADDR(0x1f040000); - int err; - - err = ath79_nvram_parse_mac_addr(nvram, 0x10000, - name, mac); - if (err) - pr_err("no MAC address found for %s\n", name); -} - -static void __init nbg6716_common_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1f050000); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(nbg6716_leds_gpio), - nbg6716_leds_gpio); - ath79_register_gpio_keys_polled(-1, NBG6716_KEYS_POLL_INTERVAL, - ARRAY_SIZE(nbg6716_gpio_keys), - nbg6716_gpio_keys); - - ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); - ath79_register_nfc(); - - ath79_register_usb(); - - nbg6716_get_mac("ethaddr=", tmpmac); - - ath79_register_pci(); - - ath79_register_wmac(art + NBG6716_WMAC_CALDATA_OFFSET, tmpmac); - - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, tmpmac, 2); - ath79_init_mac(ath79_eth1_data.mac_addr, tmpmac, 3); - - mdiobus_register_board_info(nbg6716_mdio0_info, - ARRAY_SIZE(nbg6716_mdio0_info)); - - /* GMAC0 is connected to the RMGII interface */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - - ath79_register_eth(0); - - /* GMAC1 is connected to the SGMII interface */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(1); -} - -static void __init nbg6716_010_setup(void) -{ - /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ - nbg6716_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; - nbg6716_ar8327_pad0_cfg.txclk_delay_en = true; - nbg6716_ar8327_pad0_cfg.rxclk_delay_en = true; - nbg6716_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; - nbg6716_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; - - /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ - nbg6716_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; - nbg6716_ar8327_pad6_cfg.rxclk_delay_en = true; - nbg6716_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; - - ath79_eth0_pll_data.pll_1000 = 0xa6000000; - ath79_eth1_pll_data.pll_1000 = 0x03000101; - - nbg6716_ar8327_led_cfg.open_drain = 0; - nbg6716_ar8327_led_cfg.led_ctrl0 = 0xffb7ffb7; - nbg6716_ar8327_led_cfg.led_ctrl1 = 0xffb7ffb7; - nbg6716_ar8327_led_cfg.led_ctrl2 = 0xffb7ffb7; - nbg6716_ar8327_led_cfg.led_ctrl3 = 0x03ffff00; - - nbg6716_common_setup(); -} - -MIPS_MACHINE(ATH79_MACH_NBG6716, "NBG6716", - "Zyxel NBG6716", - nbg6716_010_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c deleted file mode 100644 index 24f4527..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * OpenMesh OM2P support - * - * Copyright (C) 2011 Marek Lindner <marek@open-mesh.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define OM2P_GPIO_LED_POWER 0 -#define OM2P_GPIO_LED_GREEN 13 -#define OM2P_GPIO_LED_RED 14 -#define OM2P_GPIO_LED_YELLOW 15 -#define OM2P_GPIO_LED_LAN 16 -#define OM2P_GPIO_LED_WAN 17 -#define OM2P_GPIO_BTN_RESET 11 - -#define OM2P_KEYS_POLL_INTERVAL 20 /* msecs */ -#define OM2P_KEYS_DEBOUNCE_INTERVAL (3 * OM2P_KEYS_POLL_INTERVAL) - -#define OM2P_WAN_PHYMASK BIT(4) - -#define OM2P_LC_GPIO_LED_POWER 1 -#define OM2P_LC_GPIO_LED_GREEN 15 -#define OM2P_LC_GPIO_LED_RED 16 -#define OM2P_LC_GPIO_LED_YELLOW 0 -#define OM2P_LC_GPIO_LED_LAN 13 -#define OM2P_LC_GPIO_LED_WAN 17 -#define OM2P_LC_GPIO_BTN_RESET 12 - -static struct flash_platform_data om2p_flash_data = { - .type = "s25sl12800", - .name = "ar7240-nor0", -}; - -static struct gpio_led om2p_leds_gpio[] __initdata = { - { - .name = "om2p:blue:power", - .gpio = OM2P_GPIO_LED_POWER, - .active_low = 1, - }, { - .name = "om2p:red:wifi", - .gpio = OM2P_GPIO_LED_RED, - .active_low = 1, - }, { - .name = "om2p:yellow:wifi", - .gpio = OM2P_GPIO_LED_YELLOW, - .active_low = 1, - }, { - .name = "om2p:green:wifi", - .gpio = OM2P_GPIO_LED_GREEN, - .active_low = 1, - }, { - .name = "om2p:blue:lan", - .gpio = OM2P_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "om2p:blue:wan", - .gpio = OM2P_GPIO_LED_WAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button om2p_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL, - .gpio = OM2P_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init om2p_setup(void) -{ - u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); - u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); - u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_m25p80(&om2p_flash_data); - - ath79_register_mdio(0, ~OM2P_WAN_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); - - ath79_register_eth(0); - ath79_register_eth(1); - - ap91_pci_init(ee, NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), - om2p_leds_gpio); - - ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, - ARRAY_SIZE(om2p_gpio_keys), - om2p_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup); - - -static struct flash_platform_data om2p_lc_flash_data = { - .type = "s25sl12800", -}; - -static void __init om2p_lc_setup(void) -{ - u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); - u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); - u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000); - u32 t; - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; - ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); - - ath79_register_m25p80(&om2p_lc_flash_data); - - om2p_leds_gpio[0].gpio = OM2P_LC_GPIO_LED_POWER; - om2p_leds_gpio[1].gpio = OM2P_LC_GPIO_LED_RED; - om2p_leds_gpio[2].gpio = OM2P_LC_GPIO_LED_YELLOW; - om2p_leds_gpio[3].gpio = OM2P_LC_GPIO_LED_GREEN; - om2p_leds_gpio[4].gpio = OM2P_LC_GPIO_LED_LAN; - om2p_leds_gpio[5].gpio = OM2P_LC_GPIO_LED_WAN; - ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), - om2p_leds_gpio); - - om2p_gpio_keys[0].gpio = OM2P_LC_GPIO_BTN_RESET; - ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, - ARRAY_SIZE(om2p_gpio_keys), - om2p_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); - - ath79_register_mdio(0, 0x0); - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_wmac(art, NULL); -} - -MIPS_MACHINE(ATH79_MACH_OM2P_LC, "OM2P-LC", "OpenMesh OM2P LC", om2p_lc_setup); -MIPS_MACHINE(ATH79_MACH_OM2Pv2, "OM2Pv2", "OpenMesh OM2Pv2", om2p_lc_setup); - -static void __init om2p_hs_setup(void) -{ - u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); - u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); - u8 *art = (u8 *)KSEG1ADDR(0x1ffc1000); - - /* make lan / wan leds software controllable */ - ath79_gpio_output_select(OM2P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(OM2P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); - - /* enable reset button */ - ath79_gpio_output_select(OM2P_GPIO_BTN_RESET, AR934X_GPIO_OUT_GPIO); - ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE); - - om2p_leds_gpio[4].gpio = OM2P_GPIO_LED_WAN; - om2p_leds_gpio[5].gpio = OM2P_GPIO_LED_LAN; - - ath79_register_m25p80(&om2p_lc_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), - om2p_leds_gpio); - ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, - ARRAY_SIZE(om2p_gpio_keys), - om2p_gpio_keys); - - ath79_register_wmac(art, NULL); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); - - /* GMAC0 is connected to the PHY0 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - /* GMAC1 is connected to the internal switch */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_register_eth(1); -} - -MIPS_MACHINE(ATH79_MACH_OM2P_HS, "OM2P-HS", "OpenMesh OM2P HS", om2p_hs_setup); -MIPS_MACHINE(ATH79_MACH_OM2P_HSv2, "OM2P-HSv2", "OpenMesh OM2P HSv2", om2p_hs_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c deleted file mode 100644 index c1cfa18..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * OpenMesh OM5P support - * - * Copyright (C) 2013 Marek Lindner <marek@open-mesh.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define OM5P_GPIO_LED_POWER 13 -#define OM5P_GPIO_LED_GREEN 16 -#define OM5P_GPIO_LED_RED 19 -#define OM5P_GPIO_LED_YELLOW 17 -#define OM5P_GPIO_LED_LAN 14 -#define OM5P_GPIO_LED_WAN 15 -#define OM5P_GPIO_BTN_RESET 4 - -#define OM5P_KEYS_POLL_INTERVAL 20 /* msecs */ -#define OM5P_KEYS_DEBOUNCE_INTERVAL (3 * OM5P_KEYS_POLL_INTERVAL) - -#define OM5P_WMAC_CALDATA_OFFSET 0x1000 - -static struct gpio_led om5p_leds_gpio[] __initdata = { - { - .name = "om5p:blue:power", - .gpio = OM5P_GPIO_LED_POWER, - .active_low = 1, - }, { - .name = "om5p:red:wifi", - .gpio = OM5P_GPIO_LED_RED, - .active_low = 1, - }, { - .name = "om5p:yellow:wifi", - .gpio = OM5P_GPIO_LED_YELLOW, - .active_low = 1, - }, { - .name = "om5p:green:wifi", - .gpio = OM5P_GPIO_LED_GREEN, - .active_low = 1, - }, { - .name = "om5p:blue:lan", - .gpio = OM5P_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "om5p:blue:wan", - .gpio = OM5P_GPIO_LED_WAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button om5p_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = OM5P_KEYS_DEBOUNCE_INTERVAL, - .gpio = OM5P_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct flash_platform_data om5p_flash_data = { - .type = "mx25l12805d", -}; - -static void __init om5p_setup(void) -{ - u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); - u8 mac[6]; - - /* make lan / wan leds software controllable */ - ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); - ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); - - ath79_register_m25p80(&om5p_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), - om5p_leds_gpio); - ath79_register_gpio_keys_polled(-1, OM5P_KEYS_POLL_INTERVAL, - ARRAY_SIZE(om5p_gpio_keys), - om5p_gpio_keys); - - ath79_init_mac(mac, art, 2); - ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); - - /* GMAC0 is connected to the PHY0 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - /* GMAC1 is connected to the internal switch */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_register_eth(1); -} - -MIPS_MACHINE(ATH79_MACH_OM5P, "OM5P", "OpenMesh OM5P", om5p_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-pb42.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-pb42.c deleted file mode 100644 index 3a350e9..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-pb42.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Atheros PB42 board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define PB42_KEYS_POLL_INTERVAL 20 /* msecs */ -#define PB42_KEYS_DEBOUNCE_INTERVAL (3 * PB42_KEYS_POLL_INTERVAL) - -#define PB42_GPIO_BTN_SW4 8 -#define PB42_GPIO_BTN_SW5 3 - -static struct gpio_keys_button pb42_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB42_GPIO_BTN_SW4, - .active_low = 1, - }, { - .desc = "sw5", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB42_GPIO_BTN_SW5, - .active_low = 1, - } -}; - -static const char *pb42_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data pb42_flash_data = { - .part_probes = pb42_part_probes, -}; - -#define PB42_WAN_PHYMASK BIT(20) -#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) -#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) - -static void __init pb42_init(void) -{ - ath79_register_m25p80(&pb42_flash_data); - - ath79_register_mdio(0, ~PB42_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = PB42_WAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.speed = SPEED_100; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL, - ARRAY_SIZE(pb42_gpio_keys), - pb42_gpio_keys); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_PB42, "PB42", "Atheros PB42", pb42_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-pb92.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-pb92.c deleted file mode 100644 index 76715a5..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-pb92.c +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Atheros PB92 board support - * - * Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */ -#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL) - -#define PB92_GPIO_BTN_SW4 8 -#define PB92_GPIO_BTN_SW5 3 - -static struct gpio_keys_button pb92_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB92_GPIO_BTN_SW4, - .active_low = 1, - }, { - .desc = "sw5", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB92_GPIO_BTN_SW5, - .active_low = 1, - } -}; - -static void __init pb92_init(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(NULL); - - ath79_register_mdio(0, ~BIT(0)); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_eth(0); - - ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL, - ARRAY_SIZE(pb92_gpio_keys), - pb92_gpio_keys); - - ath79_register_usb(); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c deleted file mode 100644 index b73fae6..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb2011.c +++ /dev/null @@ -1,331 +0,0 @@ -/* - * MikroTik RouterBOARD 2011 support - * - * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be> - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define pr_fmt(fmt) "rb2011: " fmt - -#include <linux/phy.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/routerboot.h> -#include <linux/gpio.h> - -#include <asm/prom.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-nfc.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "routerboot.h" - -#define RB2011_GPIO_NAND_NCE 14 -#define RB2011_GPIO_SFP_LOS 21 - -#define RB_ROUTERBOOT_OFFSET 0x0000 -#define RB_ROUTERBOOT_MIN_SIZE 0xb000 -#define RB_HARD_CFG_SIZE 0x1000 -#define RB_BIOS_OFFSET 0xd000 -#define RB_BIOS_SIZE 0x1000 -#define RB_SOFT_CFG_OFFSET 0xf000 -#define RB_SOFT_CFG_SIZE 0x1000 - -#define RB_ART_SIZE 0x10000 - -#define RB2011_FLAG_SFP BIT(0) -#define RB2011_FLAG_USB BIT(1) -#define RB2011_FLAG_WLAN BIT(2) - -static struct mtd_partition rb2011_spi_partitions[] = { - { - .name = "routerboot", - .offset = RB_ROUTERBOOT_OFFSET, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "hard_config", - .size = RB_HARD_CFG_SIZE, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "bios", - .offset = RB_BIOS_OFFSET, - .size = RB_BIOS_SIZE, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "soft_config", - .size = RB_SOFT_CFG_SIZE, - } -}; - -static void __init rb2011_init_partitions(const struct rb_info *info) -{ - rb2011_spi_partitions[0].size = info->hard_cfg_offs; - rb2011_spi_partitions[1].offset = info->hard_cfg_offs; - rb2011_spi_partitions[3].offset = info->soft_cfg_offs; -} - -static struct mtd_partition rb2011_nand_partitions[] = { - { - .name = "booter", - .offset = 0, - .size = (256 * 1024), - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = (256 * 1024), - .size = (4 * 1024 * 1024) - (256 * 1024), - }, - { - .name = "rootfs", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct flash_platform_data rb2011_spi_flash_data = { - .parts = rb2011_spi_partitions, - .nr_parts = ARRAY_SIZE(rb2011_spi_partitions), -}; - -static struct ar8327_pad_cfg rb2011_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL3, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, -}; - -static struct ar8327_pad_cfg rb2011_ar8327_pad6_cfg; -static struct ar8327_sgmii_cfg rb2011_ar8327_sgmii_cfg; - -static struct ar8327_led_cfg rb2011_ar8327_led_cfg = { - .led_ctrl0 = 0xc731c731, - .led_ctrl1 = 0x00000000, - .led_ctrl2 = 0x00000000, - .led_ctrl3 = 0x0030c300, - .open_drain = false, -}; - -static const struct ar8327_led_info rb2011_ar8327_leds[] __initconst = { - AR8327_LED_INFO(PHY0_0, HW, "rb:green:eth1"), - AR8327_LED_INFO(PHY1_0, HW, "rb:green:eth2"), - AR8327_LED_INFO(PHY2_0, HW, "rb:green:eth3"), - AR8327_LED_INFO(PHY3_0, HW, "rb:green:eth4"), - AR8327_LED_INFO(PHY4_0, HW, "rb:green:eth5"), - AR8327_LED_INFO(PHY0_1, SW, "rb:green:eth6"), - AR8327_LED_INFO(PHY1_1, SW, "rb:green:eth7"), - AR8327_LED_INFO(PHY2_1, SW, "rb:green:eth8"), - AR8327_LED_INFO(PHY3_1, SW, "rb:green:eth9"), - AR8327_LED_INFO(PHY4_1, SW, "rb:green:eth10"), - AR8327_LED_INFO(PHY4_2, SW, "rb:green:usr"), -}; - -static struct ar8327_platform_data rb2011_ar8327_data = { - .pad0_cfg = &rb2011_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &rb2011_ar8327_led_cfg, - .num_leds = ARRAY_SIZE(rb2011_ar8327_leds), - .leds = rb2011_ar8327_leds, -}; - -static struct mdio_board_info rb2011_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &rb2011_ar8327_data, - }, -}; - -static void __init rb2011_wlan_init(void) -{ - char *art_buf; - u8 wlan_mac[ETH_ALEN]; - - art_buf = rb_get_wlan_data(); - if (art_buf == NULL) - return; - - ath79_init_mac(wlan_mac, ath79_mac_base, 11); - ath79_register_wmac(art_buf + 0x1000, wlan_mac); - - kfree(art_buf); -} - -static void rb2011_nand_select_chip(int chip_no) -{ - switch (chip_no) { - case 0: - gpio_set_value(RB2011_GPIO_NAND_NCE, 0); - break; - default: - gpio_set_value(RB2011_GPIO_NAND_NCE, 1); - break; - } - ndelay(500); -} - -static struct nand_ecclayout rb2011_nand_ecclayout = { - .eccbytes = 6, - .eccpos = { 8, 9, 10, 13, 14, 15 }, - .oobavail = 9, - .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -}; - -static int rb2011_nand_scan_fixup(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - - if (mtd->writesize == 512) { - /* - * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot - * will not be able to find the kernel that we load. - */ - chip->ecc.layout = &rb2011_nand_ecclayout; - } - - return 0; -} - -static void __init rb2011_nand_init(void) -{ - gpio_request_one(RB2011_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); - - ath79_nfc_set_scan_fixup(rb2011_nand_scan_fixup); - ath79_nfc_set_parts(rb2011_nand_partitions, - ARRAY_SIZE(rb2011_nand_partitions)); - ath79_nfc_set_select_chip(rb2011_nand_select_chip); - ath79_nfc_set_swap_dma(true); - ath79_register_nfc(); -} - -static int rb2011_get_port_link(unsigned port) -{ - if (port != 6) - return -EINVAL; - - /* The Loss of signal line is active low */ - return !gpio_get_value(RB2011_GPIO_SFP_LOS); -} - -static void __init rb2011_sfp_init(void) -{ - gpio_request_one(RB2011_GPIO_SFP_LOS, GPIOF_IN, "SFP LOS"); - - rb2011_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; - - rb2011_ar8327_data.pad6_cfg = &rb2011_ar8327_pad6_cfg; - - rb2011_ar8327_sgmii_cfg.sgmii_ctrl = 0xc70167d0; - rb2011_ar8327_sgmii_cfg.serdes_aen = true; - - rb2011_ar8327_data.sgmii_cfg = &rb2011_ar8327_sgmii_cfg; - - rb2011_ar8327_data.port6_cfg.force_link = 1; - rb2011_ar8327_data.port6_cfg.speed = AR8327_PORT_SPEED_1000; - rb2011_ar8327_data.port6_cfg.duplex = 1; - - rb2011_ar8327_data.get_port_link = rb2011_get_port_link; -} - -static int __init rb2011_setup(u32 flags) -{ - const struct rb_info *info; - char buf[64]; - - info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); - if (!info) - return -ENODEV; - - scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", - (info->board_name) ? info->board_name : ""); - mips_set_machine_name(buf); - - rb2011_init_partitions(info); - - ath79_register_m25p80(&rb2011_spi_flash_data); - rb2011_nand_init(); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(1, 0x0); - ath79_register_mdio(0, 0x0); - - mdiobus_register_board_info(rb2011_mdio0_info, - ARRAY_SIZE(rb2011_mdio0_info)); - - /* GMAC0 is connected to an ar8327 switch */ - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - - ath79_register_eth(0); - - /* GMAC1 is connected to the internal switch */ - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 5); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(1); - - if (flags & RB2011_FLAG_SFP) - rb2011_sfp_init(); - - if (flags & RB2011_FLAG_WLAN) - rb2011_wlan_init(); - - if (flags & RB2011_FLAG_USB) - ath79_register_usb(); - - return 0; -} - -static void __init rb2011l_setup(void) -{ - rb2011_setup(0); -} - -MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011L, "2011L", rb2011l_setup); - -static void __init rb2011us_setup(void) -{ - rb2011_setup(RB2011_FLAG_SFP | RB2011_FLAG_USB); -} - -MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011US, "2011US", rb2011us_setup); - -static void __init rb2011g_setup(void) -{ - rb2011_setup(RB2011_FLAG_SFP | - RB2011_FLAG_USB | - RB2011_FLAG_WLAN); -} - -MIPS_MACHINE_NONAME(ATH79_MACH_RB_2011G, "2011G", rb2011g_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb4xx.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb4xx.c deleted file mode 100644 index 1a61b45..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb4xx.c +++ /dev/null @@ -1,465 +0,0 @@ -/* - * MikroTik RouterBOARD 4xx series support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/irq.h> -#include <linux/mdio-gpio.h> -#include <linux/mmc/host.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/spi/mmc_spi.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/rb4xx_cpld.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define RB4XX_GPIO_USER_LED 4 -#define RB4XX_GPIO_RESET_SWITCH 7 - -#define RB4XX_GPIO_CPLD_BASE 32 -#define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1) -#define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2) -#define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3) -#define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4) -#define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5) - -#define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ -#define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) - -static struct gpio_led rb4xx_leds_gpio[] __initdata = { - { - .name = "rb4xx:yellow:user", - .gpio = RB4XX_GPIO_USER_LED, - .active_low = 0, - }, { - .name = "rb4xx:green:led1", - .gpio = RB4XX_GPIO_CPLD_LED1, - .active_low = 1, - }, { - .name = "rb4xx:green:led2", - .gpio = RB4XX_GPIO_CPLD_LED2, - .active_low = 1, - }, { - .name = "rb4xx:green:led3", - .gpio = RB4XX_GPIO_CPLD_LED3, - .active_low = 1, - }, { - .name = "rb4xx:green:led4", - .gpio = RB4XX_GPIO_CPLD_LED4, - .active_low = 1, - }, { - .name = "rb4xx:green:led5", - .gpio = RB4XX_GPIO_CPLD_LED5, - .active_low = 0, - }, -}; - -static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { - { - .desc = "reset_switch", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL, - .gpio = RB4XX_GPIO_RESET_SWITCH, - .active_low = 1, - } -}; - -static struct platform_device rb4xx_nand_device = { - .name = "rb4xx-nand", - .id = -1, -}; - -static struct ath79_pci_irq rb4xx_pci_irqs[] __initdata = { - { - .slot = 17, - .pin = 1, - .irq = ATH79_PCI_IRQ(2), - }, { - .slot = 18, - .pin = 1, - .irq = ATH79_PCI_IRQ(0), - }, { - .slot = 18, - .pin = 2, - .irq = ATH79_PCI_IRQ(1), - }, { - .slot = 19, - .pin = 1, - .irq = ATH79_PCI_IRQ(1), - }, { - .slot = 19, - .pin = 2, - .irq = ATH79_PCI_IRQ(2), - }, { - .slot = 20, - .pin = 1, - .irq = ATH79_PCI_IRQ(2), - }, { - .slot = 20, - .pin = 2, - .irq = ATH79_PCI_IRQ(0), - }, { - .slot = 21, - .pin = 1, - .irq = ATH79_PCI_IRQ(0), - }, { - .slot = 22, - .pin = 1, - .irq = ATH79_PCI_IRQ(1), - }, { - .slot = 22, - .pin = 2, - .irq = ATH79_PCI_IRQ(2), - }, { - .slot = 23, - .pin = 1, - .irq = ATH79_PCI_IRQ(2), - }, { - .slot = 23, - .pin = 2, - .irq = ATH79_PCI_IRQ(0), - } -}; - -static struct mtd_partition rb4xx_partitions[] = { - { - .name = "routerboot", - .offset = 0, - .size = 0x0b000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "hard_config", - .offset = 0x0b000, - .size = 0x01000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "bios", - .offset = 0x0d000, - .size = 0x02000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "soft_config", - .offset = 0x0f000, - .size = 0x01000, - } -}; - -static struct flash_platform_data rb4xx_flash_data = { - .type = "pm25lv512", - .parts = rb4xx_partitions, - .nr_parts = ARRAY_SIZE(rb4xx_partitions), -}; - -static struct rb4xx_cpld_platform_data rb4xx_cpld_data = { - .gpio_base = RB4XX_GPIO_CPLD_BASE, -}; - -static struct mmc_spi_platform_data rb4xx_mmc_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct spi_board_info rb4xx_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .platform_data = &rb4xx_flash_data, - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "spi-rb4xx-cpld", - .platform_data = &rb4xx_cpld_data, - } -}; - -static struct spi_board_info rb4xx_microsd_info[] = { - { - .bus_num = 0, - .chip_select = 2, - .max_speed_hz = 25000000, - .modalias = "mmc_spi", - .platform_data = &rb4xx_mmc_data, - } -}; - - -static struct resource rb4xx_spi_resources[] = { - { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device rb4xx_spi_device = { - .name = "rb4xx-spi", - .id = -1, - .resource = rb4xx_spi_resources, - .num_resources = ARRAY_SIZE(rb4xx_spi_resources), -}; - -static void __init rb4xx_generic_setup(void) -{ - ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), - rb4xx_leds_gpio); - - ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rb4xx_gpio_keys), - rb4xx_gpio_keys); - - spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); - platform_device_register(&rb4xx_spi_device); - platform_device_register(&rb4xx_nand_device); -} - -static void __init rb411_setup(void) -{ - rb4xx_generic_setup(); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - ath79_register_mdio(0, 0xfffffffc); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = 0x00000003; - - ath79_register_eth(0); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH", - rb411_setup); - -static void __init rb411u_setup(void) -{ - rb411_setup(); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U", - rb411u_setup); - -#define RB433_LAN_PHYMASK BIT(0) -#define RB433_WAN_PHYMASK BIT(4) -#define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK) - -static void __init rb433_setup(void) -{ - rb4xx_generic_setup(); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH", - rb433_setup); - -static void __init rb433u_setup(void) -{ - rb433_setup(); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH", - rb433u_setup); - -static void __init rb435g_setup(void) -{ - rb4xx_generic_setup(); - - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_RB_435G, "435G", "MikroTik RouterBOARD 435G", - rb435g_setup); - -#define RB450_LAN_PHYMASK BIT(0) -#define RB450_WAN_PHYMASK BIT(4) -#define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK) - -static void __init rb450_generic_setup(int gige) -{ - rb4xx_generic_setup(); - ath79_register_mdio(0, ~RB450_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); - ath79_eth0_data.phy_if_mode = (gige) ? - PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = RB450_LAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); - ath79_eth1_data.phy_if_mode = (gige) ? - PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = RB450_WAN_PHYMASK; - - ath79_register_eth(1); - ath79_register_eth(0); -} - -static void __init rb450_setup(void) -{ - rb450_generic_setup(0); -} - -MIPS_MACHINE(ATH79_MACH_RB_450, "450", "MikroTik RouterBOARD 450", - rb450_setup); - -static void __init rb450g_setup(void) -{ - rb450_generic_setup(1); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); -} - -MIPS_MACHINE(ATH79_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G", - rb450g_setup); - -static void __init rb493_setup(void) -{ - rb4xx_generic_setup(); - - ath79_register_mdio(0, 0x3fffff00); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x00000001; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH", - rb493_setup); - -#define RB493G_GPIO_MDIO_MDC 7 -#define RB493G_GPIO_MDIO_DATA 8 - -#define RB493G_MDIO_PHYMASK BIT(0) - -static struct mdio_gpio_platform_data rb493g_mdio_data = { - .mdc = RB493G_GPIO_MDIO_MDC, - .mdio = RB493G_GPIO_MDIO_DATA, - - .phy_mask = ~RB493G_MDIO_PHYMASK, -}; - -static struct platform_device rb493g_mdio_device = { - .name = "mdio-gpio", - .id = -1, - .dev = { - .platform_data = &rb493g_mdio_data, - }, -}; - -static void __init rb493g_setup(void) -{ - ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), - rb4xx_leds_gpio); - - spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - platform_device_register(&rb4xx_spi_device); - platform_device_register(&rb4xx_nand_device); - - ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = RB493G_MDIO_PHYMASK; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev; - ath79_eth1_data.phy_mask = RB493G_MDIO_PHYMASK; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - platform_device_register(&rb493g_mdio_device); - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_usb(); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G", - rb493g_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c deleted file mode 100644 index 5656d3c..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c +++ /dev/null @@ -1,346 +0,0 @@ -/* - * MikroTik RouterBOARD 750/750GL support - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/export.h> -#include <linux/pci.h> -#include <linux/ath9k_platform.h> -#include <linux/platform_device.h> -#include <linux/phy.h> -#include <linux/ar8216_platform.h> -#include <linux/rle.h> -#include <linux/routerboot.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/irq.h> -#include <asm/mach-ath79/mach-rb750.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-usb.h" -#include "dev-eth.h" -#include "machtypes.h" -#include "routerboot.h" - -static struct rb750_led_data rb750_leds[] = { - { - .name = "rb750:green:act", - .mask = RB750_LED_ACT, - .active_low = 1, - }, { - .name = "rb750:green:port1", - .mask = RB750_LED_PORT5, - .active_low = 1, - }, { - .name = "rb750:green:port2", - .mask = RB750_LED_PORT4, - .active_low = 1, - }, { - .name = "rb750:green:port3", - .mask = RB750_LED_PORT3, - .active_low = 1, - }, { - .name = "rb750:green:port4", - .mask = RB750_LED_PORT2, - .active_low = 1, - }, { - .name = "rb750:green:port5", - .mask = RB750_LED_PORT1, - .active_low = 1, - } -}; - -static struct rb750_led_data rb750gr3_leds[] = { - { - .name = "rb750:green:act", - .mask = RB7XX_LED_ACT, - .active_low = 1, - }, -}; - -static struct rb750_led_platform_data rb750_leds_data; -static struct platform_device rb750_leds_device = { - .name = "leds-rb750", - .dev = { - .platform_data = &rb750_leds_data, - } -}; - -static struct rb7xx_nand_platform_data rb750_nand_data; -static struct platform_device rb750_nand_device = { - .name = "rb750-nand", - .id = -1, - .dev = { - .platform_data = &rb750_nand_data, - } -}; - -static void rb750_latch_change(u32 mask_clr, u32 mask_set) -{ - static DEFINE_SPINLOCK(lock); - static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE; - static u32 latch_oe; - static u32 latch_clr; - unsigned long flags; - u32 t; - - spin_lock_irqsave(&lock, flags); - - if ((mask_clr & BIT(31)) != 0 && - (latch_set & RB750_LVC573_LE) == 0) { - goto unlock; - } - - latch_set = (latch_set | mask_set) & ~mask_clr; - latch_clr = (latch_clr | mask_clr) & ~mask_set; - - if (latch_oe == 0) - latch_oe = __raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_OE); - - if (likely(latch_set & RB750_LVC573_LE)) { - void __iomem *base = ath79_gpio_base; - - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - t |= mask_clr | latch_oe | mask_set; - - __raw_writel(t, base + AR71XX_GPIO_REG_OE); - __raw_writel(latch_clr, base + AR71XX_GPIO_REG_CLEAR); - __raw_writel(latch_set, base + AR71XX_GPIO_REG_SET); - } else if (mask_clr & RB750_LVC573_LE) { - void __iomem *base = ath79_gpio_base; - - latch_oe = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(RB750_LVC573_LE, base + AR71XX_GPIO_REG_CLEAR); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_CLEAR); - } - -unlock: - spin_unlock_irqrestore(&lock, flags); -} - -static void rb750_nand_enable_pins(void) -{ - rb750_latch_change(RB750_LVC573_LE, 0); - ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, - AR724X_GPIO_FUNC_SPI_EN); -} - -static void rb750_nand_disable_pins(void) -{ - ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN, - AR724X_GPIO_FUNC_JTAG_DISABLE); - rb750_latch_change(0, RB750_LVC573_LE); -} - -static void __init rb750_setup(void) -{ - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); - - rb750_leds_data.num_leds = ARRAY_SIZE(rb750_leds); - rb750_leds_data.leds = rb750_leds; - rb750_leds_data.latch_change = rb750_latch_change; - platform_device_register(&rb750_leds_device); - - rb750_nand_data.nce_line = RB750_NAND_NCE; - rb750_nand_data.enable_pins = rb750_nand_enable_pins; - rb750_nand_data.disable_pins = rb750_nand_disable_pins; - rb750_nand_data.latch_change = rb750_latch_change; - platform_device_register(&rb750_nand_device); -} - -MIPS_MACHINE(ATH79_MACH_RB_750, "750i", "MikroTik RouterBOARD 750", - rb750_setup); - -static struct ar8327_pad_cfg rb750gr3_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_platform_data rb750gr3_ar8327_data = { - .pad0_cfg = &rb750gr3_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - } -}; - -static struct mdio_board_info rb750g3_mdio_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &rb750gr3_ar8327_data, - }, -}; - -static void rb750gr3_nand_enable_pins(void) -{ - ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, - AR724X_GPIO_FUNC_SPI_EN | - AR724X_GPIO_FUNC_SPI_CS_EN2); -} - -static void rb750gr3_nand_disable_pins(void) -{ - ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN | - AR724X_GPIO_FUNC_SPI_CS_EN2, - AR724X_GPIO_FUNC_JTAG_DISABLE); -} - -static void rb750gr3_latch_change(u32 mask_clr, u32 mask_set) -{ - static DEFINE_SPINLOCK(lock); - static u32 latch_set = RB7XX_LED_ACT; - static u32 latch_clr; - void __iomem *base = ath79_gpio_base; - unsigned long flags; - u32 t; - - spin_lock_irqsave(&lock, flags); - - latch_set = (latch_set | mask_set) & ~mask_clr; - latch_clr = (latch_clr | mask_clr) & ~mask_set; - - mask_set = latch_set & (RB7XX_USB_POWERON | RB7XX_MONITOR); - mask_clr = latch_clr & (RB7XX_USB_POWERON | RB7XX_MONITOR); - - if ((latch_set ^ RB7XX_LED_ACT) & RB7XX_LED_ACT) { - /* enable output mode */ - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - t |= RB7XX_LED_ACT; - __raw_writel(t, base + AR71XX_GPIO_REG_OE); - - mask_clr |= RB7XX_LED_ACT; - } else { - /* disable output mode */ - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - t &= ~RB7XX_LED_ACT; - __raw_writel(t, base + AR71XX_GPIO_REG_OE); - } - - __raw_writel(mask_set, base + AR71XX_GPIO_REG_SET); - __raw_writel(mask_clr, base + AR71XX_GPIO_REG_CLEAR); - - spin_unlock_irqrestore(&lock, flags); -} - -static void __init rb750gr3_setup(void) -{ - ath79_register_mdio(0, 0x0); - mdiobus_register_board_info(rb750g3_mdio_info, - ARRAY_SIZE(rb750g3_mdio_info)); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_pll_data.pll_1000 = 0x62000000; - - ath79_register_eth(0); - - rb750_leds_data.num_leds = ARRAY_SIZE(rb750gr3_leds); - rb750_leds_data.leds = rb750gr3_leds; - rb750_leds_data.latch_change = rb750gr3_latch_change; - platform_device_register(&rb750_leds_device); - - rb750_nand_data.nce_line = RB7XX_NAND_NCE; - rb750_nand_data.enable_pins = rb750gr3_nand_enable_pins; - rb750_nand_data.disable_pins = rb750gr3_nand_disable_pins; - rb750_nand_data.latch_change = rb750gr3_latch_change; - platform_device_register(&rb750_nand_device); -} - -MIPS_MACHINE(ATH79_MACH_RB_750G_R3, "750Gr3", "MikroTik RouterBOARD 750GL", - rb750gr3_setup); - -#define RB751_HARDCONFIG 0x1f00b000 -#define RB751_HARDCONFIG_SIZE 0x1000 - -static void __init rb751_wlan_setup(void) -{ - u8 *hardconfig = (u8 *) KSEG1ADDR(RB751_HARDCONFIG); - struct ath9k_platform_data *wmac_data; - u16 tag_len; - u8 *tag; - u16 mac_len; - u8 *mac; - int err; - - wmac_data = ap9x_pci_get_wmac_data(0); - if (!wmac_data) { - pr_err("rb75x: unable to get address of wlan data\n"); - return; - } - - ap9x_pci_setup_wmac_led_pin(0, 9); - - err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE, - RB_ID_WLAN_DATA, &tag, &tag_len); - if (err) { - pr_err("rb75x: no calibration data found\n"); - return; - } - - err = rle_decode(tag, tag_len, (unsigned char *) wmac_data->eeprom_data, - sizeof(wmac_data->eeprom_data), NULL, NULL); - if (err) { - pr_err("rb75x: unable to decode wlan eeprom data\n"); - return; - } - - err = routerboot_find_tag(hardconfig, RB751_HARDCONFIG_SIZE, - RB_ID_MAC_ADDRESS_PACK, &mac, &mac_len); - if (err) { - pr_err("rb75x: no mac address found\n"); - return; - } - - ap91_pci_init(NULL, mac); -} - -static void __init rb751_setup(void) -{ - rb750_setup(); - ath79_register_usb(); - rb751_wlan_setup(); -} - -MIPS_MACHINE(ATH79_MACH_RB_751, "751", "MikroTik RouterBOARD 751", - rb751_setup); - -static void __init rb751g_setup(void) -{ - rb750gr3_setup(); - ath79_register_usb(); - rb751_wlan_setup(); -} - -MIPS_MACHINE(ATH79_MACH_RB_751G, "751g", "MikroTik RouterBOARD 751G", - rb751g_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c deleted file mode 100644 index 9ef5c44..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb91x.c +++ /dev/null @@ -1,349 +0,0 @@ -/* - * MikroTik RouterBOARD 91X support - * - * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define pr_fmt(fmt) "rb91x: " fmt - -#include <linux/phy.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/spi/spi.h> -#include <linux/spi/74x164.h> -#include <linux/spi/flash.h> -#include <linux/routerboot.h> -#include <linux/gpio.h> -#include <linux/platform_data/gpio-latch.h> -#include <linux/platform_data/rb91x_nand.h> -#include <linux/platform_data/phy-at803x.h> - -#include <asm/prom.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ath79_spi_platform.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-leds-gpio.h" -#include "dev-nfc.h" -#include "dev-usb.h" -#include "dev-spi.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "pci.h" -#include "routerboot.h" - -#define RB_ROUTERBOOT_OFFSET 0x0000 -#define RB_ROUTERBOOT_MIN_SIZE 0xb000 -#define RB_HARD_CFG_SIZE 0x1000 -#define RB_BIOS_OFFSET 0xd000 -#define RB_BIOS_SIZE 0x1000 -#define RB_SOFT_CFG_OFFSET 0xf000 -#define RB_SOFT_CFG_SIZE 0x1000 - -#define RB91X_FLAG_USB BIT(0) -#define RB91X_FLAG_PCIE BIT(1) - -#define RB91X_LATCH_GPIO_BASE AR934X_GPIO_COUNT -#define RB91X_LATCH_GPIO(_x) (RB91X_LATCH_GPIO_BASE + (_x)) - -#define RB91X_SSR_GPIO_BASE (RB91X_LATCH_GPIO_BASE + AR934X_GPIO_COUNT) -#define RB91X_SSR_GPIO(_x) (RB91X_SSR_GPIO_BASE + (_x)) - -#define RB91X_SSR_BIT_LED1 0 -#define RB91X_SSR_BIT_LED2 1 -#define RB91X_SSR_BIT_LED3 2 -#define RB91X_SSR_BIT_LED4 3 -#define RB91X_SSR_BIT_LED5 4 -#define RB91X_SSR_BIT_5 5 -#define RB91X_SSR_BIT_USB_POWER 6 -#define RB91X_SSR_BIT_PCIE_POWER 7 - -#define RB91X_GPIO_SSR_STROBE RB91X_LATCH_GPIO(0) -#define RB91X_GPIO_LED_POWER RB91X_LATCH_GPIO(1) -#define RB91X_GPIO_LED_USER RB91X_LATCH_GPIO(2) -#define RB91X_GPIO_NAND_READ RB91X_LATCH_GPIO(3) -#define RB91X_GPIO_NAND_RDY RB91X_LATCH_GPIO(4) -#define RB91X_GPIO_NLE RB91X_LATCH_GPIO(11) -#define RB91X_GPIO_NAND_NRW RB91X_LATCH_GPIO(12) -#define RB91X_GPIO_NAND_NCE RB91X_LATCH_GPIO(13) -#define RB91X_GPIO_NAND_CLE RB91X_LATCH_GPIO(14) -#define RB91X_GPIO_NAND_ALE RB91X_LATCH_GPIO(15) - -#define RB91X_GPIO_LED_1 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED1) -#define RB91X_GPIO_LED_2 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED2) -#define RB91X_GPIO_LED_3 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED3) -#define RB91X_GPIO_LED_4 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED4) -#define RB91X_GPIO_LED_5 RB91X_SSR_GPIO(RB91X_SSR_BIT_LED5) -#define RB91X_GPIO_USB_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_USB_POWER) -#define RB91X_GPIO_PCIE_POWER RB91X_SSR_GPIO(RB91X_SSR_BIT_PCIE_POWER) - -struct rb_board_info { - const char *name; - u32 flags; -}; - -static struct mtd_partition rb711gr100_spi_partitions[] = { - { - .name = "routerboot", - .offset = RB_ROUTERBOOT_OFFSET, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "hard_config", - .size = RB_HARD_CFG_SIZE, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "bios", - .offset = RB_BIOS_OFFSET, - .size = RB_BIOS_SIZE, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "soft_config", - .size = RB_SOFT_CFG_SIZE, - } -}; - -static struct flash_platform_data rb711gr100_spi_flash_data = { - .parts = rb711gr100_spi_partitions, - .nr_parts = ARRAY_SIZE(rb711gr100_spi_partitions), -}; - -static int rb711gr100_gpio_latch_gpios[AR934X_GPIO_COUNT] __initdata = { - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, - 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 -}; - -static struct gpio_latch_platform_data rb711gr100_gpio_latch_data __initdata = { - .base = RB91X_LATCH_GPIO_BASE, - .num_gpios = ARRAY_SIZE(rb711gr100_gpio_latch_gpios), - .gpios = rb711gr100_gpio_latch_gpios, - .le_gpio_index = 11, - .le_active_low = true, -}; - -static struct rb91x_nand_platform_data rb711gr100_nand_data __initdata = { - .gpio_nce = RB91X_GPIO_NAND_NCE, - .gpio_ale = RB91X_GPIO_NAND_ALE, - .gpio_cle = RB91X_GPIO_NAND_CLE, - .gpio_rdy = RB91X_GPIO_NAND_RDY, - .gpio_read = RB91X_GPIO_NAND_READ, - .gpio_nrw = RB91X_GPIO_NAND_NRW, - .gpio_nle = RB91X_GPIO_NLE, -}; - -static u8 rb711gr100_ssr_initdata[] __initdata = { - BIT(RB91X_SSR_BIT_PCIE_POWER) | - BIT(RB91X_SSR_BIT_USB_POWER) | - BIT(RB91X_SSR_BIT_5) -}; - -static struct gen_74x164_chip_platform_data rb711gr100_ssr_data = { - .base = RB91X_SSR_GPIO_BASE, - .num_registers = ARRAY_SIZE(rb711gr100_ssr_initdata), - .init_data = rb711gr100_ssr_initdata, -}; - -static struct ath79_spi_controller_data rb711gr100_spi0_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, - .is_flash = true, -}; - -static struct ath79_spi_controller_data rb711gr100_spi1_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_GPIO, - .cs_line = RB91X_GPIO_SSR_STROBE, -}; - -static struct spi_board_info rb711gr100_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .platform_data = &rb711gr100_spi_flash_data, - .controller_data = &rb711gr100_spi0_cdata - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 10000000, - .modalias = "74x164", - .platform_data = &rb711gr100_ssr_data, - .controller_data = &rb711gr100_spi1_cdata - } -}; - -static struct ath79_spi_platform_data rb711gr100_spi_data __initdata = { - .bus_num = 0, - .num_chipselect = 2, -}; - -static struct gpio_led rb711gr100_leds[] __initdata = { - { - .name = "rb:green:led1", - .gpio = RB91X_GPIO_LED_1, - .active_low = 0, - }, - { - .name = "rb:green:led2", - .gpio = RB91X_GPIO_LED_2, - .active_low = 0, - }, - { - .name = "rb:green:led3", - .gpio = RB91X_GPIO_LED_3, - .active_low = 0, - }, - { - .name = "rb:green:led4", - .gpio = RB91X_GPIO_LED_4, - .active_low = 0, - }, - { - .name = "rb:green:led5", - .gpio = RB91X_GPIO_LED_5, - .active_low = 0, - }, - { - .name = "rb:green:user", - .gpio = RB91X_GPIO_LED_USER, - .active_low = 0, - }, - { - .name = "rb:green:power", - .gpio = RB91X_GPIO_LED_POWER, - .active_low = 0, - }, -}; - -static struct at803x_platform_data rb91x_at803x_data = { - .disable_smarteee = 1, - .enable_rgmii_rx_delay = 1, - .enable_rgmii_tx_delay = 1, -}; - -static struct mdio_board_info rb91x_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &rb91x_at803x_data, - }, -}; - -static void __init rb711gr100_init_partitions(const struct rb_info *info) -{ - rb711gr100_spi_partitions[0].size = info->hard_cfg_offs; - rb711gr100_spi_partitions[1].offset = info->hard_cfg_offs; - - rb711gr100_spi_partitions[3].offset = info->soft_cfg_offs; -} - -void __init rb711gr100_wlan_init(void) -{ - char *caldata; - u8 wlan_mac[ETH_ALEN]; - - caldata = rb_get_wlan_data(); - if (caldata == NULL) - return; - - ath79_init_mac(wlan_mac, ath79_mac_base, 1); - ath79_register_wmac(caldata + 0x1000, wlan_mac); - - kfree(caldata); -} - -#define RB_BOARD_INFO(_name, _flags) \ - { \ - .name = (_name), \ - .flags = (_flags), \ - } - -static const struct rb_board_info rb711gr100_boards[] __initconst = { - RB_BOARD_INFO("911G-2HPnD", 0), - RB_BOARD_INFO("911G-5HPnD", 0), - RB_BOARD_INFO("912UAG-2HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE), - RB_BOARD_INFO("912UAG-5HPnD", RB91X_FLAG_USB | RB91X_FLAG_PCIE), -}; - -static u32 rb711gr100_get_flags(const struct rb_info *info) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(rb711gr100_boards); i++) { - const struct rb_board_info *bi; - - bi = &rb711gr100_boards[i]; - if (strcmp(info->board_name, bi->name) == 0) - return bi->flags; - } - - return 0; -} - -static void __init rb711gr100_setup(void) -{ - const struct rb_info *info; - char buf[64]; - u32 flags; - - info = rb_init_info((void *) KSEG1ADDR(0x1f000000), 0x10000); - if (!info) - return; - - scnprintf(buf, sizeof(buf), "Mikrotik RouterBOARD %s", - (info->board_name) ? info->board_name : ""); - mips_set_machine_name(buf); - - rb711gr100_init_partitions(info); - ath79_register_spi(&rb711gr100_spi_data, rb711gr100_spi_info, - ARRAY_SIZE(rb711gr100_spi_info)); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_RXD_DELAY | - AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(0, 0x0); - - mdiobus_register_board_info(rb91x_mdio0_info, - ARRAY_SIZE(rb91x_mdio0_info)); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_pll_data.pll_1000 = 0x02000000; - - ath79_register_eth(0); - - rb711gr100_wlan_init(); - - platform_device_register_data(NULL, "rb91x-nand", -1, - &rb711gr100_nand_data, - sizeof(rb711gr100_nand_data)); - - platform_device_register_data(NULL, "gpio-latch", -1, - &rb711gr100_gpio_latch_data, - sizeof(rb711gr100_gpio_latch_data)); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rb711gr100_leds), - rb711gr100_leds); - - flags = rb711gr100_get_flags(info); - - if (flags & RB91X_FLAG_USB) - ath79_register_usb(); - - if (flags & RB91X_FLAG_PCIE) - ath79_register_pci(); - -} - -MIPS_MACHINE_NONAME(ATH79_MACH_RB_711GR100, "711Gr100", rb711gr100_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c deleted file mode 100644 index c2261ab..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb95x.c +++ /dev/null @@ -1,258 +0,0 @@ -/* - * MikroTik RouterBOARD 95X support - * - * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be> - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2013 Kamil Trzcinski <ayufan@ayufan.eu> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define pr_fmt(fmt) "rb95x: " fmt - -#include <linux/phy.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/routerboot.h> -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-nfc.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "routerboot.h" -#include "dev-leds-gpio.h" - -#define RB95X_GPIO_NAND_NCE 14 - -static struct mtd_partition rb95x_nand_partitions[] = { - { - .name = "booter", - .offset = 0, - .size = (256 * 1024), - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = (256 * 1024), - .size = (4 * 1024 * 1024) - (256 * 1024), - }, - { - .name = "rootfs", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct gpio_led rb951ui_leds_gpio[] __initdata = { - { - .name = "rb:green:wlan", - .gpio = 11, - .active_low = 1, - }, { - .name = "rb:green:act", - .gpio = 3, - .active_low = 1, - }, { - .name = "rb:green:port1", - .gpio = 13, - .active_low = 1, - }, { - .name = "rb:green:port2", - .gpio = 12, - .active_low = 1, - }, { - .name = "rb:green:port3", - .gpio = 4, - .active_low = 1, - }, { - .name = "rb:green:port4", - .gpio = 21, - .active_low = 1, - }, { - .name = "rb:green:port5", - .gpio = 16, - .active_low = 1, - } -}; - -static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_platform_data rb95x_ar8327_data = { - .pad0_cfg = &rb95x_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - } -}; - -static struct mdio_board_info rb95x_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &rb95x_ar8327_data, - }, -}; - -void __init rb95x_wlan_init(void) -{ - char *art_buf; - u8 wlan_mac[ETH_ALEN]; - - art_buf = rb_get_wlan_data(); - if (art_buf == NULL) - return; - - ath79_init_mac(wlan_mac, ath79_mac_base, 11); - ath79_register_wmac(art_buf + 0x1000, wlan_mac); - - kfree(art_buf); -} - -static void rb95x_nand_select_chip(int chip_no) -{ - switch (chip_no) { - case 0: - gpio_set_value(RB95X_GPIO_NAND_NCE, 0); - break; - default: - gpio_set_value(RB95X_GPIO_NAND_NCE, 1); - break; - } - ndelay(500); -} - -static struct nand_ecclayout rb95x_nand_ecclayout = { - .eccbytes = 6, - .eccpos = { 8, 9, 10, 13, 14, 15 }, - .oobavail = 9, - .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -}; - -static int rb95x_nand_scan_fixup(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - - if (mtd->writesize == 512) { - /* - * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot - * will not be able to find the kernel that we load. - */ - chip->ecc.layout = &rb95x_nand_ecclayout; - } - - return 0; -} - -void __init rb95x_nand_init(void) -{ - gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); - - ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup); - ath79_nfc_set_parts(rb95x_nand_partitions, - ARRAY_SIZE(rb95x_nand_partitions)); - ath79_nfc_set_select_chip(rb95x_nand_select_chip); - ath79_nfc_set_swap_dma(true); - ath79_register_nfc(); -} - -static int __init rb95x_setup(void) -{ - const struct rb_info *info; - - info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); - if (!info) - return -EINVAL; - - rb95x_nand_init(); - - return 0; -} - -static void __init rb951g_setup(void) -{ - if (rb95x_setup()) - return; - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(0, 0x0); - - mdiobus_register_board_info(rb95x_mdio0_info, - ARRAY_SIZE(rb95x_mdio0_info)); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_eth(0); - - rb95x_wlan_init(); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD", - rb951g_setup); - -static void __init rb951ui_setup(void) -{ - if (rb95x_setup()) - return; - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(4); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(4); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_register_eth(1); - - gpio_request_one(20, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - - gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "POE power"); - - rb95x_wlan_init(); - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rb951ui_leds_gpio), - rb951ui_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_RB_951U, "951HnD", "MikroTik RouterBOARD 951Ui-2HnD", - rb951ui_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbsxtlite.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rbsxtlite.c deleted file mode 100644 index 94e0b44..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rbsxtlite.c +++ /dev/null @@ -1,238 +0,0 @@ -/* - * MikroTik RouterBOARD SXT Lite support - * - * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be> - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2013 Vyacheslav Adamanov <adamanov@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define pr_fmt(fmt) "sxtlite: " fmt - -#include <linux/phy.h> -#include <linux/delay.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/spi/spi.h> -#include <linux/spi/flash.h> -#include <linux/rle.h> -#include <linux/routerboot.h> -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-nfc.h" -#include "dev-wmac.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "routerboot.h" -#include <linux/ar8216_platform.h> - -#define SXTLITE_GPIO_NAND_NCE 14 -#define SXTLITE_GPIO_LED_USER 3 -#define SXTLITE_GPIO_LED_1 13 -#define SXTLITE_GPIO_LED_2 12 -#define SXTLITE_GPIO_LED_3 4 -#define SXTLITE_GPIO_LED_4 21 -#define SXTLITE_GPIO_LED_5 18 -#define SXTLITE_GPIO_LED_POWER 11 - -#define SXTLITE_GPIO_BUZZER 19 - -#define SXTLITE_GPIO_BTN_RESET 15 - -#define SXTLITE_KEYS_POLL_INTERVAL 20 -#define SXTLITE_KEYS_DEBOUNCE_INTERVAL (3 * SXTLITE_KEYS_POLL_INTERVAL) - -static struct mtd_partition rbsxtlite_nand_partitions[] = { - { - .name = "booter", - .offset = 0, - .size = (256 * 1024), - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = (256 * 1024), - .size = (4 * 1024 * 1024) - (256 * 1024), - }, - { - .name = "rootfs", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct gpio_led rbsxtlite_leds_gpio[] __initdata = { - { - .name = "rb:green:user", - .gpio = SXTLITE_GPIO_LED_USER, - .active_low = 1, - }, - { - .name = "rb:green:led1", - .gpio = SXTLITE_GPIO_LED_1, - .active_low = 1, - }, - { - .name = "rb:green:led2", - .gpio = SXTLITE_GPIO_LED_2, - .active_low = 1, - }, - { - .name = "rb:green:led3", - .gpio = SXTLITE_GPIO_LED_3, - .active_low = 1, - }, - { - .name = "rb:green:led4", - .gpio = SXTLITE_GPIO_LED_4, - .active_low = 1, - }, - { - .name = "rb:green:led5", - .gpio = SXTLITE_GPIO_LED_5, - .active_low = 1, - }, - { - .name = "rb:green:power", - .gpio = SXTLITE_GPIO_LED_POWER, - }, -}; - -static struct gpio_keys_button rbsxtlite_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = SXTLITE_KEYS_DEBOUNCE_INTERVAL, - .gpio = SXTLITE_GPIO_BTN_RESET, - .active_low = 0, - }, -}; - -static int __init rbsxtlite_rbinfo_init(void) -{ - const struct rb_info *info; - - info = rb_init_info((void *)(KSEG1ADDR(AR71XX_SPI_BASE)), 0x10000); - if (!info) - return -EINVAL; - return 0; - -} - -void __init rbsxtlite_wlan_init(void) -{ - char *art_buf; - u8 wlan_mac[ETH_ALEN]; - - art_buf = rb_get_wlan_data(); - if (art_buf == NULL) - return; - - ath79_init_mac(wlan_mac, ath79_mac_base, 1); - ath79_register_wmac(art_buf + 0x1000, wlan_mac); - - kfree(art_buf); -} - -static void rbsxtlite_nand_select_chip(int chip_no) -{ - switch (chip_no) { - case 0: - gpio_set_value(SXTLITE_GPIO_NAND_NCE, 0); - break; - default: - gpio_set_value(SXTLITE_GPIO_NAND_NCE, 1); - break; - } - ndelay(500); -} - -static struct nand_ecclayout rbsxtlite_nand_ecclayout = { - .eccbytes = 6, - .eccpos = { 8, 9, 10, 13, 14, 15 }, - .oobavail = 9, - .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -}; - -static int rbsxtlite_nand_scan_fixup(struct mtd_info *mtd) -{ - struct nand_chip *chip = mtd->priv; - - if (mtd->writesize == 512) { - /* - * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot - * will not be able to find the kernel that we load. - */ - chip->ecc.layout = &rbsxtlite_nand_ecclayout; - } - - return 0; -} - -void __init rbsxtlite_gpio_init(void) -{ - gpio_request_one(SXTLITE_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE"); -} - -void __init rbsxtlite_nand_init(void) -{ - ath79_nfc_set_scan_fixup(rbsxtlite_nand_scan_fixup); - ath79_nfc_set_parts(rbsxtlite_nand_partitions, - ARRAY_SIZE(rbsxtlite_nand_partitions)); - ath79_nfc_set_select_chip(rbsxtlite_nand_select_chip); - ath79_nfc_set_swap_dma(true); - ath79_register_nfc(); -} - - -static void __init rbsxtlite_setup(void) -{ - if(rbsxtlite_rbinfo_init()) - return; - rbsxtlite_nand_init(); - rbsxtlite_wlan_init(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rbsxtlite_leds_gpio), - rbsxtlite_leds_gpio); - ath79_register_gpio_keys_polled(-1, SXTLITE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rbsxtlite_gpio_keys), - rbsxtlite_gpio_keys); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(1, 0x0); - - /* GMAC0 is left unused */ - - /* GMAC1 is connected to MAC0 on the internal switch */ - /* The ethernet port connects to PHY P0, which connects to MAC1 - on the internal switch */ - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_register_eth(1); - - -} - - -MIPS_MACHINE(ATH79_MACH_RB_SXTLITE2ND, "sxt2n", "Mikrotik RouterBOARD SXT Lite2", - rbsxtlite_setup); - -MIPS_MACHINE(ATH79_MACH_RB_SXTLITE5ND, "sxt5n", "Mikrotik RouterBOARD SXT Lite5", - rbsxtlite_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rw2458n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rw2458n.c deleted file mode 100644 index bb7c247..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rw2458n.c +++ /dev/null @@ -1,91 +0,0 @@ -/* - * Redwave RW2458N support - * - * Copyright (C) 2011-2013 Cezary Jackiewicz <cezary@eko.one.pl> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define RW2458N_GPIO_LED_D3 1 -#define RW2458N_GPIO_LED_D4 0 -#define RW2458N_GPIO_LED_D5 11 -#define RW2458N_GPIO_LED_D6 7 -#define RW2458N_GPIO_BTN_RESET 12 - -#define RW2458N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define RW2458N_KEYS_DEBOUNCE_INTERVAL (3 * RW2458N_KEYS_POLL_INTERVAL) - -static struct gpio_keys_button rw2458n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RW2458N_KEYS_DEBOUNCE_INTERVAL, - .gpio = RW2458N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -#define RW2458N_WAN_PHYMASK BIT(4) - -static struct gpio_led rw2458n_leds_gpio[] __initdata = { - { - .name = "rw2458n:green:d3", - .gpio = RW2458N_GPIO_LED_D3, - .active_low = 1, - }, { - .name = "rw2458n:green:d4", - .gpio = RW2458N_GPIO_LED_D4, - .active_low = 1, - }, { - .name = "rw2458n:green:d5", - .gpio = RW2458N_GPIO_LED_D5, - .active_low = 1, - }, { - .name = "rw2458n:green:d6", - .gpio = RW2458N_GPIO_LED_D6, - .active_low = 1, - } -}; - -static void __init rw2458n_setup(void) -{ - u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); - - ath79_register_m25p80(NULL); - - ath79_register_mdio(0, ~RW2458N_WAN_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rw2458n_leds_gpio), - rw2458n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, RW2458N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rw2458n_gpio_keys), - rw2458n_gpio_keys); - ath79_register_usb(); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RW2458N, "RW2458N", "Redwave RW2458N", - rw2458n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-smart-300.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-smart-300.c deleted file mode 100644 index 2520e96..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-smart-300.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * NC-LINK SMART-300 board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ag71xx_platform.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define SMART_300_GPIO_LED_WLAN 13 -#define SMART_300_GPIO_LED_WAN 18 -#define SMART_300_GPIO_LED_LAN4 19 -#define SMART_300_GPIO_LED_LAN3 12 -#define SMART_300_GPIO_LED_LAN2 21 -#define SMART_300_GPIO_LED_LAN1 20 -#define SMART_300_GPIO_LED_SYSTEM 15 -#define SMART_300_GPIO_LED_POWER 14 - -#define SMART_300_GPIO_BTN_RESET 17 -#define SMART_300_GPIO_SW_RFKILL 16 - -#define SMART_300_KEYS_POLL_INTERVAL 20 /* msecs */ -#define SMART_300_KEYS_DEBOUNCE_INTERVAL (3 * SMART_300_KEYS_POLL_INTERVAL) - -#define SMART_300_GPIO_MASK 0x007fffff - -static const char *smart_300_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data smart_300_flash_data = { - .part_probes = smart_300_part_probes, -}; - -static struct gpio_led smart_300_leds_gpio[] __initdata = { - { - .name = "nc-link:green:lan1", - .gpio = SMART_300_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "nc-link:green:lan2", - .gpio = SMART_300_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "nc-link:green:lan3", - .gpio = SMART_300_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "nc-link:green:lan4", - .gpio = SMART_300_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "nc-link:green:system", - .gpio = SMART_300_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "nc-link:green:wan", - .gpio = SMART_300_GPIO_LED_WAN, - .active_low = 1, - }, { - .name = "nc-link:green:wlan", - .gpio = SMART_300_GPIO_LED_WLAN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button smart_300_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = SMART_300_KEYS_DEBOUNCE_INTERVAL, - .gpio = SMART_300_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init smart_300_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(smart_300_leds_gpio), - smart_300_leds_gpio); - - ath79_register_gpio_keys_polled(1, SMART_300_KEYS_POLL_INTERVAL, - ARRAY_SIZE(smart_300_gpio_keys), - smart_300_gpio_keys); - - ath79_register_m25p80(&smart_300_flash_data); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - /* GMAC0 is connected to the PHY0 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(4); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(4); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - /* GMAC1 is connected to the internal switch */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_register_eth(1); - - ath79_register_wmac(ee, mac); - - gpio_request(SMART_300_GPIO_LED_POWER, "power"); - gpio_direction_output(SMART_300_GPIO_LED_POWER, GPIOF_OUT_INIT_LOW); -} - -MIPS_MACHINE(ATH79_MACH_SMART_300, "SMART-300", "NC-LINK SMART-300", - smart_300_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-632brp.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-632brp.c deleted file mode 100644 index 855664e..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-632brp.c +++ /dev/null @@ -1,111 +0,0 @@ -/* - * TrendNET TEW-632BRP board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define TEW_632BRP_GPIO_LED_STATUS 1 -#define TEW_632BRP_GPIO_LED_WPS 3 -#define TEW_632BRP_GPIO_LED_WLAN 6 -#define TEW_632BRP_GPIO_BTN_WPS 12 -#define TEW_632BRP_GPIO_BTN_RESET 21 - -#define TEW_632BRP_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TEW_632BRP_KEYS_DEBOUNCE_INTERVAL (3 * TEW_632BRP_KEYS_POLL_INTERVAL) - -#define TEW_632BRP_CONFIG_ADDR 0x1f020000 -#define TEW_632BRP_CONFIG_SIZE 0x10000 - -static struct gpio_led tew_632brp_leds_gpio[] __initdata = { - { - .name = "tew-632brp:green:status", - .gpio = TEW_632BRP_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "tew-632brp:blue:wps", - .gpio = TEW_632BRP_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "tew-632brp:green:wlan", - .gpio = TEW_632BRP_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tew_632brp_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_632BRP_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_632BRP_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -#define TEW_632BRP_LAN_PHYMASK BIT(0) -#define TEW_632BRP_WAN_PHYMASK BIT(4) -#define TEW_632BRP_MDIO_MASK (~(TEW_632BRP_LAN_PHYMASK | \ - TEW_632BRP_WAN_PHYMASK)) - -static void __init tew_632brp_setup(void) -{ - const char *config = (char *) KSEG1ADDR(TEW_632BRP_CONFIG_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - u8 *wlan_mac = NULL; - - if (ath79_nvram_parse_mac_addr(config, TEW_632BRP_CONFIG_SIZE, - "lan_mac=", mac) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - wlan_mac = mac; - } - - ath79_register_mdio(0, TEW_632BRP_MDIO_MASK); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = TEW_632BRP_LAN_PHYMASK; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = TEW_632BRP_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_632brp_leds_gpio), - tew_632brp_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TEW_632BRP_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tew_632brp_gpio_keys), - tew_632brp_gpio_keys); - - ath79_register_wmac(eeprom, wlan_mac); -} - -MIPS_MACHINE(ATH79_MACH_TEW_632BRP, "TEW-632BRP", "TRENDnet TEW-632BRP", - tew_632brp_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-673gru.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-673gru.c deleted file mode 100644 index 80a5443..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-673gru.c +++ /dev/null @@ -1,198 +0,0 @@ -/* - * TRENDnet TEW-673GRU board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/rtl8366.h> -#include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define TEW673GRU_GPIO_LCD_SCK 0 -#define TEW673GRU_GPIO_LCD_MOSI 1 -#define TEW673GRU_GPIO_LCD_MISO 2 -#define TEW673GRU_GPIO_LCD_CS 6 - -#define TEW673GRU_GPIO_LED_WPS 9 - -#define TEW673GRU_GPIO_BTN_RESET 3 -#define TEW673GRU_GPIO_BTN_WPS 8 - -#define TEW673GRU_GPIO_RTL8366_SDA 5 -#define TEW673GRU_GPIO_RTL8366_SCK 7 - -#define TEW673GRU_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TEW673GRU_KEYS_DEBOUNCE_INTERVAL (3 * TEW673GRU_KEYS_POLL_INTERVAL) - -#define TEW673GRU_CAL0_OFFSET 0x1000 -#define TEW673GRU_CAL1_OFFSET 0x5000 -#define TEW673GRU_MAC0_OFFSET 0xffa0 -#define TEW673GRU_MAC1_OFFSET 0xffb4 - -#define TEW673GRU_CAL_LOCATION_0 0x1f660000 -#define TEW673GRU_CAL_LOCATION_1 0x1f7f0000 - -static struct gpio_led tew673gru_leds_gpio[] __initdata = { - { - .name = "trendnet:blue:wps", - .gpio = TEW673GRU_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button tew673gru_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW673GRU_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW673GRU_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct rtl8366_initval tew673gru_rtl8366s_initvals[] = { - { .reg = 0x06, .val = 0x0108 }, -}; - -static struct rtl8366_platform_data tew673gru_rtl8366s_data = { - .gpio_sda = TEW673GRU_GPIO_RTL8366_SDA, - .gpio_sck = TEW673GRU_GPIO_RTL8366_SCK, - .num_initvals = ARRAY_SIZE(tew673gru_rtl8366s_initvals), - .initvals = tew673gru_rtl8366s_initvals, -}; - -static struct platform_device tew673gru_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tew673gru_rtl8366s_data, - } -}; - -static struct spi_board_info tew673gru_spi_info[] = { - { - .bus_num = 1, - .chip_select = 0, - .max_speed_hz = 400000, - .modalias = "spidev", - .mode = SPI_MODE_2, - .controller_data = (void *) TEW673GRU_GPIO_LCD_CS, - }, -}; - -static struct spi_gpio_platform_data tew673gru_spi_data = { - .sck = TEW673GRU_GPIO_LCD_SCK, - .miso = TEW673GRU_GPIO_LCD_MISO, - .mosi = TEW673GRU_GPIO_LCD_MOSI, - .num_chipselect = 1, -}; - -static struct platform_device tew673gru_spi_device = { - .name = "spi_gpio", - .id = 1, - .dev = { - .platform_data = &tew673gru_spi_data, - }, -}; - -static bool __init tew673gru_is_caldata_valid(u8 *p) -{ - u16 *magic0, *magic1; - - magic0 = (u16 *)(p + TEW673GRU_CAL0_OFFSET); - magic1 = (u16 *)(p + TEW673GRU_CAL1_OFFSET); - - return (*magic0 == 0xa55a && *magic1 == 0xa55a); -} - -static void __init tew673gru_wlan_init(void) -{ - u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; - u8 *caldata; - - caldata = (u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0); - if (!tew673gru_is_caldata_valid(caldata)) { - caldata = (u8 *)KSEG1ADDR(TEW673GRU_CAL_LOCATION_1); - if (!tew673gru_is_caldata_valid(caldata)) { - pr_err("no calibration data found\n"); - return; - } - } - - ath79_parse_ascii_mac(caldata + TEW673GRU_MAC0_OFFSET, mac1); - ath79_parse_ascii_mac(caldata + TEW673GRU_MAC1_OFFSET, mac2); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2); - ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3); - - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_led_pin(1, 5); - - ap94_pci_init(caldata + TEW673GRU_CAL0_OFFSET, mac1, - caldata + TEW673GRU_CAL1_OFFSET, mac2); -} - -static void __init tew673gru_setup(void) -{ - tew673gru_wlan_init(); - - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x11110000; - - ath79_eth1_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - ath79_eth1_pll_data.pll_1000 = 0x11110000; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tew673gru_leds_gpio), - tew673gru_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TEW673GRU_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tew673gru_gpio_keys), - tew673gru_gpio_keys); - - ath79_register_usb(); - - platform_device_register(&tew673gru_rtl8366s_device); - - spi_register_board_info(tew673gru_spi_info, - ARRAY_SIZE(tew673gru_spi_info)); - platform_device_register(&tew673gru_spi_device); -} - -MIPS_MACHINE(ATH79_MACH_TEW_673GRU, "TEW-673GRU", "TRENDnet TEW-673GRU", - tew673gru_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-712br.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-712br.c deleted file mode 100644 index 304b994..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-712br.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * TRENDnet TEW-712BR board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TEW_712BR_GPIO_BTN_WPS 11 -#define TEW_712BR_GPIO_BTN_RESET 12 - -#define TEW_712BR_GPIO_LED_LAN1 13 -#define TEW_712BR_GPIO_LED_LAN2 14 -#define TEW_712BR_GPIO_LED_LAN3 15 -#define TEW_712BR_GPIO_LED_LAN4 16 -#define TEW_712BR_GPIO_LED_POWER_GREEN 20 -#define TEW_712BR_GPIO_LED_POWER_ORANGE 27 -#define TEW_712BR_GPIO_LED_WAN_GREEN 17 -#define TEW_712BR_GPIO_LED_WAN_ORANGE 23 -#define TEW_712BR_GPIO_LED_WLAN 0 -#define TEW_712BR_GPIO_LED_WPS 26 - -#define TEW_712BR_GPIO_WAN_LED_ENABLE 1 - -#define TEW_712BR_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TEW_712BR_KEYS_DEBOUNCE_INTERVAL (3 * TEW_712BR_KEYS_POLL_INTERVAL) - -#define TEW_712BR_ART_ADDRESS 0x1f010000 -#define TEW_712BR_CALDATA_OFFSET 0x1000 - -#define TEW_712BR_MAC_PART_ADDRESS 0x1f020000 -#define TEW_712BR_LAN_MAC_OFFSET 0x04 -#define TEW_712BR_WAN_MAC_OFFSET 0x16 - -static struct gpio_led tew_712br_leds_gpio[] __initdata = { - { - .name = "trendnet:green:lan1", - .gpio = TEW_712BR_GPIO_LED_LAN1, - .active_low = 0, - }, { - .name = "trendnet:green:lan2", - .gpio = TEW_712BR_GPIO_LED_LAN2, - .active_low = 0, - }, { - .name = "trendnet:green:lan3", - .gpio = TEW_712BR_GPIO_LED_LAN3, - .active_low = 0, - }, { - .name = "trendnet:green:lan4", - .gpio = TEW_712BR_GPIO_LED_LAN4, - .active_low = 0, - }, { - .name = "trendnet:blue:wps", - .gpio = TEW_712BR_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "trendnet:green:power", - .gpio = TEW_712BR_GPIO_LED_POWER_GREEN, - .active_low = 0, - }, { - .name = "trendnet:orange:power", - .gpio = TEW_712BR_GPIO_LED_POWER_ORANGE, - .active_low = 0, - }, { - .name = "trendnet:green:wan", - .gpio = TEW_712BR_GPIO_LED_WAN_GREEN, - .active_low = 1, - }, { - .name = "trendnet:orange:wan", - .gpio = TEW_712BR_GPIO_LED_WAN_ORANGE, - .active_low = 0, - }, { - .name = "trendnet:green:wlan", - .gpio = TEW_712BR_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button tew_712br_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TEW_712BR_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_712BR_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TEW_712BR_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_712BR_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init tew_712br_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(TEW_712BR_ART_ADDRESS); - u8 *mac = (u8 *) KSEG1ADDR(TEW_712BR_MAC_PART_ADDRESS); - u8 lan_mac[ETH_ALEN]; - u8 wan_mac[ETH_ALEN]; - - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - gpio_request_one(TEW_712BR_GPIO_WAN_LED_ENABLE, - GPIOF_OUT_INIT_LOW, "WAN LED enable"); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_712br_leds_gpio), - tew_712br_leds_gpio); - - ath79_register_gpio_keys_polled(1, TEW_712BR_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tew_712br_gpio_keys), - tew_712br_gpio_keys); - - ath79_register_m25p80(NULL); - - ath79_parse_ascii_mac(mac + TEW_712BR_LAN_MAC_OFFSET, lan_mac); - ath79_parse_ascii_mac(mac + TEW_712BR_WAN_MAC_OFFSET, wan_mac); - - ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(art + TEW_712BR_CALDATA_OFFSET, wan_mac); -} - -MIPS_MACHINE(ATH79_MACH_TEW_712BR, "TEW-712BR", - "TRENDnet TEW-712BR", tew_712br_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-732br.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-732br.c deleted file mode 100644 index 1f26f6f..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-732br.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * TRENDnet TEW-732BR board support - * - * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TEW_732BR_GPIO_BTN_WPS 16 -#define TEW_732BR_GPIO_BTN_RESET 17 - -#define TEW_732BR_GPIO_LED_POWER_GREEN 4 -#define TEW_732BR_GPIO_LED_POWER_AMBER 14 -#define TEW_732BR_GPIO_LED_PLANET_GREEN 12 -#define TEW_732BR_GPIO_LED_PLANET_AMBER 22 - -#define TEW_732BR_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TEW_732BR_KEYS_DEBOUNCE_INTERVAL (3 * TEW_732BR_KEYS_POLL_INTERVAL) - -#define TEW_732BR_ART_ADDRESS 0x1fff0000 -#define TEW_732BR_CALDATA_OFFSET 0x1000 -#define TEW_732BR_LAN_MAC_OFFSET 0xffa0 -#define TEW_732BR_WAN_MAC_OFFSET 0xffb4 - -static struct gpio_led tew_732br_leds_gpio[] __initdata = { - { - .name = "trendnet:green:power", - .gpio = TEW_732BR_GPIO_LED_POWER_GREEN, - .active_low = 0, - }, - { - .name = "trendnet:amber:power", - .gpio = TEW_732BR_GPIO_LED_POWER_AMBER, - .active_low = 0, - }, - { - .name = "trendnet:green:wan", - .gpio = TEW_732BR_GPIO_LED_PLANET_GREEN, - .active_low = 1, - }, - { - .name = "trendnet:amber:wan", - .gpio = TEW_732BR_GPIO_LED_PLANET_AMBER, - .active_low = 0, - }, -}; - -static struct gpio_keys_button tew_732br_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TEW_732BR_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_732BR_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TEW_732BR_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_732BR_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -static void __init tew_732br_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(TEW_732BR_ART_ADDRESS); - u8 lan_mac[ETH_ALEN]; - u8 wan_mac[ETH_ALEN]; - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_732br_leds_gpio), - tew_732br_leds_gpio); - - ath79_register_gpio_keys_polled(1, TEW_732BR_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tew_732br_gpio_keys), - tew_732br_gpio_keys); - - ath79_register_m25p80(NULL); - - ath79_parse_ascii_mac(art + TEW_732BR_LAN_MAC_OFFSET, lan_mac); - ath79_parse_ascii_mac(art + TEW_732BR_WAN_MAC_OFFSET, wan_mac); - - ath79_register_wmac(art + TEW_732BR_CALDATA_OFFSET, lan_mac); - - ath79_register_mdio(1, 0x0); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); - - /* LAN: GMAC1 is connected to the internal switch */ - ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - - ath79_register_eth(1); - - /* WAN: GMAC0 is connected to the PHY4 of the internal switch */ - ath79_init_mac(ath79_eth0_data.mac_addr, wan_mac, 0); - - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(4); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(4); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - - ath79_register_eth(0); -} - -MIPS_MACHINE(ATH79_MACH_TEW_732BR, "TEW-732BR", "TRENDnet TEW-732BR", - tew_732br_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c deleted file mode 100644 index 74ccf63..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * TP-LINK TL-MR11U/TL-MR3040 board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_MR11U_GPIO_LED_3G 27 -#define TL_MR11U_GPIO_LED_WLAN 26 -#define TL_MR11U_GPIO_LED_LAN 17 - -#define TL_MR11U_GPIO_BTN_WPS 20 -#define TL_MR11U_GPIO_BTN_RESET 11 - -#define TL_MR11U_GPIO_USB_POWER 8 -#define TL_MR3040_GPIO_USB_POWER 18 - -#define TL_MR3040_V2_GPIO_BTN_SW1 19 -#define TL_MR3040_V2_GPIO_BTN_SW2 20 - -#define TL_MR11U_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR11U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR11U_KEYS_POLL_INTERVAL) - -static const char *tl_mr11u_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr11u_flash_data = { - .part_probes = tl_mr11u_part_probes, -}; - -static struct gpio_led tl_mr11u_leds_gpio[] __initdata = { - { - .name = "tp-link:green:3g", - .gpio = TL_MR11U_GPIO_LED_3G, - .active_low = 1, - }, - { - .name = "tp-link:green:wlan", - .gpio = TL_MR11U_GPIO_LED_WLAN, - .active_low = 1, - }, - { - .name = "tp-link:green:lan", - .gpio = TL_MR11U_GPIO_LED_LAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_mr11u_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR11U_GPIO_BTN_RESET, - .active_low = 0, - }, - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR11U_GPIO_BTN_WPS, - .active_low = 0, - }, -}; - -static struct gpio_keys_button tl_mr3040_v2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR11U_GPIO_BTN_RESET, - .active_low = 0, - }, - { - .desc = "sw1", - .type = EV_SW, - .code = BTN_0, - .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3040_V2_GPIO_BTN_SW1, - .active_low = 0, - }, - { - .desc = "sw2", - .type = EV_SW, - .code = BTN_1, - .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3040_V2_GPIO_BTN_SW2, - .active_low = 0, - } -}; - -static void __init common_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* Disable hardware control LAN1 and LAN2 LEDs, enabling GPIO14 and GPIO15 */ - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN); - - /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_m25p80(&tl_mr11u_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), - tl_mr11u_leds_gpio); - - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -static void __init tl_mr11u_setup(void) -{ - common_setup(); - - ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr11u_gpio_keys), - tl_mr11u_gpio_keys); - gpio_request_one(TL_MR11U_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR11U, "TL-MR11U", "TP-LINK TL-MR11U", - tl_mr11u_setup); - -static void __init tl_mr3040_setup(void) -{ - common_setup(); - - ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, - 1, tl_mr11u_gpio_keys); - gpio_request_one(TL_MR3040_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3040, "TL-MR3040", "TP-LINK TL-MR3040", - tl_mr3040_setup); - -static void __init tl_mr3040_v2_setup(void) -{ - common_setup(); - - ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3040_v2_gpio_keys), - tl_mr3040_v2_gpio_keys); - gpio_request_one(TL_MR3040_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3040_V2, "TL-MR3040-v2", "TP-LINK TL-MR3040 v2", - tl_mr3040_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr13u.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr13u.c deleted file mode 100644 index 8b03645..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr13u.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * TP-LINK TL-MR13U board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_MR13U_GPIO_LED_SYSTEM 27 - -#define TL_MR13U_GPIO_BTN_RESET 11 -#define TL_MR13U_GPIO_BTN_SW1 6 -#define TL_MR13U_GPIO_BTN_SW2 7 - -#define TL_MR13U_GPIO_USB_POWER 18 - -#define TL_MR13U_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR13U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR13U_KEYS_POLL_INTERVAL) - -static const char *tl_mr13u_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr13u_flash_data = { - .part_probes = tl_mr13u_part_probes, -}; - -static struct gpio_led tl_mr13u_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:system", - .gpio = TL_MR13U_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_mr13u_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR13U_GPIO_BTN_RESET, - .active_low = 0, - }, - { - .desc = "sw1", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR13U_GPIO_BTN_SW1, - .active_low = 0, - }, - { - .desc = "sw2", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_MR13U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR13U_GPIO_BTN_SW2, - .active_low = 0, - }, -}; - -static void __init tl_mr13u_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_m25p80(&tl_mr13u_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr13u_leds_gpio), - tl_mr13u_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_MR13U_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr13u_gpio_keys), - tl_mr13u_gpio_keys); - - gpio_request_one(TL_MR13U_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR13U, "TL-MR13U", "TP-LINK TL-MR13U v1", - tl_mr13u_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c deleted file mode 100644 index 0a9dfbc..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * TP-LINK TL-MR3020 board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_MR3020_GPIO_LED_3G 27 -#define TL_MR3020_GPIO_LED_WLAN 0 -#define TL_MR3020_GPIO_LED_LAN 17 -#define TL_MR3020_GPIO_LED_WPS 26 - -#define TL_MR3020_GPIO_BTN_WPS 11 -#define TL_MR3020_GPIO_BTN_SW1 18 -#define TL_MR3020_GPIO_BTN_SW2 20 - -#define TL_MR3020_GPIO_USB_POWER 8 - -#define TL_MR3020_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR3020_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3020_KEYS_POLL_INTERVAL) - -static const char *tl_mr3020_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr3020_flash_data = { - .part_probes = tl_mr3020_part_probes, -}; - -static struct gpio_led tl_mr3020_leds_gpio[] __initdata = { - { - .name = "tp-link:green:3g", - .gpio = TL_MR3020_GPIO_LED_3G, - .active_low = 1, - }, - { - .name = "tp-link:green:wlan", - .gpio = TL_MR3020_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "tp-link:green:lan", - .gpio = TL_MR3020_GPIO_LED_LAN, - .active_low = 1, - }, - { - .name = "tp-link:green:wps", - .gpio = TL_MR3020_GPIO_LED_WPS, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_mr3020_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_WPS, - .active_low = 0, - }, - { - .desc = "sw1", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_SW1, - .active_low = 0, - }, - { - .desc = "sw2", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_SW2, - .active_low = 0, - } -}; - -static void __init tl_mr3020_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_m25p80(&tl_mr3020_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), - tl_mr3020_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_MR3020_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3020_gpio_keys), - tl_mr3020_gpio_keys); - - gpio_request_one(TL_MR3020_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3020, "TL-MR3020", "TP-LINK TL-MR3020", - tl_mr3020_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3x20.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3x20.c deleted file mode 100644 index 5924ac5..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3x20.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * TP-LINK TL-MR3220/3420 board support - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define TL_MR3X20_GPIO_LED_QSS 0 -#define TL_MR3X20_GPIO_LED_SYSTEM 1 -#define TL_MR3X20_GPIO_LED_3G 8 - -#define TL_MR3X20_GPIO_BTN_RESET 11 -#define TL_MR3X20_GPIO_BTN_QSS 12 - -#define TL_MR3X20_GPIO_USB_POWER 6 - -#define TL_MR3X20_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR3X20_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3X20_KEYS_POLL_INTERVAL) - -static const char *tl_mr3x20_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr3x20_flash_data = { - .part_probes = tl_mr3x20_part_probes, -}; - -static struct gpio_led tl_mr3x20_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_MR3X20_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_MR3X20_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:3g", - .gpio = TL_MR3X20_GPIO_LED_3G, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_mr3x20_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3X20_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3X20_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_ap99_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_mr3x20_flash_data); - - ath79_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3x20_gpio_keys), - tl_mr3x20_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - /* WAN port */ - ath79_register_eth(0); - - ap91_pci_init(ee, mac); -} - -static void __init tl_mr3x20_usb_setup(void) -{ - /* enable power for the USB port */ - gpio_request_one(TL_MR3X20_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); -} - -static void __init tl_mr3220_setup(void) -{ - tl_ap99_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), - tl_mr3x20_leds_gpio); - ap9x_pci_setup_wmac_led_pin(0, 1); - tl_mr3x20_usb_setup(); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3220, "TL-MR3220", "TP-LINK TL-MR3220", - tl_mr3220_setup); - -static void __init tl_mr3420_setup(void) -{ - tl_ap99_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), - tl_mr3x20_leds_gpio); - ap9x_pci_setup_wmac_led_pin(0, 0); - tl_mr3x20_usb_setup(); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420", - tl_mr3420_setup); - -static void __init tl_wr841n_v7_setup(void) -{ - tl_ap99_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio) - 1, - tl_mr3x20_leds_gpio); - ap9x_pci_setup_wmac_led_pin(0, 0); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR841N_V7, "TL-WR841N-v7", - "TP-LINK TL-WR841N/ND v7", tl_wr841n_v7_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa830re-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa830re-v2.c deleted file mode 100644 index 1c74fed..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa830re-v2.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * TP-LINK TL-WA830RE v2 board support - * - * Copyright (C) 2014 Fredrik Jonson <fredrik@famjonson.se> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WA830REV2_GPIO_LED_WLAN 13 -#define TL_WA830REV2_GPIO_LED_QSS 15 -#define TL_WA830REV2_GPIO_LED_LAN 18 -#define TL_WA830REV2_GPIO_LED_SYSTEM 14 - -#define TL_WA830REV2_GPIO_BTN_RESET 17 -#define TL_WA830REV2_GPIO_SW_RFKILL 16 /* WPS for MR3420 v2 */ - -#define TL_WA830REV2_GPIO_USB_POWER 4 - -#define TL_WA830REV2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA830REV2_KEYS_POLL_INTERVAL) - -static const char *tl_wa830re_v2_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wa830re_v2_flash_data = { - .part_probes = tl_wa830re_v2_part_probes, -}; - -static struct gpio_led tl_wa830re_v2_leds_gpio[] __initdata = { - { - .name = "tp-link:green:qss", - .gpio = TL_WA830REV2_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WA830REV2_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:lan", - .gpio = TL_WA830REV2_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WA830REV2_GPIO_LED_WLAN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wa830re_v2_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA830REV2_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "RFKILL switch", - .type = EV_SW, - .code = KEY_RFKILL, - .debounce_interval = TL_WA830REV2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA830REV2_GPIO_SW_RFKILL, - .active_low = 0, - } -}; - -static void __init tl_ap123_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* Disable JTAG, enabling GPIOs 0-3 */ - /* Configure OBS4 line, for GPIO 4*/ - ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, - AR934X_GPIO_FUNC_CLK_OBS4_EN); - - /* config gpio4 as normal gpio function */ - ath79_gpio_output_select(TL_WA830REV2_GPIO_USB_POWER, - AR934X_GPIO_OUT_GPIO); - - ath79_register_m25p80(&tl_wa830re_v2_flash_data); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); - - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - /* GMAC0 is connected to the PHY0 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -static void __init tl_wa830re_v2_setup(void) -{ - tl_ap123_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa830re_v2_leds_gpio) - 1, - tl_wa830re_v2_leds_gpio); - - ath79_register_gpio_keys_polled(1, TL_WA830REV2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa830re_v2_gpio_keys), - tl_wa830re_v2_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA830RE_V2, "TL-WA830RE-v2", "TP-LINK TL-WA830RE v2", - tl_wa830re_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd-v2.c deleted file mode 100644 index b4fb2a9..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd-v2.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * TP-LINK TL-WA901N/ND v2 board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2010 Pieter Hollants <pieter@hollants.com> - * Copyright (C) 2011 Jonathan Bennett <jbscience87@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WA901ND_V2_GPIO_LED_QSS 4 -#define TL_WA901ND_V2_GPIO_LED_SYSTEM 2 -#define TL_WA901ND_V2_GPIO_LED_WLAN 9 - -#define TL_WA901ND_V2_GPIO_BTN_RESET 3 -#define TL_WA901ND_V2_GPIO_BTN_QSS 7 - -#define TL_WA901ND_V2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL \ - (3 * TL_WA901ND_V2_KEYS_POLL_INTERVAL) - -static const char *tl_wa901nd_v2_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wa901nd_v2_flash_data = { - .part_probes = tl_wa901nd_v2_part_probes, -}; - -static struct gpio_led tl_wa901nd_v2_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WA901ND_V2_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WA901ND_V2_GPIO_LED_QSS, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WA901ND_V2_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wa901nd_v2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_V2_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_V2_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wa901nd_v2_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = 0x00001000; - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | - AR71XX_RESET_GE0_PHY; - ath79_register_eth(0); - - ath79_register_m25p80(&tl_wa901nd_v2_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_v2_leds_gpio), - tl_wa901nd_v2_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WA901ND_V2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa901nd_v2_gpio_keys), - tl_wa901nd_v2_gpio_keys); - - ath79_register_wmac(eeprom, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V2, "TL-WA901ND-v2", - "TP-LINK TL-WA901ND v2", tl_wa901nd_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd.c deleted file mode 100644 index 957b92c..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd.c +++ /dev/null @@ -1,127 +0,0 @@ -/* - * TP-LINK TL-WA901N/ND v1, TL-WA7510N v1 board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2010 Pieter Hollants <pieter@hollants.com> - * Copyright (C) 2012 Stefan Helmert <helst_listen@aol.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" -#include "pci.h" - -#define TL_WA901ND_GPIO_LED_QSS 0 -#define TL_WA901ND_GPIO_LED_SYSTEM 1 -#define TL_WA901ND_GPIO_LED_LAN 13 - -#define TL_WA901ND_GPIO_BTN_RESET 11 -#define TL_WA901ND_GPIO_BTN_QSS 12 - -#define TL_WA901ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WA901ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA901ND_KEYS_POLL_INTERVAL) - -static const char *tl_wa901nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wa901nd_flash_data = { - .part_probes = tl_wa901nd_part_probes, -}; - -static struct gpio_led tl_wa901nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan", - .gpio = TL_WA901ND_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WA901ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WA901ND_GPIO_LED_QSS, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wa901nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init common_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - - /* - * ath79_eth0 would be the WAN port, but is not connected. - * ath79_eth1 connects to the internal switch chip, however - * we have a single LAN port only. - */ - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - - ath79_register_m25p80(&tl_wa901nd_flash_data); -} - -static void __init tl_wa901nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - common_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio), - tl_wa901nd_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa901nd_gpio_keys), - tl_wa901nd_gpio_keys); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA901ND, "TL-WA901ND", "TP-LINK TL-WA901ND", - tl_wa901nd_setup); - -static void __init tl_wa7510n_v1_setup(void) -{ - common_setup(); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA7510N_V1, "TL-WA7510N", "TP-LINK TL-WA7510N v1", - tl_wa7510n_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wax50re.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wax50re.c deleted file mode 100644 index 965b1cd..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wax50re.c +++ /dev/null @@ -1,313 +0,0 @@ -/* - * TP-LINK TL-WA750RE v1/TL-WA801ND v2/TL-WA850RE v1/TL-WA901ND v3 - * board support - * - * Copyright (C) 2013 Martijn Zilverschoon <thefriedzombie@gmail.com> - * Copyright (C) 2013 Jiri Pirko <jiri@resnulli.us> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WAX50RE_GPIO_LED_LAN 20 -#define TL_WAX50RE_GPIO_LED_WLAN 13 -#define TL_WAX50RE_GPIO_LED_RE 15 -#define TL_WAX50RE_GPIO_LED_SIGNAL1 0 -#define TL_WAX50RE_GPIO_LED_SIGNAL2 1 -#define TL_WAX50RE_GPIO_LED_SIGNAL3 2 -#define TL_WAX50RE_GPIO_LED_SIGNAL4 3 -#define TL_WAX50RE_GPIO_LED_SIGNAL5 4 - -#define TL_WA860RE_GPIO_LED_WLAN_ORANGE 0 -#define TL_WA860RE_GPIO_LED_WLAN_GREEN 2 -#define TL_WA860RE_GPIO_LED_POWER_ORANGE 12 -#define TL_WA860RE_GPIO_LED_POWER_GREEN 14 -#define TL_WA860RE_GPIO_LED_LAN 20 - -#define TL_WA801ND_V2_GPIO_LED_LAN 18 -#define TL_WA801ND_V2_GPIO_LED_SYSTEM 14 - -#define TL_WAX50RE_GPIO_BTN_RESET 17 -#define TL_WAX50RE_GPIO_BTN_WPS 16 - -#define TL_WA860RE_GPIO_BTN_RESET 17 -#define TL_WA860RE_GPIO_BTN_WPS 16 -#define TL_WA860RE_GPIO_BTN_ONOFF 11 - -#define TL_WAX50RE_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL (3 * TL_WAX50RE_KEYS_POLL_INTERVAL) - -static const char *tl_wax50re_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wax50re_flash_data = { - .part_probes = tl_wax50re_part_probes, -}; - -static struct gpio_led tl_wa750re_leds_gpio[] __initdata = { - { - .name = "tp-link:orange:lan", - .gpio = TL_WAX50RE_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:orange:wlan", - .gpio = TL_WAX50RE_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "tp-link:orange:re", - .gpio = TL_WAX50RE_GPIO_LED_RE, - .active_low = 1, - }, { - .name = "tp-link:orange:signal1", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL1, - .active_low = 1, - }, { - .name = "tp-link:orange:signal2", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL2, - .active_low = 1, - }, { - .name = "tp-link:orange:signal3", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL3, - .active_low = 1, - }, { - .name = "tp-link:orange:signal4", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL4, - .active_low = 1, - }, { - .name = "tp-link:orange:signal5", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL5, - .active_low = 1, - }, -}; - -static struct gpio_led tl_wa850re_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:lan", - .gpio = TL_WAX50RE_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:blue:wlan", - .gpio = TL_WAX50RE_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "tp-link:blue:re", - .gpio = TL_WAX50RE_GPIO_LED_RE, - .active_low = 1, - }, { - .name = "tp-link:blue:signal1", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL1, - .active_low = 1, - }, { - .name = "tp-link:blue:signal2", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL2, - .active_low = 1, - }, { - .name = "tp-link:blue:signal3", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL3, - .active_low = 1, - }, { - .name = "tp-link:blue:signal4", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL4, - .active_low = 1, - }, { - .name = "tp-link:blue:signal5", - .gpio = TL_WAX50RE_GPIO_LED_SIGNAL5, - .active_low = 1, - }, -}; - -static struct gpio_led tl_wa860re_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan", - .gpio = TL_WA860RE_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:green:power", - .gpio = TL_WA860RE_GPIO_LED_POWER_GREEN, - .active_low = 1, - }, { - .name = "tp-link:orange:power", - .gpio = TL_WA860RE_GPIO_LED_POWER_ORANGE, - .active_low = 1, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WA860RE_GPIO_LED_WLAN_GREEN, - .active_low = 1, - }, { - .name = "tp-link:orange:wlan", - .gpio = TL_WA860RE_GPIO_LED_WLAN_ORANGE, - .active_low = 1, - }, -}; - - -static struct gpio_keys_button tl_wax50re_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WAX50RE_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "WPS", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WAX50RE_GPIO_BTN_WPS, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wa860re_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA860RE_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "WPS", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA860RE_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "ONOFF", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_WAX50RE_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA860RE_GPIO_BTN_ONOFF, - .active_low = 1, - }, -}; - -static struct gpio_led tl_wa801nd_v2_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan", - .gpio = TL_WA801ND_V2_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WAX50RE_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WAX50RE_GPIO_LED_RE, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WA801ND_V2_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static void __init tl_ap123_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_wax50re_flash_data); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); - - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -static void __init tl_wa750re_setup(void) -{ - tl_ap123_setup(); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa750re_leds_gpio), - tl_wa750re_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wax50re_gpio_keys), - tl_wax50re_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA750RE, "TL-WA750RE", "TP-LINK TL-WA750RE", - tl_wa750re_setup); - -static void __init tl_wa801nd_v2_setup(void) -{ - tl_ap123_setup(); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa801nd_v2_leds_gpio), - tl_wa801nd_v2_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wax50re_gpio_keys), - tl_wax50re_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA801ND_V2, "TL-WA801ND-v2", "TP-LINK TL-WA801ND v2", - tl_wa801nd_v2_setup); - -static void __init tl_wa850re_setup(void) -{ - tl_ap123_setup(); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa850re_leds_gpio), - tl_wa850re_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wax50re_gpio_keys), - tl_wax50re_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA850RE, "TL-WA850RE", "TP-LINK TL-WA850RE", - tl_wa850re_setup); - -static void __init tl_wa860re_setup(void) -{ - tl_ap123_setup(); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa860re_leds_gpio), - tl_wa860re_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa860re_gpio_keys), - tl_wa860re_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA860RE, "TL-WA860RE", "TP-LINK TL-WA860RE", - tl_wa860re_setup); - -static void __init tl_wa901nd_v3_setup(void) -{ - tl_ap123_setup(); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa801nd_v2_leds_gpio), - tl_wa801nd_v2_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WAX50RE_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wax50re_gpio_keys) - 1, - tl_wax50re_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V3, "TL-WA901ND-v3", "TP-LINK TL-WA901ND v3", - tl_wa901nd_v3_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c deleted file mode 100644 index 452c20b..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr3500.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * TP-LINK TL-WDR3500 board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2013 Gui Iribarren <gui@altermundi.net> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define WDR3500_GPIO_LED_USB 11 -#define WDR3500_GPIO_LED_WLAN2G 13 -#define WDR3500_GPIO_LED_SYSTEM 14 -#define WDR3500_GPIO_LED_QSS 15 -#define WDR3500_GPIO_LED_WAN 18 -#define WDR3500_GPIO_LED_LAN1 19 -#define WDR3500_GPIO_LED_LAN2 20 -#define WDR3500_GPIO_LED_LAN3 21 -#define WDR3500_GPIO_LED_LAN4 22 - -#define WDR3500_GPIO_BTN_WPS 16 -#define WDR3500_GPIO_BTN_RFKILL 17 - -#define WDR3500_GPIO_USB_POWER 12 - -#define WDR3500_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WDR3500_KEYS_DEBOUNCE_INTERVAL (3 * WDR3500_KEYS_POLL_INTERVAL) - -#define WDR3500_MAC0_OFFSET 0 -#define WDR3500_MAC1_OFFSET 6 -#define WDR3500_WMAC_CALDATA_OFFSET 0x1000 -#define WDR3500_PCIE_CALDATA_OFFSET 0x5000 - -static const char *wdr3500_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data wdr3500_flash_data = { - .part_probes = wdr3500_part_probes, -}; - -static struct gpio_led wdr3500_leds_gpio[] __initdata = { - { - .name = "tp-link:green:qss", - .gpio = WDR3500_GPIO_LED_QSS, - .active_low = 1, - }, - { - .name = "tp-link:green:system", - .gpio = WDR3500_GPIO_LED_SYSTEM, - .active_low = 1, - }, - { - .name = "tp-link:green:usb", - .gpio = WDR3500_GPIO_LED_USB, - .active_low = 1, - }, - { - .name = "tp-link:green:wlan2g", - .gpio = WDR3500_GPIO_LED_WLAN2G, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wdr3500_gpio_keys[] __initdata = { - { - .desc = "QSS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL, - .gpio = WDR3500_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "RFKILL switch", - .type = EV_SW, - .code = KEY_RFKILL, - .debounce_interval = WDR3500_KEYS_DEBOUNCE_INTERVAL, - .gpio = WDR3500_GPIO_BTN_RFKILL, - }, -}; - - -static void __init wdr3500_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(&wdr3500_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr3500_leds_gpio), - wdr3500_leds_gpio); - ath79_register_gpio_keys_polled(-1, WDR3500_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wdr3500_gpio_keys), - wdr3500_gpio_keys); - - ath79_init_mac(tmpmac, mac, 0); - ath79_register_wmac(art + WDR3500_WMAC_CALDATA_OFFSET, tmpmac); - - ath79_init_mac(tmpmac, mac, 1); - ap9x_pci_setup_wmac_led_pin(0, 0); - ap91_pci_init(art + WDR3500_PCIE_CALDATA_OFFSET, tmpmac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(1, 0x0); - - /* LAN */ - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - /* GMAC1 is connected to the internal switch */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - - ath79_register_eth(1); - - /* WAN */ - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 2); - - /* GMAC0 is connected to the PHY4 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(4); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(4); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - - ath79_register_eth(0); - - gpio_request_one(WDR3500_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_gpio_output_select(WDR3500_GPIO_LED_LAN1, - AR934X_GPIO_OUT_LED_LINK3); - ath79_gpio_output_select(WDR3500_GPIO_LED_LAN2, - AR934X_GPIO_OUT_LED_LINK2); - ath79_gpio_output_select(WDR3500_GPIO_LED_LAN3, - AR934X_GPIO_OUT_LED_LINK1); - ath79_gpio_output_select(WDR3500_GPIO_LED_LAN4, - AR934X_GPIO_OUT_LED_LINK0); - ath79_gpio_output_select(WDR3500_GPIO_LED_WAN, - AR934X_GPIO_OUT_LED_LINK4); -} - -MIPS_MACHINE(ATH79_MACH_TL_WDR3500, "TL-WDR3500", - "TP-LINK TL-WDR3500", - wdr3500_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c deleted file mode 100644 index 99ae80d..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr4300.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * TP-LINK TL-WDR4300 board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define WDR4300_GPIO_LED_USB1 11 -#define WDR4300_GPIO_LED_USB2 12 -#define WDR4300_GPIO_LED_WLAN2G 13 -#define WDR4300_GPIO_LED_SYSTEM 14 -#define WDR4300_GPIO_LED_QSS 15 - -#define WDR4300_GPIO_BTN_WPS 16 -#define WDR4300_GPIO_BTN_RFKILL 17 - -#define WDR4300_GPIO_EXTERNAL_LNA0 18 -#define WDR4300_GPIO_EXTERNAL_LNA1 19 - -#define WDR4300_GPIO_USB1_POWER 22 -#define WDR4300_GPIO_USB2_POWER 21 - -#define WDR4300_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WDR4300_KEYS_POLL_INTERVAL) - -#define WDR4300_MAC0_OFFSET 0 -#define WDR4300_MAC1_OFFSET 6 -#define WDR4300_WMAC_CALDATA_OFFSET 0x1000 -#define WDR4300_PCIE_CALDATA_OFFSET 0x5000 - -static const char *wdr4300_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data wdr4300_flash_data = { - .part_probes = wdr4300_part_probes, -}; - -static struct gpio_led wdr4300_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:qss", - .gpio = WDR4300_GPIO_LED_QSS, - .active_low = 1, - }, - { - .name = "tp-link:blue:system", - .gpio = WDR4300_GPIO_LED_SYSTEM, - .active_low = 1, - }, - { - .name = "tp-link:green:usb1", - .gpio = WDR4300_GPIO_LED_USB1, - .active_low = 1, - }, - { - .name = "tp-link:green:usb2", - .gpio = WDR4300_GPIO_LED_USB2, - .active_low = 1, - }, - { - .name = "tp-link:blue:wlan2g", - .gpio = WDR4300_GPIO_LED_WLAN2G, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wdr4300_gpio_keys[] __initdata = { - { - .desc = "QSS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, - .gpio = WDR4300_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "RFKILL switch", - .type = EV_SW, - .code = KEY_RFKILL, - .debounce_interval = WDR4300_KEYS_DEBOUNCE_INTERVAL, - .gpio = WDR4300_GPIO_BTN_RFKILL, - }, -}; - -static const struct ar8327_led_info wdr4300_leds_ar8327[] __initconst = { - AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"), - AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"), - AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"), - AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"), - AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"), -}; - -static struct ar8327_pad_cfg wdr4300_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_led_cfg wdr4300_ar8327_led_cfg = { - .led_ctrl0 = 0xc737c737, - .led_ctrl1 = 0x00000000, - .led_ctrl2 = 0x00000000, - .led_ctrl3 = 0x0030c300, - .open_drain = false, -}; - -static struct ar8327_platform_data wdr4300_ar8327_data = { - .pad0_cfg = &wdr4300_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &wdr4300_ar8327_led_cfg, - .num_leds = ARRAY_SIZE(wdr4300_leds_ar8327), - .leds = wdr4300_leds_ar8327, -}; - -static struct mdio_board_info wdr4300_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &wdr4300_ar8327_data, - }, -}; - -static void __init wdr4300_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(&wdr4300_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(wdr4300_leds_gpio), - wdr4300_leds_gpio); - ath79_register_gpio_keys_polled(-1, WDR4300_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wdr4300_gpio_keys), - wdr4300_gpio_keys); - - ath79_wmac_set_ext_lna_gpio(0, WDR4300_GPIO_EXTERNAL_LNA0); - ath79_wmac_set_ext_lna_gpio(1, WDR4300_GPIO_EXTERNAL_LNA1); - - ath79_init_mac(tmpmac, mac, -1); - ath79_register_wmac(art + WDR4300_WMAC_CALDATA_OFFSET, tmpmac); - - ath79_init_mac(tmpmac, mac, 0); - ap9x_pci_setup_wmac_led_pin(0, 0); - ap91_pci_init(art + WDR4300_PCIE_CALDATA_OFFSET, tmpmac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); - - mdiobus_register_board_info(wdr4300_mdio0_info, - ARRAY_SIZE(wdr4300_mdio0_info)); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, -2); - - /* GMAC0 is connected to an AR8327N switch */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - ath79_register_eth(0); - - gpio_request_one(WDR4300_GPIO_USB1_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB1 power"); - gpio_request_one(WDR4300_GPIO_USB2_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB2 power"); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_TL_WDR4300, "TL-WDR4300", - "TP-LINK TL-WDR3600/4300/4310", - wdr4300_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1041n-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1041n-v2.c deleted file mode 100644 index fa8c474..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1041n-v2.c +++ /dev/null @@ -1,138 +0,0 @@ -/* - * TP-LINK TL-WR1041 v2 board support - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2011-2012 Anan Huang <axishero@foxmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR1041NV2_GPIO_BTN_RESET 14 -#define TL_WR1041NV2_GPIO_LED_WPS 13 -#define TL_WR1041NV2_GPIO_LED_WLAN 11 - -#define TL_WR1041NV2_GPIO_LED_SYSTEM 12 - -#define TL_WR1041NV2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1041NV2_KEYS_POLL_INTERVAL) - -#define TL_WR1041NV2_PCIE_CALDATA_OFFSET 0x5000 - -static const char *tl_wr1041nv2_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr1041nv2_flash_data = { - .part_probes = tl_wr1041nv2_part_probes, -}; - -static struct gpio_led tl_wr1041nv2_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WR1041NV2_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wps", - .gpio = TL_WR1041NV2_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR1041NV2_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr1041nv2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR1041NV2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1041NV2_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_platform_data db120_ar8327_data = { - .pad0_cfg = &db120_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - } -}; - -static struct mdio_board_info db120_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &db120_ar8327_data, - }, -}; - -static void __init tl_wr1041nv2_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_wr1041nv2_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1041nv2_leds_gpio), - tl_wr1041nv2_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_WR1041NV2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr1041nv2_gpio_keys), - tl_wr1041nv2_gpio_keys); - ath79_register_wmac(ee, mac); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | - AR934X_ETH_CFG_SW_ONLY_MODE); - - ath79_register_mdio(1, 0x0); - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - - mdiobus_register_board_info(db120_mdio0_info, - ARRAY_SIZE(db120_mdio0_info)); - - /* GMAC0 is connected to an AR8327 switch */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - ath79_register_eth(0); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR1041N_V2, "TL-WR1041N-v2", - "TP-LINK TL-WR1041N v2", tl_wr1041nv2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c deleted file mode 100644 index 3e79ee1..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c +++ /dev/null @@ -1,215 +0,0 @@ -/* - * TP-LINK TL-WR1043ND v2 board support - * - * Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org> - * - * Based on the Qualcomm Atheros AP135/AP136 reference board support code - * Copyright (c) 2012 Qualcomm Atheros - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR1043_V2_GPIO_LED_WLAN 12 -#define TL_WR1043_V2_GPIO_LED_USB 15 -#define TL_WR1043_V2_GPIO_LED_WPS 18 -#define TL_WR1043_V2_GPIO_LED_SYSTEM 19 - -#define TL_WR1043_V2_GPIO_BTN_RESET 16 -#define TL_WR1043_V2_GPIO_BTN_WLAN 17 - -#define TL_WR1043_V2_GPIO_USB_POWER 21 - -#define TL_WR1043_V2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043_V2_KEYS_POLL_INTERVAL) - -#define TL_WR1043_V2_WMAC_CALDATA_OFFSET 0x1000 - -static const char *wr1043nd_v2_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data wr1043nd_v2_flash_data = { - .part_probes = wr1043nd_v2_part_probes, -}; - -static struct gpio_led tl_wr1043_v2_leds_gpio[] __initdata = { - { - .name = "tp-link:green:wps", - .gpio = TL_WR1043_V2_GPIO_LED_WPS, - .active_low = 1, - }, - { - .name = "tp-link:green:system", - .gpio = TL_WR1043_V2_GPIO_LED_SYSTEM, - .active_low = 1, - }, - { - .name = "tp-link:green:wlan", - .gpio = TL_WR1043_V2_GPIO_LED_WLAN, - .active_low = 1, - }, - { - .name = "tp-link:green:usb", - .gpio = TL_WR1043_V2_GPIO_LED_USB, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr1043_v2_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043_V2_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "WLAN button", - .type = EV_KEY, - .code = KEY_WLAN, - .debounce_interval = TL_WR1043_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043_V2_GPIO_BTN_WLAN, - .active_low = 1, - }, -}; - -static const struct ar8327_led_info tl_wr1043_leds_ar8327[] = { - AR8327_LED_INFO(PHY0_0, HW, "tp-link:green:lan4"), - AR8327_LED_INFO(PHY1_0, HW, "tp-link:green:lan3"), - AR8327_LED_INFO(PHY2_0, HW, "tp-link:green:lan2"), - AR8327_LED_INFO(PHY3_0, HW, "tp-link:green:lan1"), - AR8327_LED_INFO(PHY4_0, HW, "tp-link:green:wan"), -}; - -/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */ -static struct ar8327_pad_cfg wr1043nd_v2_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_SGMII, - .sgmii_delay_en = true, -}; - -/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */ -static struct ar8327_pad_cfg wr1043nd_v2_ar8327_pad6_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_led_cfg wr1043nd_v2_ar8327_led_cfg = { - .led_ctrl0 = 0xcc35cc35, - .led_ctrl1 = 0xca35ca35, - .led_ctrl2 = 0xc935c935, - .led_ctrl3 = 0x03ffff00, - .open_drain = true, -}; - -static struct ar8327_platform_data wr1043nd_v2_ar8327_data = { - .pad0_cfg = &wr1043nd_v2_ar8327_pad0_cfg, - .pad6_cfg = &wr1043nd_v2_ar8327_pad6_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .port6_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &wr1043nd_v2_ar8327_led_cfg, - .num_leds = ARRAY_SIZE(tl_wr1043_leds_ar8327), - .leds = tl_wr1043_leds_ar8327, -}; - -static struct mdio_board_info wr1043nd_v2_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &wr1043nd_v2_ar8327_data, - }, -}; - -static void __init tl_wr1043nd_v2_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(&wr1043nd_v2_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043_v2_leds_gpio), - tl_wr1043_v2_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_WR1043_V2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr1043_v2_gpio_keys), - tl_wr1043_v2_gpio_keys); - - ath79_register_wmac(art + TL_WR1043_V2_WMAC_CALDATA_OFFSET, mac); - - mdiobus_register_board_info(wr1043nd_v2_mdio0_info, - ARRAY_SIZE(wr1043nd_v2_mdio0_info)); - ath79_register_mdio(0, 0x0); - - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - - /* GMAC0 is connected to the RMGII interface */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x56000000; - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_register_eth(0); - - /* GMAC1 is connected to the SGMII interface */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - ath79_eth1_pll_data.pll_1000 = 0x03000101; - - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - ath79_register_eth(1); - - ath79_register_usb(); - - gpio_request_one(TL_WR1043_V2_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR1043ND_V2, "TL-WR1043ND-v2", - "TP-LINK TL-WR1043ND v2", tl_wr1043nd_v2_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c deleted file mode 100644 index 61aeb52..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * TP-LINK TL-WR1043N/ND board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/rtl8366.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR1043ND_GPIO_LED_USB 1 -#define TL_WR1043ND_GPIO_LED_SYSTEM 2 -#define TL_WR1043ND_GPIO_LED_QSS 5 -#define TL_WR1043ND_GPIO_LED_WLAN 9 - -#define TL_WR1043ND_GPIO_BTN_RESET 3 -#define TL_WR1043ND_GPIO_BTN_QSS 7 - -#define TL_WR1043ND_GPIO_RTL8366_SDA 18 -#define TL_WR1043ND_GPIO_RTL8366_SCK 19 - -#define TL_WR1043ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr1043nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr1043nd_flash_data = { - .part_probes = tl_wr1043nd_part_probes, -}; - -static struct gpio_led tl_wr1043nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:usb", - .gpio = TL_WR1043ND_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR1043ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR1043ND_GPIO_LED_QSS, - .active_low = 0, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR1043ND_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void tl_wr1043nd_rtl8366rb_hw_reset(bool active) -{ - if (active) - ath79_device_reset_set(AR71XX_RESET_GE0_PHY); - else - ath79_device_reset_clear(AR71XX_RESET_GE0_PHY); -} - -static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = { - .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA, - .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK, - .hw_reset = tl_wr1043nd_rtl8366rb_hw_reset, -}; - -static struct platform_device tl_wr1043nd_rtl8366rb_device = { - .name = RTL8366RB_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tl_wr1043nd_rtl8366rb_data, - } -}; - -static void __init tl_wr1043nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - tl_wr1043nd_rtl8366rb_hw_reset(true); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x1a000000; - - ath79_register_eth(0); - - ath79_register_usb(); - - ath79_register_m25p80(&tl_wr1043nd_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio), - tl_wr1043nd_leds_gpio); - - platform_device_register(&tl_wr1043nd_rtl8366rb_device); - - ath79_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr1043nd_gpio_keys), - tl_wr1043nd_gpio_keys); - - ath79_register_wmac(eeprom, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR1043ND, "TL-WR1043ND", "TP-LINK TL-WR1043ND", - tl_wr1043nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr2543n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr2543n.c deleted file mode 100644 index 8f6db5e..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr2543n.c +++ /dev/null @@ -1,156 +0,0 @@ -/* - * TP-LINK TL-WR2543N/ND board support - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/rtl8367.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define TL_WR2543N_GPIO_LED_WPS 0 -#define TL_WR2543N_GPIO_LED_USB 8 - -/* The WLAN LEDs use GPIOs on the discrete AR9380 wmac */ -#define TL_WR2543N_GPIO_WMAC_LED_WLAN2G 0 -#define TL_WR2543N_GPIO_WMAC_LED_WLAN5G 1 - -#define TL_WR2543N_GPIO_BTN_RESET 11 -#define TL_WR2543N_GPIO_BTN_WPS 12 - -#define TL_WR2543N_GPIO_RTL8367_SDA 1 -#define TL_WR2543N_GPIO_RTL8367_SCK 6 - -#define TL_WR2543N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR2543N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR2543N_KEYS_POLL_INTERVAL) - -static const char *tl_wr2543n_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr2543n_flash_data = { - .part_probes = tl_wr2543n_part_probes, -}; - -static struct gpio_led tl_wr2543n_leds_gpio[] __initdata = { - { - .name = "tp-link:green:usb", - .gpio = TL_WR2543N_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "tp-link:green:wps", - .gpio = TL_WR2543N_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_led tl_wr2543n_wmac_leds_gpio[] = { - { - .name = "tp-link:green:wlan5g", - .gpio = TL_WR2543N_GPIO_WMAC_LED_WLAN5G, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr2543n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR2543N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR2543N_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct rtl8367_extif_config tl_wr2543n_rtl8367_extif0_cfg = { - .mode = RTL8367_EXTIF_MODE_RGMII, - .txdelay = 1, - .rxdelay = 0, - .ability = { - .force_mode = 1, - .txpause = 1, - .rxpause = 1, - .link = 1, - .duplex = 1, - .speed = RTL8367_PORT_SPEED_1000, - }, -}; - -static struct rtl8367_platform_data tl_wr2543n_rtl8367_data = { - .gpio_sda = TL_WR2543N_GPIO_RTL8367_SDA, - .gpio_sck = TL_WR2543N_GPIO_RTL8367_SCK, - .extif0_cfg = &tl_wr2543n_rtl8367_extif0_cfg, -}; - -static struct platform_device tl_wr2543n_rtl8367_device = { - .name = RTL8367_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tl_wr2543n_rtl8367_data, - } -}; - -static void __init tl_wr2543n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_wr2543n_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr2543n_leds_gpio), - tl_wr2543n_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_WR2543N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr2543n_gpio_keys), - tl_wr2543n_gpio_keys); - ath79_register_usb(); - - /* - * The ath9k driver uses this pin for its default led device, which is - * named ath9k-phy0, and reflects activity on either the 2 GHz or 5 GHz - * bands. This pin is connected to the WR2543's 2GHz WLAN LED. - */ - ap9x_pci_setup_wmac_led_pin(0, TL_WR2543N_GPIO_WMAC_LED_WLAN2G); - - /* - * We also have the driver set up an led device for the WR2543's - * separate 5 GHz WLAN LED in case the user wants it. - */ - ap9x_pci_setup_wmac_leds(0, tl_wr2543n_wmac_leds_gpio, - ARRAY_SIZE(tl_wr2543n_wmac_leds_gpio)); - ap91_pci_init(eeprom, mac); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); - ath79_eth0_data.mii_bus_dev = &tl_wr2543n_rtl8367_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x1a000000; - - ath79_register_eth(0); - - platform_device_register(&tl_wr2543n_rtl8367_device); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR2543N, "TL-WR2543N", "TP-LINK TL-WR2543N/ND", - tl_wr2543n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c deleted file mode 100644 index 1d8d01c..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c +++ /dev/null @@ -1,118 +0,0 @@ -/* - * TP-LINK TL-WR703N/TL-MR10U board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR703N_GPIO_LED_SYSTEM 27 -#define TL_WR703N_GPIO_BTN_RESET 11 - -#define TL_WR703N_GPIO_USB_POWER 8 - -#define TL_MR10U_GPIO_USB_POWER 18 - -#define TL_WR703N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR703N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR703N_KEYS_POLL_INTERVAL) - -static const char *tl_wr703n_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr703n_flash_data = { - .part_probes = tl_wr703n_part_probes, -}; - -static struct gpio_led tl_wr703n_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:system", - .gpio = TL_WR703N_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr703n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR703N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR703N_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init common_setup(unsigned usb_power_gpio, bool sec_ethernet) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_m25p80(&tl_wr703n_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), - tl_wr703n_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr703n_gpio_keys), - tl_wr703n_gpio_keys); - - gpio_request_one(usb_power_gpio, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - - if (sec_ethernet) - { - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - ath79_register_eth(1); - } - - ath79_register_wmac(ee, mac); -} - -static void __init tl_mr10u_setup(void) -{ - common_setup(TL_MR10U_GPIO_USB_POWER, false); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR10U, "TL-MR10U", "TP-LINK TL-MR10U", - tl_mr10u_setup); - -static void __init tl_wr703n_setup(void) -{ - common_setup(TL_WR703N_GPIO_USB_POWER, false); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR703N, "TL-WR703N", "TP-LINK TL-WR703N v1", - tl_wr703n_setup); - -static void __init tl_wr710n_setup(void) -{ - common_setup(TL_WR703N_GPIO_USB_POWER, true); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR710N, "TL-WR710N", "TP-LINK TL-WR710N v1", - tl_wr710n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr720n-v3.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr720n-v3.c deleted file mode 100644 index 80e8df6..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr720n-v3.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * TP-LINK TL-WR720N board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2013 yousong <yszhou4tech@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR720N_GPIO_LED_SYSTEM 27 -#define TL_WR720N_GPIO_BTN_RESET 11 -#define TL_WR720N_GPIO_BTN_SW1 18 -#define TL_WR720N_GPIO_BTN_SW2 20 - -#define TL_WR720N_GPIO_USB_POWER 8 - -#define TL_WR720N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR720N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR720N_KEYS_POLL_INTERVAL) - -static const char *tl_wr720n_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr720n_flash_data = { - .part_probes = tl_wr720n_part_probes, -}; - -static struct gpio_led tl_wr720n_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:system", - .gpio = TL_WR720N_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr720n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR720N_GPIO_BTN_RESET, - .active_low = 0, - }, { - .desc = "sw1", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR720N_GPIO_BTN_SW1, - .active_low = 0, - }, { - .desc = "sw2", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_WR720N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR720N_GPIO_BTN_SW2, - .active_low = 0, - } -}; - -static void __init tl_wr720n_v3_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* disable PHY_SWAP and PHY_ADDR_SWAP bits */ - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_m25p80(&tl_wr720n_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr720n_leds_gpio), - tl_wr720n_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_WR720N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr720n_gpio_keys), - tl_wr720n_gpio_keys); - - gpio_request_one(TL_WR720N_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR720N_V3, "TL-WR720N-v3", "TP-LINK TL-WR720N v3", - tl_wr720n_v3_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd-v4.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd-v4.c deleted file mode 100644 index 851b762..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd-v4.c +++ /dev/null @@ -1,187 +0,0 @@ -/* - * TP-LINK TL-WR741ND v4/TL-MR3220 v2 board support - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR741NDV4_GPIO_BTN_RESET 11 -#define TL_WR741NDV4_GPIO_BTN_WPS 26 - -#define TL_WR741NDV4_GPIO_LED_WLAN 0 -#define TL_WR741NDV4_GPIO_LED_QSS 1 -#define TL_WR741NDV4_GPIO_LED_WAN 13 -#define TL_WR741NDV4_GPIO_LED_LAN1 14 -#define TL_WR741NDV4_GPIO_LED_LAN2 15 -#define TL_WR741NDV4_GPIO_LED_LAN3 16 -#define TL_WR741NDV4_GPIO_LED_LAN4 17 -#define TL_WR741NDV4_GPIO_LED_SYSTEM 27 - -#define TL_MR3220V2_GPIO_BTN_WPS 11 -#define TL_MR3220V2_GPIO_BTN_WIFI 24 - -#define TL_MR3220V2_GPIO_LED_3G 26 -#define TL_MR3220V2_GPIO_USB_POWER 8 - -#define TL_WR741NDV4_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741NDV4_KEYS_POLL_INTERVAL) - -static const char *tl_wr741ndv4_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr741ndv4_flash_data = { - .part_probes = tl_wr741ndv4_part_probes, -}; - -static struct gpio_led tl_wr741ndv4_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR741NDV4_GPIO_LED_LAN1, - .active_low = 0, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR741NDV4_GPIO_LED_LAN2, - .active_low = 0, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR741NDV4_GPIO_LED_LAN3, - .active_low = 0, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR741NDV4_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR741NDV4_GPIO_LED_QSS, - .active_low = 0, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR741NDV4_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR741NDV4_GPIO_LED_WAN, - .active_low = 0, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR741NDV4_GPIO_LED_WLAN, - .active_low = 0, - }, { - /* the 3G LED is only present on the MR3220 v2 */ - .name = "tp-link:green:3g", - .gpio = TL_MR3220V2_GPIO_LED_3G, - .active_low = 0, - }, -}; - -static struct gpio_keys_button tl_wr741ndv4_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741NDV4_GPIO_BTN_RESET, - .active_low = 0, - }, { - .desc = "WPS", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741NDV4_GPIO_BTN_WPS, - .active_low = 0, - } -}; - -static struct gpio_keys_button tl_mr3220v2_gpio_keys[] __initdata = { - { - .desc = "WPS", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3220V2_GPIO_BTN_WPS, - .active_low = 0, - }, { - .desc = "WIFI button", - .type = EV_KEY, - .code = KEY_RFKILL, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3220V2_GPIO_BTN_WIFI, - .active_low = 0, - } -}; - -static void __init tl_ap121_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_setup_ar933x_phy4_switch(true, true); - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_m25p80(&tl_wr741ndv4_flash_data); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -static void __init tl_wr741ndv4_setup(void) -{ - tl_ap121_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio) - 1, - tl_wr741ndv4_leds_gpio); - ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr741ndv4_gpio_keys), - tl_wr741ndv4_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR741ND_V4, "TL-WR741ND-v4", - "TP-LINK TL-WR741ND v4", tl_wr741ndv4_setup); - -static void __init tl_mr3220v2_setup(void) -{ - tl_ap121_setup(); - - gpio_request_one(TL_MR3220V2_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio), - tl_wr741ndv4_leds_gpio); - ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3220v2_gpio_keys), - tl_mr3220v2_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3220_V2, "TL-MR3220-v2", - "TP-LINK TL-MR3220 v2", tl_mr3220v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd.c deleted file mode 100644 index 5931654..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * TP-LINK TL-WR741ND board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define TL_WR741ND_GPIO_LED_QSS 0 -#define TL_WR741ND_GPIO_LED_SYSTEM 1 -#define TL_WR741ND_GPIO_LED_LAN1 13 -#define TL_WR741ND_GPIO_LED_LAN2 14 -#define TL_WR741ND_GPIO_LED_LAN3 15 -#define TL_WR741ND_GPIO_LED_LAN4 16 -#define TL_WR741ND_GPIO_LED_WAN 17 - -#define TL_WR741ND_GPIO_BTN_RESET 11 -#define TL_WR741ND_GPIO_BTN_QSS 12 - -#define TL_WR741ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR741ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr741nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr741nd_flash_data = { - .part_probes = tl_wr741nd_part_probes, -}; - -static struct gpio_led tl_wr741nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR741ND_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR741ND_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR741ND_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR741ND_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR741ND_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR741ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR741ND_GPIO_LED_WAN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr741nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wr741nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_wr741nd_flash_data); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741nd_leds_gpio), - tl_wr741nd_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WR741ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr741nd_gpio_keys), - tl_wr741nd_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); - - ap9x_pci_setup_wmac_led_pin(0, 1); - ap91_pci_init(ee, mac); -} -MIPS_MACHINE(ATH79_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND", - tl_wr741nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v8.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v8.c deleted file mode 100644 index 0099b15..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v8.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * TP-LINK TL-WR841N/ND v8/TL-MR3420 v2 board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR841NV8_GPIO_LED_WLAN 13 -#define TL_WR841NV8_GPIO_LED_QSS 15 -#define TL_WR841NV8_GPIO_LED_WAN 18 -#define TL_WR841NV8_GPIO_LED_LAN1 19 -#define TL_WR841NV8_GPIO_LED_LAN2 20 -#define TL_WR841NV8_GPIO_LED_LAN3 21 -#define TL_WR841NV8_GPIO_LED_LAN4 12 -#define TL_WR841NV8_GPIO_LED_SYSTEM 14 - -#define TL_WR841NV8_GPIO_BTN_RESET 17 -#define TL_WR841NV8_GPIO_SW_RFKILL 16 /* WPS for MR3420 v2 */ - -#define TL_MR3420V2_GPIO_LED_3G 11 -#define TL_MR3420V2_GPIO_USB_POWER 4 - -#define TL_WR841NV8_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV8_KEYS_POLL_INTERVAL) - -static const char *tl_wr841n_v8_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr841n_v8_flash_data = { - .part_probes = tl_wr841n_v8_part_probes, -}; - -static struct gpio_led tl_wr841n_v8_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR841NV8_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR841NV8_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR841NV8_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR841NV8_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR841NV8_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR841NV8_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR841NV8_GPIO_LED_WAN, - .active_low = 1, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR841NV8_GPIO_LED_WLAN, - .active_low = 1, - }, { - /* the 3G LED is only present on the MR3420 v2 */ - .name = "tp-link:green:3g", - .gpio = TL_MR3420V2_GPIO_LED_3G, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr841n_v8_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841NV8_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "RFKILL switch", - .type = EV_SW, - .code = KEY_RFKILL, - .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841NV8_GPIO_SW_RFKILL, - .active_low = 0, - } -}; - -static struct gpio_keys_button tl_mr3420v2_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841NV8_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "WPS", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR841NV8_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841NV8_GPIO_SW_RFKILL, - .active_low = 0, - } -}; - -static void __init tl_ap123_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - /* Disable JTAG, enabling GPIOs 0-3 */ - /* Configure OBS4 line, for GPIO 4*/ - ath79_gpio_function_setup(AR934X_GPIO_FUNC_JTAG_DISABLE, - AR934X_GPIO_FUNC_CLK_OBS4_EN); - - /* config gpio4 as normal gpio function */ - ath79_gpio_output_select(TL_MR3420V2_GPIO_USB_POWER, - AR934X_GPIO_OUT_GPIO); - - ath79_register_m25p80(&tl_wr841n_v8_flash_data); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); - - ath79_register_mdio(1, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - - /* GMAC0 is connected to the PHY0 of the internal switch */ - ath79_switch_data.phy4_mii_en = 1; - ath79_switch_data.phy_poll_mask = BIT(0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; - ath79_register_eth(0); - - /* GMAC1 is connected to the internal switch */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; - ath79_register_eth(1); - - ath79_register_wmac(ee, mac); -} - -static void __init tl_wr841n_v8_setup(void) -{ - tl_ap123_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio) - 1, - tl_wr841n_v8_leds_gpio); - - ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr841n_v8_gpio_keys), - tl_wr841n_v8_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR841N_V8, "TL-WR841N-v8", "TP-LINK TL-WR841N/ND v8", - tl_wr841n_v8_setup); - - -static void __init tl_wr842n_v2_setup(void) -{ - tl_ap123_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio), - tl_wr841n_v8_leds_gpio); - - ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr841n_v8_gpio_keys), - tl_wr841n_v8_gpio_keys); - - gpio_request_one(TL_MR3420V2_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR842N_V2, "TL-WR842N-v2", "TP-LINK TL-WR842N/ND v2", - tl_wr842n_v2_setup); - -static void __init tl_mr3420v2_setup(void) -{ - tl_ap123_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v8_leds_gpio), - tl_wr841n_v8_leds_gpio); - - ath79_register_gpio_keys_polled(1, TL_WR841NV8_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3420v2_gpio_keys), - tl_mr3420v2_gpio_keys); - - /* enable power for the USB port */ - gpio_request_one(TL_MR3420V2_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3420_V2, "TL-MR3420-v2", "TP-LINK TL-MR3420 v2", - tl_mr3420v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c deleted file mode 100644 index c28afc6..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n-v9.c +++ /dev/null @@ -1,138 +0,0 @@ -/* - * TP-LINK TL-WR841N/ND v9 - * - * Copyright (C) 2014 Matthias Schiffer <mschiffer@universe-factory.net> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR841NV9_GPIO_LED_WLAN 13 -#define TL_WR841NV9_GPIO_LED_QSS 3 -#define TL_WR841NV9_GPIO_LED_WAN 4 -#define TL_WR841NV9_GPIO_LED_LAN1 16 -#define TL_WR841NV9_GPIO_LED_LAN2 15 -#define TL_WR841NV9_GPIO_LED_LAN3 14 -#define TL_WR841NV9_GPIO_LED_LAN4 11 - -#define TL_WR841NV9_GPIO_BTN_RESET 12 -#define TL_WR841NV9_GPIO_BTN_WIFI 17 - -#define TL_WR841NV9_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR841NV9_KEYS_POLL_INTERVAL) - -static const char *tl_wr841n_v9_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr841n_v9_flash_data = { - .part_probes = tl_wr841n_v9_part_probes, -}; - -static struct gpio_led tl_wr841n_v9_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR841NV9_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR841NV9_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR841NV9_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR841NV9_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR841NV9_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR841NV9_GPIO_LED_WAN, - .active_low = 1, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR841NV9_GPIO_LED_WLAN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr841n_v9_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841NV9_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "WIFI button", - .type = EV_KEY, - .code = KEY_RFKILL, - .debounce_interval = TL_WR841NV9_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841NV9_GPIO_BTN_WIFI, - .active_low = 1, - } -}; - - -static void __init tl_ap143_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 tmpmac[ETH_ALEN]; - - ath79_register_m25p80(&tl_wr841n_v9_flash_data); - - ath79_setup_ar933x_phy4_switch(false, false); - - ath79_register_mdio(0, 0x0); - - /* LAN */ - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - ath79_register_eth(1); - - /* WAN */ - ath79_switch_data.phy4_mii_en = 1; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_register_eth(0); - - ath79_init_mac(tmpmac, mac, 0); - ath79_register_wmac(ee, tmpmac); -} - -static void __init tl_wr841n_v9_setup(void) -{ - tl_ap143_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v9_leds_gpio), - tl_wr841n_v9_leds_gpio); - - ath79_register_gpio_keys_polled(1, TL_WR841NV9_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr841n_v9_gpio_keys), - tl_wr841n_v9_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR841N_V9, "TL-WR841N-v9", "TP-LINK TL-WR841N/ND v9", - tl_wr841n_v9_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n.c deleted file mode 100644 index 11f853f..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * TP-LINK TL-WR841N/ND v1 board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-dsa.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" -#include "pci.h" - -#define TL_WR841ND_V1_GPIO_LED_SYSTEM 2 -#define TL_WR841ND_V1_GPIO_LED_QSS_GREEN 4 -#define TL_WR841ND_V1_GPIO_LED_QSS_RED 5 - -#define TL_WR841ND_V1_GPIO_BTN_RESET 3 -#define TL_WR841ND_V1_GPIO_BTN_QSS 7 - -#define TL_WR841ND_V1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \ - (3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL) - -static struct mtd_partition tl_wr841n_v1_partitions[] = { - { - .name = "redboot", - .offset = 0, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x020000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x160000, - .size = 0x280000, - }, { - .name = "config", - .offset = 0x3e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x020000, - .size = 0x3c0000, - } -}; - -static struct flash_platform_data tl_wr841n_v1_flash_data = { - .parts = tl_wr841n_v1_partitions, - .nr_parts = ARRAY_SIZE(tl_wr841n_v1_partitions), -}; - -static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WR841ND_V1_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:red:qss", - .gpio = TL_WR841ND_V1_GPIO_LED_QSS_RED, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR841ND_V1_GPIO_LED_QSS_GREEN, - } -}; - -static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841ND_V1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841ND_V1_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct dsa_chip_data tl_wr841n_v1_dsa_chip = { - .port_names[0] = "wan", - .port_names[1] = "lan1", - .port_names[2] = "lan2", - .port_names[3] = "lan3", - .port_names[4] = "lan4", - .port_names[5] = "cpu", -}; - -static struct dsa_platform_data tl_wr841n_v1_dsa_data = { - .nr_chips = 1, - .chip = &tl_wr841n_v1_dsa_chip, -}; - -static void __init tl_wr841n_v1_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, - &tl_wr841n_v1_dsa_data); - - ath79_register_m25p80(&tl_wr841n_v1_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio), - tl_wr841n_v1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr841n_v1_gpio_keys), - tl_wr841n_v1_gpio_keys); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1", - tl_wr841n_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr941nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr941nd.c deleted file mode 100644 index 1ddeec7..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr941nd.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * TP-LINK TL-WR941ND board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-dsa.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR941ND_GPIO_LED_SYSTEM 2 -#define TL_WR941ND_GPIO_LED_QSS_RED 4 -#define TL_WR941ND_GPIO_LED_QSS_GREEN 5 -#define TL_WR941ND_GPIO_LED_WLAN 9 - -#define TL_WR941ND_GPIO_BTN_RESET 3 -#define TL_WR941ND_GPIO_BTN_QSS 7 - -#define TL_WR941ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR941ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr941nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr941nd_flash_data = { - .part_probes = tl_wr941nd_part_probes, -}; - -static struct gpio_led tl_wr941nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WR941ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:red:qss", - .gpio = TL_WR941ND_GPIO_LED_QSS_RED, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR941ND_GPIO_LED_QSS_GREEN, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR941ND_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr941nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR941ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR941ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct dsa_chip_data tl_wr941nd_dsa_chip = { - .port_names[0] = "wan", - .port_names[1] = "lan1", - .port_names[2] = "lan2", - .port_names[3] = "lan3", - .port_names[4] = "lan4", - .port_names[5] = "cpu", -}; - -static struct dsa_platform_data tl_wr941nd_dsa_data = { - .nr_chips = 1, - .chip = &tl_wr941nd_dsa_chip, -}; - -static void __init tl_wr941nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, - &tl_wr941nd_dsa_data); - - ath79_register_m25p80(&tl_wr941nd_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio), - tl_wr941nd_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr941nd_gpio_keys), - tl_wr941nd_gpio_keys); - ath79_register_wmac(eeprom, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR941ND, "TL-WR941ND", "TP-LINK TL-WR941ND", - tl_wr941nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tube2h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tube2h.c deleted file mode 100644 index b8addad..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tube2h.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - * ALFA NETWORK Tube2H board support - * - * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TUBE2H_GPIO_LED_SIGNAL4 0 -#define TUBE2H_GPIO_LED_SIGNAL3 1 -#define TUBE2H_GPIO_LED_SIGNAL2 13 -#define TUBE2H_GPIO_LED_LAN 17 -#define TUBE2H_GPIO_LED_SIGNAL1 27 - -#define TUBE2H_GPIO_BTN_RESET 12 - -#define TUBE2H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TUBE2H_KEYS_DEBOUNCE_INTERVAL (3 * TUBE2H_KEYS_POLL_INTERVAL) - -#define TUBE2H_ART_ADDRESS 0x1f7f0000 -#define TUBE2H_LAN_MAC_OFFSET 0x06 -#define TUBE2H_CALDATA_OFFSET 0x1000 - -static struct gpio_led tube2h_leds_gpio[] __initdata = { - { - .name = "alfa:blue:lan", - .gpio = TUBE2H_GPIO_LED_LAN, - .active_low = 1, - }, - { - .name = "alfa:red:signal1", - .gpio = TUBE2H_GPIO_LED_SIGNAL1, - .active_low = 1, - }, - { - .name = "alfa:orange:signal2", - .gpio = TUBE2H_GPIO_LED_SIGNAL2, - .active_low = 0, - }, - { - .name = "alfa:green:signal3", - .gpio = TUBE2H_GPIO_LED_SIGNAL3, - .active_low = 0, - }, - { - .name = "alfa:green:signal4", - .gpio = TUBE2H_GPIO_LED_SIGNAL4, - .active_low = 0, - }, -}; - -static struct gpio_keys_button tube2h_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TUBE2H_KEYS_DEBOUNCE_INTERVAL, - .gpio = TUBE2H_GPIO_BTN_RESET, - .active_low = 1, - }, -}; - -static void __init tube2h_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(TUBE2H_ART_ADDRESS); - u32 t; - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_JTAG_DISABLE | - AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - /* Ensure that GPIO26 and GPIO27 are controllable by software */ - t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; - ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); - - ath79_register_wmac(art + TUBE2H_CALDATA_OFFSET, NULL); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tube2h_leds_gpio), - tube2h_leds_gpio); - ath79_register_gpio_keys_polled(-1, TUBE2H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tube2h_gpio_keys), - tube2h_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, - art + TUBE2H_LAN_MAC_OFFSET, 0); - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); -} - -MIPS_MACHINE(ATH79_MACH_TUBE2H, "TUBE2H", "ALFA NETWORK Tube2H", - tube2h_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt.c deleted file mode 100644 index e49ac23..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Ubiquiti RouterStation support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * Copyright (C) 2008 Ubiquiti <support@ubnt.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define UBNT_RS_GPIO_LED_RF 2 -#define UBNT_RS_GPIO_SW4 8 - -#define UBNT_LS_SR71_GPIO_LED_D25 0 -#define UBNT_LS_SR71_GPIO_LED_D26 1 -#define UBNT_LS_SR71_GPIO_LED_D24 2 -#define UBNT_LS_SR71_GPIO_LED_D23 4 -#define UBNT_LS_SR71_GPIO_LED_D22 5 -#define UBNT_LS_SR71_GPIO_LED_D27 6 -#define UBNT_LS_SR71_GPIO_LED_D28 7 - -#define UBNT_KEYS_POLL_INTERVAL 20 /* msecs */ -#define UBNT_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_KEYS_POLL_INTERVAL) - -static struct gpio_led ubnt_rs_leds_gpio[] __initdata = { - { - .name = "ubnt:green:rf", - .gpio = UBNT_RS_GPIO_LED_RF, - .active_low = 0, - } -}; - -static struct gpio_led ubnt_ls_sr71_leds_gpio[] __initdata = { - { - .name = "ubnt:green:d22", - .gpio = UBNT_LS_SR71_GPIO_LED_D22, - .active_low = 0, - }, { - .name = "ubnt:green:d23", - .gpio = UBNT_LS_SR71_GPIO_LED_D23, - .active_low = 0, - }, { - .name = "ubnt:green:d24", - .gpio = UBNT_LS_SR71_GPIO_LED_D24, - .active_low = 0, - }, { - .name = "ubnt:red:d25", - .gpio = UBNT_LS_SR71_GPIO_LED_D25, - .active_low = 0, - }, { - .name = "ubnt:red:d26", - .gpio = UBNT_LS_SR71_GPIO_LED_D26, - .active_low = 0, - }, { - .name = "ubnt:green:d27", - .gpio = UBNT_LS_SR71_GPIO_LED_D27, - .active_low = 0, - }, { - .name = "ubnt:green:d28", - .gpio = UBNT_LS_SR71_GPIO_LED_D28, - .active_low = 0, - } -}; - -static struct gpio_keys_button ubnt_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL, - .gpio = UBNT_RS_GPIO_SW4, - .active_low = 1, - } -}; - -static const char *ubnt_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data ubnt_flash_data = { - .part_probes = ubnt_part_probes, -}; - -static void __init ubnt_generic_setup(void) -{ - ath79_register_m25p80(&ubnt_flash_data); - - ath79_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ubnt_gpio_keys), - ubnt_gpio_keys); - ath79_register_pci(); -} - -#define UBNT_RS_WAN_PHYMASK BIT(20) -#define UBNT_RS_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) - -static void __init ubnt_rs_setup(void) -{ - ubnt_generic_setup(); - - ath79_register_mdio(0, ~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK)); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK; - - /* - * There is Secondary MAC address duplicate problem with some - * UBNT HW batches. Do not increase Secondary MAC address by 1 - * but do workaround with 'Locally Administrated' bit. - */ - ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.speed = SPEED_100; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), - ubnt_rs_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_RS, "UBNT-RS", "Ubiquiti RouterStation", - ubnt_rs_setup); - -#define UBNT_RSPRO_WAN_PHYMASK BIT(4) -#define UBNT_RSPRO_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) - -static void __init ubnt_rspro_setup(void) -{ - ubnt_generic_setup(); - - ath79_register_mdio(0, ~(UBNT_RSPRO_WAN_PHYMASK | - UBNT_RSPRO_LAN_PHYMASK)); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK; - - /* - * There is Secondary MAC address duplicate problem with some - * UBNT HW batches. Do not increase Secondary MAC address by 1 - * but do workaround with 'Locally Administrated' bit. - */ - ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), - ubnt_rs_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_RSPRO, "UBNT-RSPRO", "Ubiquiti RouterStation Pro", - ubnt_rspro_setup); - -static void __init ubnt_lsx_setup(void) -{ - ubnt_generic_setup(); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_LSX, "UBNT-LSX", "Ubiquiti LSX", ubnt_lsx_setup); - -#define UBNT_LSSR71_PHY_MASK BIT(1) - -static void __init ubnt_lssr71_setup(void) -{ - ubnt_generic_setup(); - - ath79_register_mdio(0, ~UBNT_LSSR71_PHY_MASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK; - - ath79_register_eth(0); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_ls_sr71_leds_gpio), - ubnt_ls_sr71_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_LSSR71, "UBNT-LS-SR71", "Ubiquiti LS-SR71", - ubnt_lssr71_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-whr-hp-g300n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-whr-hp-g300n.c deleted file mode 100644 index 48f49ad..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-whr-hp-g300n.c +++ /dev/null @@ -1,155 +0,0 @@ -/* - * Buffalo WHR-HP-G300N board support - * - * based on ... - * - * TP-LINK TL-WR741ND board support - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define WHRHPG300N_GPIO_LED_SECURITY 0 -#define WHRHPG300N_GPIO_LED_DIAG 1 -#define WHRHPG300N_GPIO_LED_ROUTER 6 - -#define WHRHPG300N_GPIO_BTN_ROUTER_ON 7 -#define WHRHPG300N_GPIO_BTN_ROUTER_AUTO 8 -#define WHRHPG300N_GPIO_BTN_RESET 11 -#define WHRHPG300N_GPIO_BTN_AOSS 12 -#define WHRHPG300N_GPIO_LED_LAN1 13 -#define WHRHPG300N_GPIO_LED_LAN2 14 -#define WHRHPG300N_GPIO_LED_LAN3 15 -#define WHRHPG300N_GPIO_LED_LAN4 16 -#define WHRHPG300N_GPIO_LED_WAN 17 - -#define WHRHPG300N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WHRHPG300N_KEYS_DEBOUNCE_INTERVAL (3 * WHRHPG300N_KEYS_POLL_INTERVAL) - -#define WHRHPG300N_MAC_OFFSET 0x20c - -static struct gpio_led whrhpg300n_leds_gpio[] __initdata = { - { - .name = "buffalo:orange:security", - .gpio = WHRHPG300N_GPIO_LED_SECURITY, - .active_low = 1, - }, { - .name = "buffalo:red:diag", - .gpio = WHRHPG300N_GPIO_LED_DIAG, - .active_low = 1, - }, { - .name = "buffalo:green:router", - .gpio = WHRHPG300N_GPIO_LED_ROUTER, - .active_low = 1, - }, { - .name = "buffalo:green:wan", - .gpio = WHRHPG300N_GPIO_LED_WAN, - .active_low = 1, - }, { - .name = "buffalo:green:lan1", - .gpio = WHRHPG300N_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "buffalo:green:lan2", - .gpio = WHRHPG300N_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "buffalo:green:lan3", - .gpio = WHRHPG300N_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "buffalo:green:lan4", - .gpio = WHRHPG300N_GPIO_LED_LAN4, - .active_low = 1, - } -}; - -static struct gpio_keys_button whrhpg300n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .gpio = WHRHPG300N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "aoss/wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .gpio = WHRHPG300N_GPIO_BTN_AOSS, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_2, - .gpio = WHRHPG300N_GPIO_BTN_ROUTER_ON, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_3, - .gpio = WHRHPG300N_GPIO_BTN_ROUTER_AUTO, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - } -}; - -static void __init whrhpg300n_setup(void) -{ - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET); - - ath79_register_m25p80(NULL); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio), - whrhpg300n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(whrhpg300n_gpio_keys), - whrhpg300n_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - /* WAN port */ - ath79_register_eth(0); - - ap9x_pci_setup_wmac_led_pin(0, 1); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_WHR_HP_G300N, "WHR-HP-G300N", "Buffalo WHR-HP-G300N", - whrhpg300n_setup); - -MIPS_MACHINE(ATH79_MACH_WHR_G301N, "WHR-G301N", "Buffalo WHR-G301N", - whrhpg300n_setup); - -MIPS_MACHINE(ATH79_MACH_WHR_HP_GN, "WHR-HP-GN", "Buffalo WHR-HP-GN", - whrhpg300n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlae-ag300n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlae-ag300n.c deleted file mode 100644 index 11006fd..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlae-ag300n.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Buffalo WLAE-AG300N board support - */ - -#include <linux/gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WLAEAG300N_MAC_OFFSET 0x20c -#define WLAEAG300N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WLAEAG300N_KEYS_DEBOUNCE_INTERVAL (3 * WLAEAG300N_KEYS_POLL_INTERVAL) - - -static struct gpio_led wlaeag300n_leds_gpio[] __initdata = { - /* - * Note: Writing 1 into GPIO 13 will power down the device. - */ - { - .name = "buffalo:green:wireless", - .gpio = 14, - .active_low = 1, - }, { - .name = "buffalo:red:wireless", - .gpio = 15, - .active_low = 1, - }, { - .name = "buffalo:green:status", - .gpio = 16, - .active_low = 1, - }, { - .name = "buffalo:red:status", - .gpio = 17, - .active_low = 1, - } -}; - - -static struct gpio_keys_button wlaeag300n_gpio_keys[] __initdata = { - { - .desc = "function", - .type = EV_KEY, - .code = KEY_MODE, - .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, - .gpio = 0, - .active_low = 1, - }, { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, - .gpio = 1, - .active_low = 1, - }, { - .desc = "power", - .type = EV_KEY, - .code = KEY_POWER, - .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, - .gpio = 11, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WLAEAG300N_KEYS_DEBOUNCE_INTERVAL, - .gpio = 12, - .active_low = 1, - } -}; - -static void __init wlaeag300n_setup(void) -{ - u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1fff1000); - u8 *mac1 = eeprom1 + WLAEAG300N_MAC_OFFSET; - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 1); - - ath79_register_mdio(0, ~(BIT(0) | BIT(4))); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = BIT(4); - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wlaeag300n_leds_gpio), - wlaeag300n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WLAEAG300N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wlaeag300n_gpio_keys), - wlaeag300n_gpio_keys); - - ath79_register_m25p80(NULL); - - ap91_pci_init(eeprom1, mac1); -} - -MIPS_MACHINE(ATH79_MACH_WLAE_AG300N, "WLAE-AG300N", - "Buffalo WLAE-AG300N", wlaeag300n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c deleted file mode 100644 index 88022e7..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Sitecom X8 AC1750 WLR-8100 board support - * - * Based on the Qualcomm Atheros AP135/AP136 reference board support code - * Copyright (c) 2012 Qualcomm Atheros - * Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org> - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR - * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN - * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF - * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - * - */ - -#include <linux/platform_device.h> -#include <linux/ar8216_platform.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "pci.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-eth.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define WLR8100_GPIO_LED_USB 4 -#define WLR8100_GPIO_LED_WLAN_5G 12 -#define WLR8100_GPIO_LED_WLAN_2G 13 -#define WLR8100_GPIO_LED_STATUS_RED 14 -#define WLR8100_GPIO_LED_WPS_RED 15 -#define WLR8100_GPIO_LED_STATUS_AMBER 19 -#define WLR8100_GPIO_LED_WPS_GREEN 20 - -#define WLR8100_GPIO_BTN_WPS 16 -#define WLR8100_GPIO_BTN_RFKILL 21 - -#define WLR8100_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WLR8100_KEYS_DEBOUNCE_INTERVAL (3 * WLR8100_KEYS_POLL_INTERVAL) - -#define WLR8100_MAC0_OFFSET 0 -#define WLR8100_MAC1_OFFSET 6 -#define WLR8100_WMAC_CALDATA_OFFSET 0x1000 -#define WLR8100_PCIE_CALDATA_OFFSET 0x5000 - -static struct gpio_led wlr8100_leds_gpio[] __initdata = { - { - .name = "wlr8100:amber:status", - .gpio = WLR8100_GPIO_LED_STATUS_AMBER, - .active_low = 1, - }, - { - .name = "wlr8100:red:status", - .gpio = WLR8100_GPIO_LED_STATUS_RED, - .active_low = 1, - }, - { - .name = "wlr8100:green:wps", - .gpio = WLR8100_GPIO_LED_WPS_GREEN, - .active_low = 1, - }, - { - .name = "wlr8100:red:wps", - .gpio = WLR8100_GPIO_LED_WPS_RED, - .active_low = 1, - }, - { - .name = "wlr8100:red:wlan-2g", - .gpio = WLR8100_GPIO_LED_WLAN_2G, - .active_low = 1, - }, - { - .name = "wlr8100:red:usb", - .gpio = WLR8100_GPIO_LED_USB, - .active_low = 1, - } -}; - -static struct gpio_keys_button wlr8100_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL, - .gpio = WLR8100_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "RFKILL button", - .type = EV_KEY, - .code = KEY_RFKILL, - .debounce_interval = WLR8100_KEYS_DEBOUNCE_INTERVAL, - .gpio = WLR8100_GPIO_BTN_RFKILL, - .active_low = 1, - }, -}; - -static struct ar8327_pad_cfg wlr8100_ar8327_pad0_cfg; -static struct ar8327_pad_cfg wlr8100_ar8327_pad6_cfg; - -static struct ar8327_platform_data wlr8100_ar8327_data = { - .pad0_cfg = &wlr8100_ar8327_pad0_cfg, - .pad6_cfg = &wlr8100_ar8327_pad6_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .port6_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, -}; - -static struct mdio_board_info wlr8100_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &wlr8100_ar8327_data, - }, -}; - -static void __init wlr8100_common_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wlr8100_leds_gpio), - wlr8100_leds_gpio); - ath79_register_gpio_keys_polled(-1, WLR8100_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wlr8100_gpio_keys), - wlr8100_gpio_keys); - - ath79_register_usb(); - - ath79_register_wmac(art + WLR8100_WMAC_CALDATA_OFFSET, NULL); - - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, art + WLR8100_MAC0_OFFSET, 0); - - mdiobus_register_board_info(wlr8100_mdio0_info, - ARRAY_SIZE(wlr8100_mdio0_info)); - - /* GMAC0 is connected to the RMGII interface */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - - ath79_register_eth(0); - - /* GMAC1 is connected tot eh SGMII interface */ - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(1); -} - -static void __init wlr8100_010_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - /* GMAC0 of the AR8337 switch is connected to GMAC0 via RGMII */ - wlr8100_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_RGMII; - wlr8100_ar8327_pad0_cfg.txclk_delay_en = true; - wlr8100_ar8327_pad0_cfg.rxclk_delay_en = true; - wlr8100_ar8327_pad0_cfg.txclk_delay_sel = AR8327_CLK_DELAY_SEL1; - wlr8100_ar8327_pad0_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2; - - /* GMAC6 of the AR8337 switch is connected to GMAC1 via SGMII */ - wlr8100_ar8327_pad6_cfg.mode = AR8327_PAD_MAC_SGMII; - wlr8100_ar8327_pad6_cfg.rxclk_delay_en = true; - wlr8100_ar8327_pad6_cfg.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0; - - ath79_eth0_pll_data.pll_1000 = 0xa6000000; - ath79_eth1_pll_data.pll_1000 = 0x03000101; - - wlr8100_common_setup(); - ap91_pci_init(art + WLR8100_PCIE_CALDATA_OFFSET, NULL); -} - -MIPS_MACHINE(ATH79_MACH_WLR8100, "WLR8100", - "Sitecom WLR-8100", - wlr8100_010_setup); - diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wndap360.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wndap360.c deleted file mode 100644 index e70d88b..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wndap360.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Netgear WNDAP360 board support (proper leds / button support missing) - * - * Based on AP96 - * Copyright (C) 2013 Jacek Kikiewicz - * Copyright (C) 2009 Marco Porsch - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2010 Atheros Communications - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/delay.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define WNDAP360_GPIO_LED_POWER_ORANGE 0 -#define WNDAP360_GPIO_LED_POWER_GREEN 2 - -/* Reset button - next to the power connector */ -#define WNDAP360_GPIO_BTN_RESET 8 - -#define WNDAP360_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNDAP360_KEYS_DEBOUNCE_INTERVAL (3 * WNDAP360_KEYS_POLL_INTERVAL) - -#define WNDAP360_WMAC0_MAC_OFFSET 0x120c -#define WNDAP360_WMAC1_MAC_OFFSET 0x520c -#define WNDAP360_CALDATA0_OFFSET 0x1000 -#define WNDAP360_CALDATA1_OFFSET 0x5000 - -/* - * WNDAP360 this still uses leds definitions from AP96 - * - */ -static struct gpio_led wndap360_leds_gpio[] __initdata = { - { - .name = "netgear:green:power", - .gpio = WNDAP360_GPIO_LED_POWER_GREEN, - .active_low = 1, - }, { - .name = "netgear:orange:power", - .gpio = WNDAP360_GPIO_LED_POWER_ORANGE, - .active_low = 1, - } -}; - -static struct gpio_keys_button wndap360_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNDAP360_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDAP360_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -#define WNDAP360_LAN_PHYMASK 0x0f - -static void __init wndap360_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_mdio(0, ~(WNDAP360_LAN_PHYMASK)); - - /* Reusing wifi MAC with offset of 1 as eth0 MAC */ - ath79_init_mac(ath79_eth0_data.mac_addr, - art + WNDAP360_WMAC0_MAC_OFFSET, 1); - ath79_eth0_pll_data.pll_1000 = 0x11110000; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = WNDAP360_LAN_PHYMASK; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wndap360_leds_gpio), - wndap360_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WNDAP360_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wndap360_gpio_keys), - wndap360_gpio_keys); - - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_led_pin(1, 5); - - ap94_pci_init(art + WNDAP360_CALDATA0_OFFSET, - art + WNDAP360_WMAC0_MAC_OFFSET, - art + WNDAP360_CALDATA1_OFFSET, - art + WNDAP360_WMAC1_MAC_OFFSET); -} - -MIPS_MACHINE(ATH79_MACH_WNDAP360, "WNDAP360", "Netgear WNDAP360", wndap360_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr3700.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr3700.c deleted file mode 100644 index 1315bab..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr3700.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Netgear WNDR3700 board support - * - * Copyright (C) 2009 Marco Porsch - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/delay.h> -#include <linux/rtl8366.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WNDR3700_GPIO_LED_WPS_ORANGE 0 -#define WNDR3700_GPIO_LED_POWER_ORANGE 1 -#define WNDR3700_GPIO_LED_POWER_GREEN 2 -#define WNDR3700_GPIO_LED_WPS_GREEN 4 -#define WNDR3700_GPIO_LED_WAN_GREEN 6 - -#define WNDR3700_GPIO_BTN_WPS 3 -#define WNDR3700_GPIO_BTN_RESET 8 -#define WNDR3700_GPIO_BTN_WIFI 11 - -#define WNDR3700_GPIO_RTL8366_SDA 5 -#define WNDR3700_GPIO_RTL8366_SCK 7 - -#define WNDR3700_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNDR3700_KEYS_DEBOUNCE_INTERVAL (3 * WNDR3700_KEYS_POLL_INTERVAL) - -#define WNDR3700_ETH0_MAC_OFFSET 0 -#define WNDR3700_ETH1_MAC_OFFSET 0x6 - -#define WNDR3700_WMAC0_MAC_OFFSET 0 -#define WNDR3700_WMAC1_MAC_OFFSET 0xc -#define WNDR3700_CALDATA0_OFFSET 0x1000 -#define WNDR3700_CALDATA1_OFFSET 0x5000 - -static struct gpio_led wndr3700_leds_gpio[] __initdata = { - { - .name = "netgear:green:power", - .gpio = WNDR3700_GPIO_LED_POWER_GREEN, - .active_low = 1, - }, { - .name = "netgear:orange:power", - .gpio = WNDR3700_GPIO_LED_POWER_ORANGE, - .active_low = 1, - }, { - .name = "netgear:green:wps", - .gpio = WNDR3700_GPIO_LED_WPS_GREEN, - .active_low = 1, - }, { - .name = "netgear:orange:wps", - .gpio = WNDR3700_GPIO_LED_WPS_ORANGE, - .active_low = 1, - }, { - .name = "netgear:green:wan", - .gpio = WNDR3700_GPIO_LED_WAN_GREEN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wndr3700_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "wifi", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_WIFI, - .active_low = 1, - } -}; - -static struct rtl8366_platform_data wndr3700_rtl8366s_data = { - .gpio_sda = WNDR3700_GPIO_RTL8366_SDA, - .gpio_sck = WNDR3700_GPIO_RTL8366_SCK, -}; - -static struct platform_device wndr3700_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wndr3700_rtl8366s_data, - } -}; - -static void __init wndr3700_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - /* - * The eth0 and wmac0 interfaces share the same MAC address which - * can lead to problems if operated unbridged. Set the locally - * administered bit on the eth0 MAC to make it unique. - */ - ath79_init_local_mac(ath79_eth0_data.mac_addr, - art + WNDR3700_ETH0_MAC_OFFSET); - ath79_eth0_pll_data.pll_1000 = 0x11110000; - ath79_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, - art + WNDR3700_ETH1_MAC_OFFSET, 0); - ath79_eth1_pll_data.pll_1000 = 0x11110000; - ath79_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio), - wndr3700_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WNDR3700_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wndr3700_gpio_keys), - wndr3700_gpio_keys); - - platform_device_register(&wndr3700_rtl8366s_device); - platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0); - - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_led_pin(1, 5); - - /* 2.4 GHz uses the first fixed antenna group (1, 0, 1, 0) */ - ap9x_pci_setup_wmac_gpio(0, (0xf << 6), (0xa << 6)); - - /* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */ - ap9x_pci_setup_wmac_gpio(1, (0xf << 6), (0x6 << 6)); - - ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET, - art + WNDR3700_WMAC0_MAC_OFFSET, - art + WNDR3700_CALDATA1_OFFSET, - art + WNDR3700_WMAC1_MAC_OFFSET); -} - -MIPS_MACHINE(ATH79_MACH_WNDR3700, "WNDR3700", - "NETGEAR WNDR3700/WNDR3800/WNDRMAC", - wndr3700_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr4300.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr4300.c deleted file mode 100644 index 2884c6c..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr4300.c +++ /dev/null @@ -1,210 +0,0 @@ -/* - * NETGEAR WNDR3700v4/WNDR4300 board support - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2014 Ralph Perlich <rpsoft@arcor.de> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/phy.h> -#include <linux/gpio.h> -#include <linux/platform_device.h> -#include <linux/ath9k_platform.h> -#include <linux/ar8216_platform.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/platform/ar934x_nfc.h> - -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-nfc.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -/* AR9344 GPIOs */ -#define WNDR4300_GPIO_LED_POWER_GREEN 0 -#define WNDR4300_GPIO_LED_POWER_AMBER 2 -#define WNDR4300_GPIO_LED_USB 13 -#define WNDR4300_GPIO_LED_WAN_GREEN 1 -#define WNDR4300_GPIO_LED_WAN_AMBER 3 -#define WNDR4300_GPIO_LED_WLAN2G 11 -#define WNDR4300_GPIO_LED_WLAN5G 14 -#define WNDR4300_GPIO_LED_WPS_GREEN 16 -#define WNDR4300_GPIO_LED_WPS_AMBER 17 - -#define WNDR4300_GPIO_BTN_RESET 21 -#define WNDR4300_GPIO_BTN_WIRELESS 15 -#define WNDR4300_GPIO_BTN_WPS 12 - -/* AR9580 GPIOs */ -#define WNDR4300_GPIO_USB_5V 0 - -#define WNDR4300_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNDR4300_KEYS_DEBOUNCE_INTERVAL (3 * WNDR4300_KEYS_POLL_INTERVAL) - -static struct gpio_led wndr4300_leds_gpio[] __initdata = { - { - .name = "netgear:green:power", - .gpio = WNDR4300_GPIO_LED_POWER_GREEN, - .active_low = 1, - }, - { - .name = "netgear:amber:power", - .gpio = WNDR4300_GPIO_LED_POWER_AMBER, - .active_low = 1, - }, - { - .name = "netgear:green:wan", - .gpio = WNDR4300_GPIO_LED_WAN_GREEN, - .active_low = 1, - }, - { - .name = "netgear:amber:wan", - .gpio = WNDR4300_GPIO_LED_WAN_AMBER, - .active_low = 1, - }, - { - .name = "netgear:green:usb", - .gpio = WNDR4300_GPIO_LED_USB, - .active_low = 1, - }, - { - .name = "netgear:green:wps", - .gpio = WNDR4300_GPIO_LED_WPS_GREEN, - .active_low = 1, - }, - { - .name = "netgear:amber:wps", - .gpio = WNDR4300_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, - { - .name = "netgear:green:wlan2g", - .gpio = WNDR4300_GPIO_LED_WLAN2G, - .active_low = 1, - }, - { - .name = "netgear:blue:wlan5g", - .gpio = WNDR4300_GPIO_LED_WLAN5G, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wndr4300_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR4300_GPIO_BTN_RESET, - .active_low = 1, - }, - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR4300_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "Wireless button", - .type = EV_KEY, - .code = KEY_RFKILL, - .debounce_interval = WNDR4300_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR4300_GPIO_BTN_WIRELESS, - .active_low = 1, - }, -}; - -static struct ar8327_pad_cfg wndr4300_ar8327_pad0_cfg = { - .mode = AR8327_PAD_MAC_RGMII, - .txclk_delay_en = true, - .rxclk_delay_en = true, - .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, - .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, -}; - -static struct ar8327_led_cfg wndr4300_ar8327_led_cfg = { - .led_ctrl0 = 0xc737c737, - .led_ctrl1 = 0x00000000, - .led_ctrl2 = 0x00000000, - .led_ctrl3 = 0x0030c300, - .open_drain = false, -}; - -static struct ar8327_platform_data wndr4300_ar8327_data = { - .pad0_cfg = &wndr4300_ar8327_pad0_cfg, - .port0_cfg = { - .force_link = 1, - .speed = AR8327_PORT_SPEED_1000, - .duplex = 1, - .txpause = 1, - .rxpause = 1, - }, - .led_cfg = &wndr4300_ar8327_led_cfg, -}; - -static struct mdio_board_info wndr4300_mdio0_info[] = { - { - .bus_id = "ag71xx-mdio.0", - .phy_addr = 0, - .platform_data = &wndr4300_ar8327_data, - }, -}; - -static void __init wndr4300_setup(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(wndr4300_leds_gpio); i++) - ath79_gpio_output_select(wndr4300_leds_gpio[i].gpio, - AR934X_GPIO_OUT_GPIO); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr4300_leds_gpio), - wndr4300_leds_gpio); - ath79_register_gpio_keys_polled(-1, WNDR4300_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wndr4300_gpio_keys), - wndr4300_gpio_keys); - - ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0); - - mdiobus_register_board_info(wndr4300_mdio0_info, - ARRAY_SIZE(wndr4300_mdio0_info)); - - ath79_register_mdio(0, 0x0); - - /* GMAC0 is connected to an AR8327N switch */ - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = BIT(0); - ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; - ath79_eth0_pll_data.pll_1000 = 0x06000000; - ath79_register_eth(0); - - ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW); - ath79_register_nfc(); - ath79_register_usb(); - - ath79_register_wmac_simple(); - - /* enable power for the USB port */ - ap9x_pci_setup_wmac_gpio(0, BIT(WNDR4300_GPIO_USB_5V), - BIT(WNDR4300_GPIO_USB_5V)); - - ap91_pci_init_simple(); -} - -MIPS_MACHINE(ATH79_MACH_WNDR3700_V4, "WNDR3700_V4", "NETGEAR WNDR3700v4", - wndr4300_setup); -MIPS_MACHINE(ATH79_MACH_WNDR4300, "WNDR4300", "NETGEAR WNDR4300", - wndr4300_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000-v3.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000-v3.c deleted file mode 100644 index 6acd991..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000-v3.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * NETGEAR WNR2000v3 board support - * - * Copytight (C) 2013 Mathieu Olivari <mathieu.olivari@gmail.com> - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * Copyright (C) 2008-2009 Andy Boyett <agb@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define WNR2000V3_GPIO_LED_WAN_GREEN 0 -#define WNR2000V3_GPIO_LED_LAN1_AMBER 1 -#define WNR2000V3_GPIO_LED_LAN4_AMBER 12 -#define WNR2000V3_GPIO_LED_PWR_GREEN 14 -#define WNR2000V3_GPIO_BTN_WPS 11 - -#define WNR612V2_GPIO_LED_PWR_GREEN 11 - -#define WNR2000V3_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNR2000V3_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000V3_KEYS_POLL_INTERVAL) - -#define WNR2000V3_MAC0_OFFSET 0 -#define WNR2000V3_MAC1_OFFSET 6 -#define WNR2000V3_PCIE_CALDATA_OFFSET 0x1000 - -static struct gpio_led wnr2000v3_leds_gpio[] __initdata = { - { - .name = "wnr2000v3:green:power", - .gpio = WNR2000V3_GPIO_LED_PWR_GREEN, - .active_low = 1, - }, { - .name = "wnr2000v3:green:wan", - .gpio = WNR2000V3_GPIO_LED_WAN_GREEN, - .active_low = 1, - } -}; - -static struct gpio_led wnr612v2_leds_gpio[] __initdata = { - { - .name = "netgear:green:power", - .gpio = WNR612V2_GPIO_LED_PWR_GREEN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wnr2000v3_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNR2000V3_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNR2000V3_GPIO_BTN_WPS, - } -}; - -static void __init wnr_common_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2000V3_MAC0_OFFSET, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2000V3_MAC1_OFFSET, 0); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - ap91_pci_init(art + WNR2000V3_PCIE_CALDATA_OFFSET, NULL); -} - -static void __init wnr2000v3_setup(void) -{ - wnr_common_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000v3_leds_gpio), - wnr2000v3_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WNR2000V3_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wnr2000v3_gpio_keys), - wnr2000v3_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_WNR2000_V3, "WNR2000V3", "NETGEAR WNR2000 V3", wnr2000v3_setup); - -static void __init wnr612v2_setup(void) -{ - wnr_common_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr612v2_leds_gpio), - wnr612v2_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_WNR612_V2, "WNR612V2", "NETGEAR WNR612 V2", wnr612v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000.c deleted file mode 100644 index b4da7ec..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * NETGEAR WNR2000 board support - * - * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * Copyright (C) 2008-2009 Andy Boyett <agb@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define WNR2000_GPIO_LED_PWR_GREEN 14 -#define WNR2000_GPIO_LED_PWR_AMBER 7 -#define WNR2000_GPIO_LED_WPS 4 -#define WNR2000_GPIO_LED_WLAN 6 -#define WNR2000_GPIO_BTN_RESET 21 -#define WNR2000_GPIO_BTN_WPS 8 - -#define WNR2000_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNR2000_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000_KEYS_POLL_INTERVAL) - -static struct mtd_partition wnr2000_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x240000, - }, { - .name = "user-config", - .offset = 0x290000, - .size = 0x010000, - }, { - .name = "uImage", - .offset = 0x2a0000, - .size = 0x120000, - }, { - .name = "language_table", - .offset = 0x3c0000, - .size = 0x020000, - }, { - .name = "rootfs_checksum", - .offset = 0x3e0000, - .size = 0x010000, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data wnr2000_flash_data = { - .parts = wnr2000_partitions, - .nr_parts = ARRAY_SIZE(wnr2000_partitions), -}; - -static struct gpio_led wnr2000_leds_gpio[] __initdata = { - { - .name = "netgear:green:power", - .gpio = WNR2000_GPIO_LED_PWR_GREEN, - .active_low = 1, - }, { - .name = "netgear:amber:power", - .gpio = WNR2000_GPIO_LED_PWR_AMBER, - .active_low = 1, - }, { - .name = "netgear:green:wps", - .gpio = WNR2000_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "netgear:blue:wlan", - .gpio = WNR2000_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wnr2000_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNR2000_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNR2000_GPIO_BTN_WPS, - } -}; - -static void __init wnr2000_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&wnr2000_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio), - wnr2000_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wnr2000_gpio_keys), - wnr2000_gpio_keys); - - ath79_register_wmac(eeprom, NULL); -} - -MIPS_MACHINE(ATH79_MACH_WNR2000, "WNR2000", "NETGEAR WNR2000", wnr2000_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2200.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2200.c deleted file mode 100644 index bf7f9ee..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2200.c +++ /dev/null @@ -1,137 +0,0 @@ -/* - * NETGEAR WNR2200 board support - * - * Copyright (C) 2013 Aidan Kissane <aidankissane at googlemail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WNR2200_GPIO_LED_LAN2_AMBER 0 -#define WNR2200_GPIO_LED_LAN4_AMBER 1 -#define WNR2200_GPIO_LED_WPS 5 -#define WNR2200_GPIO_LED_WAN_GREEN 7 -#define WNR2200_GPIO_LED_USB 8 -#define WNR2200_GPIO_LED_LAN3_AMBER 11 -#define WNR2200_GPIO_LED_WAN_AMBER 12 -#define WNR2200_GPIO_LED_LAN1_GREEN 13 -#define WNR2200_GPIO_LED_LAN2_GREEN 14 -#define WNR2200_GPIO_LED_LAN3_GREEN 15 -#define WNR2200_GPIO_LED_LAN4_GREEN 16 -#define WNR2200_GPIO_LED_PWR_AMBER 21 -#define WNR2200_GPIO_LED_PWR_GREEN 22 - -#define WNR2200_GPIO_USB_POWER 24 - -#define WNR2200_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNR2200_KEYS_DEBOUNCE_INTERVAL (3 * WNR2200_KEYS_POLL_INTERVAL) - -#define WNR2200_MAC0_OFFSET 0 -#define WNR2200_MAC1_OFFSET 6 -#define WNR2200_PCIE_CALDATA_OFFSET 0x1000 - -static struct gpio_led wnr2200_leds_gpio[] __initdata = { - { - .name = "netgear:amber:lan2", - .gpio = WNR2200_GPIO_LED_LAN2_AMBER, - .active_low = 1, - }, { - .name = "netgear:amber:lan4", - .gpio = WNR2200_GPIO_LED_LAN4_AMBER, - .active_low = 1, - }, { - .name = "netgear:green:wps", - .gpio = WNR2200_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "netgear:green:wan", - .gpio = WNR2200_GPIO_LED_WAN_GREEN, - .active_low = 1, - }, { - .name = "netgear:green:usb", - .gpio = WNR2200_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "netgear:amber:lan3", - .gpio = WNR2200_GPIO_LED_LAN3_AMBER, - .active_low = 1, - }, { - .name = "netgear:amber:wan", - .gpio = WNR2200_GPIO_LED_WAN_AMBER, - .active_low = 1, - }, { - .name = "netgear:green:lan1", - .gpio = WNR2200_GPIO_LED_LAN1_GREEN, - .active_low = 1, - }, { - .name = "netgear:green:lan2", - .gpio = WNR2200_GPIO_LED_LAN2_GREEN, - .active_low = 1, - }, { - .name = "netgear:green:lan3", - .gpio = WNR2200_GPIO_LED_LAN3_GREEN, - .active_low = 1, - }, { - .name = "netgear:green:lan4", - .gpio = WNR2200_GPIO_LED_LAN4_GREEN, - .active_low = 1, - }, { - .name = "netgear:amber:power", - .gpio = WNR2200_GPIO_LED_PWR_AMBER, - .active_low = 1, - }, { - .name = "netgear:green:power", - .gpio = WNR2200_GPIO_LED_PWR_GREEN, - .active_low = 1, - } -}; - -static void __init wnr2200_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, art+WNR2200_MAC0_OFFSET, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, art+WNR2200_MAC1_OFFSET, 0); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - ap91_pci_init(art + WNR2200_PCIE_CALDATA_OFFSET, NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2200_leds_gpio), - wnr2200_leds_gpio); - - /* enable power for the USB port */ - gpio_request_one(WNR2200_GPIO_USB_POWER, - GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_WNR2200, "WNR2200", "NETGEAR WNR2200", wnr2200_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wp543.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wp543.c deleted file mode 100644 index dc4aee0..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wp543.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Compex WP543/WPJ543 board support - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define WP543_GPIO_SW6 2 -#define WP543_GPIO_LED_1 3 -#define WP543_GPIO_LED_2 4 -#define WP543_GPIO_LED_WLAN 5 -#define WP543_GPIO_LED_CONN 6 -#define WP543_GPIO_LED_DIAG 7 -#define WP543_GPIO_SW4 8 - -#define WP543_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WP543_KEYS_DEBOUNCE_INTERVAL (3 * WP543_KEYS_POLL_INTERVAL) - -static struct gpio_led wp543_leds_gpio[] __initdata = { - { - .name = "wp543:green:led1", - .gpio = WP543_GPIO_LED_1, - .active_low = 1, - }, { - .name = "wp543:green:led2", - .gpio = WP543_GPIO_LED_2, - .active_low = 1, - }, { - .name = "wp543:green:wlan", - .gpio = WP543_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "wp543:green:conn", - .gpio = WP543_GPIO_LED_CONN, - .active_low = 1, - }, { - .name = "wp543:green:diag", - .gpio = WP543_GPIO_LED_DIAG, - .active_low = 1, - } -}; - -static struct gpio_keys_button wp543_gpio_keys[] __initdata = { - { - .desc = "sw6", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, - .gpio = WP543_GPIO_SW6, - .active_low = 1, - }, { - .desc = "sw4", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, - .gpio = WP543_GPIO_SW4, - .active_low = 1, - } -}; - -static const char *wp543_part_probes[] = { - "MyLoader", - NULL, -}; - -static struct flash_platform_data wp543_flash_data = { - .part_probes = wp543_part_probes, -}; - -static void __init wp543_setup(void) -{ - ath79_register_m25p80(&wp543_flash_data); - - ath79_register_mdio(0, 0xfffffff0); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = 0x0f; - ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | - AR71XX_RESET_GE0_PHY; - ath79_register_eth(0); - - ath79_register_usb(); - ath79_register_pci(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio), - wp543_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WP543_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wp543_gpio_keys), - wp543_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_WP543, "WP543", "Compex WP543", wp543_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpe72.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpe72.c deleted file mode 100644 index 70bf7db..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpe72.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Compex WPE72 board support - * - * Copyright (C) 2012 Johnathan Boyce<jon.boyce@globalreach.eu.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include<asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define WPE72_GPIO_RESET 12 -#define WPE72_GPIO_LED_DIAG 13 -#define WPE72_GPIO_LED_1 14 -#define WPE72_GPIO_LED_2 15 -#define WPE72_GPIO_LED_3 16 -#define WPE72_GPIO_LED_4 17 - -#define WPE72_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WPE72_KEYS_DEBOUNCE_INTERVAL (3 * WPE72_KEYS_POLL_INTERVAL) - -static struct gpio_led wpe72_leds_gpio[] __initdata = { - { - .name = "wpe72:green:led1", - .gpio = WPE72_GPIO_LED_1, - .active_low = 1, - }, { - .name = "wpe72:green:led2", - .gpio = WPE72_GPIO_LED_2, - .active_low = 1, - }, { - .name = "wpe72:green:led3", - .gpio = WPE72_GPIO_LED_3, - .active_low = 1, - }, { - .name = "wpe72:green:led4", - .gpio = WPE72_GPIO_LED_4, - .active_low = 1, - }, { - .name = "wpe72:green:diag", - .gpio = WPE72_GPIO_LED_DIAG, - .active_low = 1, - } -}; - -static struct gpio_keys_button wpe72_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WPE72_KEYS_DEBOUNCE_INTERVAL, - .gpio = WPE72_GPIO_RESET, - .active_low = 1, - } -}; - -static const char *wpe72_part_probes[] = { - "MyLoader", - NULL, -}; - -static struct flash_platform_data wpe72_flash_data = { - .part_probes = wpe72_part_probes, -}; - -static void __init wpe72_setup(void) -{ - ath79_register_m25p80(&wpe72_flash_data); - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - ath79_register_pci(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wpe72_leds_gpio), - wpe72_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WPE72_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wpe72_gpio_keys), - wpe72_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_WPE72, "WPE72", "Compex WPE72", wpe72_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt160nl.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt160nl.c deleted file mode 100644 index 21aefe0..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt160nl.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Linksys WRT160NL board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "nvram.h" -#include "machtypes.h" - -#define WRT160NL_GPIO_LED_POWER 14 -#define WRT160NL_GPIO_LED_WPS_AMBER 9 -#define WRT160NL_GPIO_LED_WPS_BLUE 8 -#define WRT160NL_GPIO_LED_WLAN 6 - -#define WRT160NL_GPIO_BTN_WPS 7 -#define WRT160NL_GPIO_BTN_RESET 21 - -#define WRT160NL_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WRT160NL_KEYS_DEBOUNCE_INTERVAL (3 * WRT160NL_KEYS_POLL_INTERVAL) - -#define WRT160NL_NVRAM_ADDR 0x1f7e0000 -#define WRT160NL_NVRAM_SIZE 0x10000 - -static const char *wrt160nl_part_probes[] = { - "wrt160nl", - NULL, -}; - -static struct flash_platform_data wrt160nl_flash_data = { - .part_probes = wrt160nl_part_probes, -}; - -static struct gpio_led wrt160nl_leds_gpio[] __initdata = { - { - .name = "wrt160nl:blue:power", - .gpio = WRT160NL_GPIO_LED_POWER, - .active_low = 1, - .default_trigger = "default-on", - }, { - .name = "wrt160nl:amber:wps", - .gpio = WRT160NL_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, { - .name = "wrt160nl:blue:wps", - .gpio = WRT160NL_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, { - .name = "wrt160nl:blue:wlan", - .gpio = WRT160NL_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, - .gpio = WRT160NL_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, - .gpio = WRT160NL_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init wrt160nl_setup(void) -{ - const char *nvram = (char *) KSEG1ADDR(WRT160NL_NVRAM_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - - if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, - "lan_hwaddr=", mac) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - } - - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = 0x01; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&wrt160nl_flash_data); - - ath79_register_usb(); - - if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, - "wl0_hwaddr=", mac) == 0) - ath79_register_wmac(eeprom, mac); - else - ath79_register_wmac(eeprom, NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio), - wrt160nl_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wrt160nl_gpio_keys), - wrt160nl_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_WRT160NL, "WRT160NL", "Linksys WRT160NL", - wrt160nl_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt400n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt400n.c deleted file mode 100644 index 6c4c1cb..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt400n.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Linksys WRT400N board support - * - * Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2009 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define WRT400N_GPIO_LED_POWER 1 -#define WRT400N_GPIO_LED_WPS_BLUE 4 -#define WRT400N_GPIO_LED_WPS_AMBER 5 -#define WRT400N_GPIO_LED_WLAN 6 - -#define WRT400N_GPIO_BTN_RESET 8 -#define WRT400N_GPIO_BTN_WLSEC 3 - -#define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL) - -#define WRT400N_MAC_ADDR_OFFSET 0x120c -#define WRT400N_CALDATA0_OFFSET 0x1000 -#define WRT400N_CALDATA1_OFFSET 0x5000 - -static struct mtd_partition wrt400n_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x030000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "env", - .offset = 0x030000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "linux", - .offset = 0x040000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x180000, - .size = 0x630000, - }, { - .name = "nvram", - .offset = 0x7b0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "factory", - .offset = 0x7c0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "language", - .offset = 0x7d0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "caldata", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x040000, - .size = 0x770000, - } -}; - -static struct flash_platform_data wrt400n_flash_data = { - .parts = wrt400n_partitions, - .nr_parts = ARRAY_SIZE(wrt400n_partitions), -}; - -static struct gpio_led wrt400n_leds_gpio[] __initdata = { - { - .name = "wrt400n:blue:wps", - .gpio = WRT400N_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, { - .name = "wrt400n:amber:wps", - .gpio = WRT400N_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, { - .name = "wrt400n:blue:wlan", - .gpio = WRT400N_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "wrt400n:blue:power", - .gpio = WRT400N_GPIO_LED_POWER, - .active_low = 0, - .default_trigger = "default-on", - } -}; - -static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, - .gpio = WRT400N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wlsec", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, - .gpio = WRT400N_GPIO_BTN_WLSEC, - .active_low = 1, - } -}; - -static void __init wrt400n_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *mac = art + WRT400N_MAC_ADDR_OFFSET; - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&wrt400n_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio), - wrt400n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wrt400n_gpio_keys), - wrt400n_gpio_keys); - - ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL, - art + WRT400N_CALDATA1_OFFSET, NULL); -} - -MIPS_MACHINE(ATH79_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-ag300h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-ag300h.c deleted file mode 100644 index edd48f2..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-ag300h.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Buffalo WZR-HP-AG300H board support - * - * Copyright (C) 2011 Felix Fietkau <nbd@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WZRHPAG300H_MAC_OFFSET 0x20c -#define WZRHPAG300H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPAG300H_KEYS_POLL_INTERVAL) - -static struct mtd_partition wzrhpag300h_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f90000, - }, { - .name = "user_property", - .offset = 0x1ff0000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data wzrhpag300h_flash_data = { - .parts = wzrhpag300h_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpag300h_flash_partitions), -}; - -static struct gpio_led wzrhpag300h_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 1, - .active_low = 1, - }, -}; - -static struct gpio_led wzrhpag300h_wmac0_leds_gpio[] = { - { - .name = "buffalo:amber:band2g", - .gpio = 1, - .active_low = 1, - }, - { - .name = "buffalo:green:usb", - .gpio = 3, - .active_low = 1, - }, - { - .name = "buffalo:green:band2g", - .gpio = 5, - .active_low = 1, - }, -}; - -static struct gpio_led wzrhpag300h_wmac1_leds_gpio[] = { - { - .name = "buffalo:green:band5g", - .gpio = 1, - .active_low = 1, - }, - { - .name = "buffalo:green:router", - .gpio = 3, - .active_low = 1, - }, - { - .name = "buffalo:blue:movie_engine", - .gpio = 4, - .active_low = 1, - }, - { - .name = "buffalo:amber:band5g", - .gpio = 5, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wzrhpag300h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 11, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 3, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 5, - .active_low = 1, - }, { - .desc = "router_auto", - .type = EV_SW, - .code = BTN_6, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 6, - .active_low = 1, - }, { - .desc = "router_off", - .type = EV_SW, - .code = BTN_5, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 1, - }, { - .desc = "movie_engine", - .type = EV_SW, - .code = BTN_7, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 8, - .active_low = 1, - } -}; - -static void __init wzrhpag300h_setup(void) -{ - u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000); - u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000); - u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET; - u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET; - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 1); - - ath79_register_mdio(0, ~(BIT(0) | BIT(4))); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = BIT(4); - - ath79_register_eth(0); - ath79_register_eth(1); - - gpio_request_one(2, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio), - wzrhpag300h_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpag300h_gpio_keys), - wzrhpag300h_gpio_keys); - - ath79_register_m25p80_multi(&wzrhpag300h_flash_data); - - ap94_pci_init(eeprom1, mac1, eeprom2, mac2); - - ap9x_pci_setup_wmac_led_pin(0, 1); - ap9x_pci_setup_wmac_led_pin(1, 5); - - ap9x_pci_setup_wmac_leds(0, wzrhpag300h_wmac0_leds_gpio, - ARRAY_SIZE(wzrhpag300h_wmac0_leds_gpio)); - ap9x_pci_setup_wmac_leds(1, wzrhpag300h_wmac1_leds_gpio, - ARRAY_SIZE(wzrhpag300h_wmac1_leds_gpio)); -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_AG300H, "WZR-HP-AG300H", - "Buffalo WZR-HP-AG300H/WZR-600DHP", wzrhpag300h_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh.c deleted file mode 100644 index 0a3eba9..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh.c +++ /dev/null @@ -1,279 +0,0 @@ -/* - * Buffalo WZR-HP-G300NH board support - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/platform_device.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/nxp_74hc153.h> -#include <linux/rtl8366.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define WZRHPG300NH_GPIO_LED_USB 0 -#define WZRHPG300NH_GPIO_LED_DIAG 1 -#define WZRHPG300NH_GPIO_LED_WIRELESS 6 -#define WZRHPG300NH_GPIO_LED_SECURITY 17 -#define WZRHPG300NH_GPIO_LED_ROUTER 18 - -#define WZRHPG300NH_GPIO_RTL8366_SDA 19 -#define WZRHPG300NH_GPIO_RTL8366_SCK 20 - -#define WZRHPG300NH_GPIO_74HC153_S0 9 -#define WZRHPG300NH_GPIO_74HC153_S1 11 -#define WZRHPG300NH_GPIO_74HC153_1Y 12 -#define WZRHPG300NH_GPIO_74HC153_2Y 14 - -#define WZRHPG300NH_GPIO_EXP_BASE 32 -#define WZRHPG300NH_GPIO_BTN_AOSS (WZRHPG300NH_GPIO_EXP_BASE + 0) -#define WZRHPG300NH_GPIO_BTN_RESET (WZRHPG300NH_GPIO_EXP_BASE + 1) -#define WZRHPG300NH_GPIO_BTN_ROUTER_ON (WZRHPG300NH_GPIO_EXP_BASE + 2) -#define WZRHPG300NH_GPIO_BTN_QOS_ON (WZRHPG300NH_GPIO_EXP_BASE + 3) -#define WZRHPG300NH_GPIO_BTN_USB (WZRHPG300NH_GPIO_EXP_BASE + 5) -#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6) -#define WZRHPG300NH_GPIO_BTN_QOS_OFF (WZRHPG300NH_GPIO_EXP_BASE + 7) - -#define WZRHPG300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH_KEYS_POLL_INTERVAL) - -#define WZRHPG300NH_MAC_OFFSET 0x20c - -static struct mtd_partition wzrhpg300nh_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f60000, - }, { - .name = "user_property", - .offset = 0x1fc0000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x1fe0000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct physmap_flash_data wzrhpg300nh_flash_data = { - .width = 2, - .parts = wzrhpg300nh_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg300nh_flash_partitions), -}; - -#define WZRHPG300NH_FLASH_BASE 0x1e000000 -#define WZRHPG300NH_FLASH_SIZE (32 * 1024 * 1024) - -static struct resource wzrhpg300nh_flash_resources[] = { - [0] = { - .start = WZRHPG300NH_FLASH_BASE, - .end = WZRHPG300NH_FLASH_BASE + WZRHPG300NH_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device wzrhpg300nh_flash_device = { - .name = "physmap-flash", - .id = -1, - .resource = wzrhpg300nh_flash_resources, - .num_resources = ARRAY_SIZE(wzrhpg300nh_flash_resources), - .dev = { - .platform_data = &wzrhpg300nh_flash_data, - } -}; - -static struct gpio_led wzrhpg300nh_leds_gpio[] __initdata = { - { - .name = "buffalo:orange:security", - .gpio = WZRHPG300NH_GPIO_LED_SECURITY, - .active_low = 1, - }, { - .name = "buffalo:green:wireless", - .gpio = WZRHPG300NH_GPIO_LED_WIRELESS, - .active_low = 1, - }, { - .name = "buffalo:green:router", - .gpio = WZRHPG300NH_GPIO_LED_ROUTER, - .active_low = 1, - }, { - .name = "buffalo:red:diag", - .gpio = WZRHPG300NH_GPIO_LED_DIAG, - .active_low = 1, - }, { - .name = "buffalo:blue:usb", - .gpio = WZRHPG300NH_GPIO_LED_USB, - .active_low = 1, - } -}; - -static struct gpio_keys_button wzrhpg300nh_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_AOSS, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_USB, - .active_low = 1, - }, { - .desc = "qos_on", - .type = EV_KEY, - .code = BTN_3, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_QOS_ON, - .active_low = 0, - }, { - .desc = "qos_off", - .type = EV_KEY, - .code = BTN_4, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_QOS_OFF, - .active_low = 0, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_ON, - .active_low = 0, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_AUTO, - .active_low = 0, - } -}; - -static struct nxp_74hc153_platform_data wzrhpg300nh_74hc153_data = { - .gpio_base = WZRHPG300NH_GPIO_EXP_BASE, - .gpio_pin_s0 = WZRHPG300NH_GPIO_74HC153_S0, - .gpio_pin_s1 = WZRHPG300NH_GPIO_74HC153_S1, - .gpio_pin_1y = WZRHPG300NH_GPIO_74HC153_1Y, - .gpio_pin_2y = WZRHPG300NH_GPIO_74HC153_2Y, -}; - -static struct platform_device wzrhpg300nh_74hc153_device = { - .name = NXP_74HC153_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_74hc153_data, - } -}; - -static struct rtl8366_platform_data wzrhpg300nh_rtl8366_data = { - .gpio_sda = WZRHPG300NH_GPIO_RTL8366_SDA, - .gpio_sck = WZRHPG300NH_GPIO_RTL8366_SCK, -}; - -static struct platform_device wzrhpg300nh_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_rtl8366_data, - } -}; - -static struct platform_device wzrhpg300nh_rtl8366rb_device = { - .name = RTL8366RB_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_rtl8366_data, - } -}; - -static void __init wzrhpg300nh_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET; - bool hasrtl8366rb = false; - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - if (rtl8366_smi_detect(&wzrhpg300nh_rtl8366_data) == RTL8366_TYPE_RB) - hasrtl8366rb = true; - - if (hasrtl8366rb) { - ath79_eth0_pll_data.pll_1000 = 0x1f000000; - ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; - ath79_eth1_pll_data.pll_1000 = 0x100; - ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; - } else { - ath79_eth0_pll_data.pll_1000 = 0x1e000100; - ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; - ath79_eth1_pll_data.pll_1000 = 0x1e000100; - ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; - } - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - ath79_register_wmac(eeprom, NULL); - - platform_device_register(&wzrhpg300nh_74hc153_device); - platform_device_register(&wzrhpg300nh_flash_device); - - if (hasrtl8366rb) - platform_device_register(&wzrhpg300nh_rtl8366rb_device); - else - platform_device_register(&wzrhpg300nh_rtl8366s_device); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio), - wzrhpg300nh_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WZRHPG300NH_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg300nh_gpio_keys), - wzrhpg300nh_gpio_keys); - -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH, "WZR-HP-G300NH", - "Buffalo WZR-HP-G300NH", wzrhpg300nh_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh2.c deleted file mode 100644 index 733d996..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh2.c +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Buffalo WZR-HP-G300NH2 board support - * - * Copyright (C) 2011 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2011 Mark Deneen <mdeneen@gmail.com> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WZRHPG300NH2_MAC_OFFSET 0x20c -#define WZRHPG300NH2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH2_KEYS_POLL_INTERVAL) - -static struct mtd_partition wzrhpg300nh2_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f90000, - }, { - .name = "user_property", - .offset = 0x1ff0000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data wzrhpg300nh2_flash_data = { - .parts = wzrhpg300nh2_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg300nh2_flash_partitions), -}; - -static struct gpio_led wzrhpg300nh2_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 16, - .active_low = 1, - }, -}; - -static struct gpio_led wzrhpg300nh2_wmac_leds_gpio[] = { - { - .name = "buffalo:blue:usb", - .gpio = 4, - .active_low = 1, - }, - { - .name = "buffalo:orange:security", - .gpio = 6, - .active_low = 1, - }, - { - .name = "buffalo:green:router", - .gpio = 7, - .active_low = 1, - }, - { - .name = "buffalo:blue:movie_engine_on", - .gpio = 8, - .active_low = 1, - }, - { - .name = "buffalo:blue:movie_engine_off", - .gpio = 9, - .active_low = 1, - }, -}; - -/* The AOSS button is wmac gpio 12 */ -static struct gpio_keys_button wzrhpg300nh2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 1, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 1, - }, { - .desc = "qos", - .type = EV_KEY, - .code = BTN_3, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 11, - .active_low = 0, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 8, - .active_low = 0, - }, -}; - -static void __init wzrhpg300nh2_setup(void) -{ - - u8 *eeprom = (u8 *) KSEG1ADDR(0x1f051000); - u8 *mac0 = eeprom + WZRHPG300NH2_MAC_OFFSET; - /* There is an eth1 but it is not connected to the switch */ - - ath79_register_m25p80_multi(&wzrhpg300nh2_flash_data); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); - ath79_register_mdio(0, ~(BIT(0))); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_eth(0); - - /* gpio13 is usb power. Turn it on. */ - gpio_request_one(13, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh2_leds_gpio), - wzrhpg300nh2_leds_gpio); - ath79_register_gpio_keys_polled(-1, WZRHPG300NH2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg300nh2_gpio_keys), - wzrhpg300nh2_gpio_keys); - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_leds(0, wzrhpg300nh2_wmac_leds_gpio, - ARRAY_SIZE(wzrhpg300nh2_wmac_leds_gpio)); - - ap91_pci_init(eeprom, mac0); -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH2, "WZR-HP-G300NH2", - "Buffalo WZR-HP-G300NH2", wzrhpg300nh2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c deleted file mode 100644 index a559d73..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c +++ /dev/null @@ -1,165 +0,0 @@ -/* - * Buffalo WZR-HP-G450G board support - * - * Copyright (C) 2011 Felix Fietkau <nbd@openwrt.org> - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/gpio.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/ath9k_platform.h> - -#include <asm/mach-ath79/ath79.h> - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WZRHPG450H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG450H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG450H_KEYS_POLL_INTERVAL) - -static struct mtd_partition wzrhpg450h_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - }, { - .name = "ART", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f80000, - }, { - .name = "user_property", - .offset = 0x1fe0000, - .size = 0x0020000, - } -}; - -static struct flash_platform_data wzrhpg450h_flash_data = { - .parts = wzrhpg450h_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), -}; - -static struct gpio_led wzrhpg450h_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 14, - .active_low = 1, - }, - { - .name = "buffalo:orange:security", - .gpio = 13, - .active_low = 1, - }, -}; - - -static struct gpio_led wzrhpg450h_wmac_leds_gpio[] = { - { - .name = "buffalo:blue:movie_engine", - .gpio = 13, - .active_low = 1, - }, - { - .name = "buffalo:green:router", - .gpio = 14, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wzrhpg450h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 6, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 1, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 8, - .active_low = 1, - }, { - .desc = "movie_engine", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 0, - }, { - .desc = "router_off", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 12, - .active_low = 0, - } -}; - - -static void __init wzrhpg450h_init(void) -{ - u8 *ee = (u8 *) KSEG1ADDR(0x1f051000); - u8 *mac = (u8 *) ee + 2; - - ath79_register_m25p80_multi(&wzrhpg450h_flash_data); - - ath79_register_mdio(0, ~BIT(0)); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio), - wzrhpg450h_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg450h_gpio_keys), - wzrhpg450h_gpio_keys); - - ath79_register_eth(0); - - gpio_request_one(16, GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, - "USB power"); - ath79_register_usb(); - - ap91_pci_init(ee, NULL); - ap9x_pci_get_wmac_data(0)->tx_gain_buffalo = true; - ap9x_pci_get_wmac_data(1)->tx_gain_buffalo = true; - ap9x_pci_setup_wmac_led_pin(0, 15); - ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio, - ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio)); -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_G450H, "WZR-HP-G450H", "Buffalo WZR-HP-G450H", - wzrhpg450h_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-zcn-1523h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-zcn-1523h.c deleted file mode 100644 index bc79ab9..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-zcn-1523h.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - * Zcomax ZCN-1523H-2-8/5-16 board support - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ar71xx_regs.h> - -#include "common.h" -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "machtypes.h" - -#define ZCN_1523H_GPIO_BTN_RESET 0 -#define ZCN_1523H_GPIO_LED_INIT 11 -#define ZCN_1523H_GPIO_LED_LAN1 17 - -#define ZCN_1523H_2_GPIO_LED_WEAK 13 -#define ZCN_1523H_2_GPIO_LED_MEDIUM 14 -#define ZCN_1523H_2_GPIO_LED_STRONG 15 - -#define ZCN_1523H_5_GPIO_LAN2_POWER 1 -#define ZCN_1523H_5_GPIO_LED_LAN2 13 -#define ZCN_1523H_5_GPIO_LED_WEAK 14 -#define ZCN_1523H_5_GPIO_LED_MEDIUM 15 -#define ZCN_1523H_5_GPIO_LED_STRONG 16 - -#define ZCN_1523H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ZCN_1523H_KEYS_DEBOUNCE_INTERVAL (3 * ZCN_1523H_KEYS_POLL_INTERVAL) - -static struct gpio_keys_button zcn_1523h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ZCN_1523H_KEYS_DEBOUNCE_INTERVAL, - .gpio = ZCN_1523H_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:amber:init", - .gpio = ZCN_1523H_GPIO_LED_INIT, - .active_low = 1, - }, { - .name = "zcn-1523h:green:lan1", - .gpio = ZCN_1523H_GPIO_LED_LAN1, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_2_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:red:weak", - .gpio = ZCN_1523H_2_GPIO_LED_WEAK, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:medium", - .gpio = ZCN_1523H_2_GPIO_LED_MEDIUM, - .active_low = 1, - }, { - .name = "zcn-1523h:green:strong", - .gpio = ZCN_1523H_2_GPIO_LED_STRONG, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_5_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:red:weak", - .gpio = ZCN_1523H_5_GPIO_LED_WEAK, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:medium", - .gpio = ZCN_1523H_5_GPIO_LED_MEDIUM, - .active_low = 1, - }, { - .name = "zcn-1523h:green:strong", - .gpio = ZCN_1523H_5_GPIO_LED_STRONG, - .active_low = 1, - }, { - .name = "zcn-1523h:green:lan2", - .gpio = ZCN_1523H_5_GPIO_LED_LAN2, - .active_low = 1, - } -}; - -static void __init zcn_1523h_generic_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0004); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(0, ARRAY_SIZE(zcn_1523h_leds_gpio), - zcn_1523h_leds_gpio); - - ath79_register_gpio_keys_polled(-1, ZCN_1523H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(zcn_1523h_gpio_keys), - zcn_1523h_gpio_keys); - - ap91_pci_init(ee, mac); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN1 port */ - ath79_register_eth(0); -} - -static void __init zcn_1523h_2_setup(void) -{ - zcn_1523h_generic_setup(); - ap9x_pci_setup_wmac_gpio(0, BIT(9), 0); - - ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_2_leds_gpio), - zcn_1523h_2_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_ZCN_1523H_2, "ZCN-1523H-2", "Zcomax ZCN-1523H-2", - zcn_1523h_2_setup); - -static void __init zcn_1523h_5_setup(void) -{ - zcn_1523h_generic_setup(); - ap9x_pci_setup_wmac_gpio(0, BIT(8), 0); - - ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_5_leds_gpio), - zcn_1523h_5_leds_gpio); - - /* LAN2 port */ - ath79_register_eth(1); -} - -MIPS_MACHINE(ATH79_MACH_ZCN_1523H_5, "ZCN-1523H-5", "Zcomax ZCN-1523H-5", - zcn_1523h_5_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/nvram.c b/target/linux/ar71xx/files/arch/mips/ath79/nvram.c deleted file mode 100644 index e55af5a..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/nvram.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Atheros AR71xx minimal nvram support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/vmalloc.h> -#include <linux/errno.h> -#include <linux/init.h> -#include <linux/string.h> - -#include "nvram.h" - -char *ath79_nvram_find_var(const char *name, const char *buf, unsigned buf_len) -{ - unsigned len = strlen(name); - char *cur, *last; - - if (buf_len == 0 || len == 0) - return NULL; - - if (buf_len < len) - return NULL; - - if (len == 1) - return memchr(buf, (int) *name, buf_len); - - last = (char *) buf + buf_len - len; - for (cur = (char *) buf; cur <= last; cur++) - if (cur[0] == name[0] && memcmp(cur, name, len) == 0) - return cur + len; - - return NULL; -} - -int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, - const char *name, char *mac) -{ - char *buf; - char *mac_str; - int ret; - int t; - - buf = vmalloc(nvram_len); - if (!buf) - return -ENOMEM; - - memcpy(buf, nvram, nvram_len); - buf[nvram_len - 1] = '\0'; - - mac_str = ath79_nvram_find_var(name, buf, nvram_len); - if (!mac_str) { - ret = -EINVAL; - goto free; - } - - if (strlen(mac_str) == 19 && mac_str[0] == '"' && mac_str[18] == '"') { - mac_str[18] = 0; - mac_str++; - } - - t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); - - if (t != 6) { - ret = -EINVAL; - goto free; - } - - ret = 0; - -free: - vfree(buf); - return ret; -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/nvram.h b/target/linux/ar71xx/files/arch/mips/ath79/nvram.h deleted file mode 100644 index 75151d4..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/nvram.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Atheros AR71xx minimal nvram support - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_NVRAM_H -#define _ATH79_NVRAM_H - -char *ath79_nvram_find_var(const char *name, const char *buf, - unsigned buf_len); -int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, - const char *name, char *mac); - -#endif /* _ATH79_NVRAM_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c deleted file mode 100644 index fcca1d2..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c +++ /dev/null @@ -1,123 +0,0 @@ -/* - * Atheros AP94 reference board PCI initialization - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/pci.h> -#include <linux/delay.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -struct ath9k_fixup { - u16 *cal_data; - unsigned slot; -}; - -static int ath9k_num_fixups; -static struct ath9k_fixup ath9k_fixups[2]; - -static void ath9k_pci_fixup(struct pci_dev *dev) -{ - void __iomem *mem; - u16 *cal_data = NULL; - u16 cmd; - u32 bar0; - u32 val; - unsigned i; - - for (i = 0; i < ath9k_num_fixups; i++) { - if (ath9k_fixups[i].cal_data == NULL) - continue; - - if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) - continue; - - cal_data = ath9k_fixups[i].cal_data; - break; - } - - if (cal_data == NULL) - return; - - if (*cal_data != 0xa55a) { - pr_err("pci %s: invalid calibration data\n", pci_name(dev)); - return; - } - - pr_info("pci %s: fixup device configuration\n", pci_name(dev)); - - mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000); - if (!mem) { - pr_err("pci %s: ioremap error\n", pci_name(dev)); - return; - } - - pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); - - switch (ath79_soc) { - case ATH79_SOC_AR7161: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, - AR71XX_PCI_MEM_BASE); - break; - case ATH79_SOC_AR7240: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff); - break; - - case ATH79_SOC_AR7241: - case ATH79_SOC_AR7242: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); - break; - - default: - BUG(); - } - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_config_word(dev, PCI_COMMAND, cmd); - - /* set pointer to first reg address */ - cal_data += 3; - while (*cal_data != 0xffff) { - u32 reg; - reg = *cal_data++; - val = *cal_data++; - val |= (*cal_data++) << 16; - - __raw_writel(val, mem + reg); - udelay(100); - } - - pci_read_config_dword(dev, PCI_VENDOR_ID, &val); - dev->vendor = val & 0xffff; - dev->device = (val >> 16) & 0xffff; - - pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); - dev->revision = val & 0xff; - dev->class = val >> 8; /* upper 3 bytes */ - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); - pci_write_config_word(dev, PCI_COMMAND, cmd); - - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); - - iounmap(mem); -} -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); - -void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) -{ - if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) - return; - - ath9k_fixups[ath9k_num_fixups].slot = slot; - ath9k_fixups[ath9k_num_fixups].cal_data = cal_data; - ath9k_num_fixups++; -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.h b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.h deleted file mode 100644 index 5794941..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _PCI_ATH9K_FIXUP -#define _PCI_ATH9K_FIXUP - -void pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) __init; - -#endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/routerboot.c b/target/linux/ar71xx/files/arch/mips/ath79/routerboot.c deleted file mode 100644 index dbdec02..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/routerboot.c +++ /dev/null @@ -1,249 +0,0 @@ -/* - * RouterBoot helper routines - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define pr_fmt(fmt) "rb: " fmt - -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/errno.h> -#include <linux/routerboot.h> -#include <linux/rle.h> - -#include "routerboot.h" - -#define RB_BLOCK_SIZE 0x1000 -#define RB_ART_SIZE 0x10000 - -static struct rb_info rb_info; - -static u32 get_u32(void *buf) -{ - u8 *p = buf; - - return ((u32) p[3] + ((u32) p[2] << 8) + ((u32) p[1] << 16) + - ((u32) p[0] << 24)); -} - -static u16 get_u16(void *buf) -{ - u8 *p = buf; - - return (u16) p[1] + ((u16) p[0] << 8); -} - -__init int -routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard) -{ - u32 magic_ref = hard ? RB_MAGIC_HARD : RB_MAGIC_SOFT; - u32 magic; - u32 cur = *offset; - - while (cur < buflen) { - magic = get_u32(buf + cur); - if (magic == magic_ref) { - *offset = cur; - return 0; - } - - cur += 0x1000; - } - - return -ENOENT; -} - -__init int -routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, - u8 **tag_data, u16 *tag_len) -{ - uint32_t magic; - int ret; - - if (buflen < 4) - return -EINVAL; - - magic = get_u32(buf); - switch (magic) { - case RB_MAGIC_HARD: - /* skip magic value */ - buf += 4; - buflen -= 4; - break; - - case RB_MAGIC_SOFT: - if (buflen < 8) - return -EINVAL; - - /* skip magic and CRC value */ - buf += 8; - buflen -= 8; - - break; - - default: - return -EINVAL; - } - - ret = -ENOENT; - while (buflen > 2) { - u16 id; - u16 len; - - len = get_u16(buf); - buf += 2; - buflen -= 2; - - if (buflen < 2) - break; - - id = get_u16(buf); - buf += 2; - buflen -= 2; - - if (id == RB_ID_TERMINATOR) - break; - - if (buflen < len) - break; - - if (id == tag_id) { - if (tag_len) - *tag_len = len; - if (tag_data) - *tag_data = buf; - ret = 0; - break; - } - - buf += len; - buflen -= len; - } - - return ret; -} - -static inline int -rb_find_hard_cfg_tag(u16 tag_id, u8 **tag_data, u16 *tag_len) -{ - if (!rb_info.hard_cfg_data || - !rb_info.hard_cfg_size) - return -ENOENT; - - return routerboot_find_tag(rb_info.hard_cfg_data, - rb_info.hard_cfg_size, - tag_id, tag_data, tag_len); -} - -__init const char * -rb_get_board_name(void) -{ - u16 tag_len; - u8 *tag; - int err; - - err = rb_find_hard_cfg_tag(RB_ID_BOARD_NAME, &tag, &tag_len); - if (err) - return NULL; - - return tag; -} - -__init u32 -rb_get_hw_options(void) -{ - u16 tag_len; - u8 *tag; - int err; - - err = rb_find_hard_cfg_tag(RB_ID_HW_OPTIONS, &tag, &tag_len); - if (err) - return 0; - - return get_u32(tag); -} - -__init void * -rb_get_wlan_data(void) -{ - u16 tag_len; - u8 *tag; - void *buf; - int err; - - err = rb_find_hard_cfg_tag(RB_ID_WLAN_DATA, &tag, &tag_len); - if (err) { - pr_err("no calibration data found\n"); - goto err; - } - - buf = kmalloc(RB_ART_SIZE, GFP_KERNEL); - if (buf == NULL) { - pr_err("no memory for calibration data\n"); - goto err; - } - - err = rle_decode((char *) tag, tag_len, buf, RB_ART_SIZE, - NULL, NULL); - if (err) { - pr_err("unable to decode calibration data\n"); - goto err_free; - } - - return buf; - -err_free: - kfree(buf); -err: - return NULL; -} - -__init const struct rb_info * -rb_init_info(void *data, unsigned int size) -{ - unsigned int offset; - - if (size == 0 || (size % RB_BLOCK_SIZE) != 0) - return NULL; - - for (offset = 0; offset < size; offset += RB_BLOCK_SIZE) { - u32 magic; - - magic = get_u32(data + offset); - switch (magic) { - case RB_MAGIC_HARD: - rb_info.hard_cfg_offs = offset; - break; - - case RB_MAGIC_SOFT: - rb_info.soft_cfg_offs = offset; - break; - } - } - - if (!rb_info.hard_cfg_offs) { - pr_err("could not find a valid RouterBOOT hard config\n"); - return NULL; - } - - if (!rb_info.soft_cfg_offs) { - pr_err("could not find a valid RouterBOOT soft config\n"); - return NULL; - } - - rb_info.hard_cfg_size = RB_BLOCK_SIZE; - rb_info.hard_cfg_data = kmemdup(data + rb_info.hard_cfg_offs, - RB_BLOCK_SIZE, GFP_KERNEL); - if (!rb_info.hard_cfg_data) - return NULL; - - rb_info.board_name = rb_get_board_name(); - rb_info.hw_options = rb_get_hw_options(); - - return &rb_info; -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/routerboot.h b/target/linux/ar71xx/files/arch/mips/ath79/routerboot.h deleted file mode 100644 index 6ec296a..0000000 --- a/target/linux/ar71xx/files/arch/mips/ath79/routerboot.h +++ /dev/null @@ -1,57 +0,0 @@ -/* - * RouterBoot definitions - * - * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_ROUTERBOOT_H_ -#define _ATH79_ROUTERBOOT_H_ - -struct rb_info { - unsigned int hard_cfg_offs; - unsigned int hard_cfg_size; - void *hard_cfg_data; - unsigned int soft_cfg_offs; - - const char *board_name; - u32 hw_options; -}; - -#ifdef CONFIG_ATH79_ROUTERBOOT -const struct rb_info *rb_init_info(void *data, unsigned int size); -void *rb_get_wlan_data(void); - -int routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, - u8 **tag_data, u16 *tag_len); -int routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard); -#else -static inline const struct rb_info * -rb_init_info(void *data, unsigned int size) -{ - return NULL; -} - -static inline void *rb_get_wlan_data(void) -{ - return NULL; -} - -static inline int -routerboot_find_tag(u8 *buf, unsigned int buflen, u16 tag_id, - u8 **tag_data, u16 *tag_len) -{ - return -ENOENT; -} - -static inline int -routerboot_find_magic(u8 *buf, unsigned int buflen, u32 *offset, bool hard) -{ - return -ENOENT; -} -#endif - -#endif /* _ATH79_ROUTERBOOT_H_ */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/fw/myloader/myloader.h b/target/linux/ar71xx/files/arch/mips/include/asm/fw/myloader/myloader.h deleted file mode 100644 index 8a99d56..0000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/fw/myloader/myloader.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Compex's MyLoader specific definitions - * - * Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ - -#ifndef _ASM_MIPS_FW_MYLOADER_H -#define _ASM_MIPS_FW_MYLOADER_H - -#include <linux/myloader.h> - -struct myloader_info { - uint32_t vid; - uint32_t did; - uint32_t svid; - uint32_t sdid; - uint8_t macs[MYLO_ETHADDR_COUNT][6]; -}; - -#ifdef CONFIG_MYLOADER -extern struct myloader_info *myloader_get_info(void) __init; -#else -static inline struct myloader_info *myloader_get_info(void) -{ - return NULL; -} -#endif /* CONFIG_MYLOADER */ - -#endif /* _ASM_MIPS_FW_MYLOADER_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h deleted file mode 100644 index d46dc4e..0000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * Atheros AR71xx SoC specific platform data definitions - * - * Copyright (C) 2008-2012 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_ATH79_PLATFORM_H -#define __ASM_MACH_ATH79_PLATFORM_H - -#include <linux/if_ether.h> -#include <linux/skbuff.h> -#include <linux/phy.h> -#include <linux/spi/spi.h> - -struct ag71xx_switch_platform_data { - u8 phy4_mii_en:1; - u8 phy_poll_mask; -}; - -struct ag71xx_platform_data { - phy_interface_t phy_if_mode; - u32 phy_mask; - int speed; - int duplex; - u32 reset_bit; - u8 mac_addr[ETH_ALEN]; - struct device *mii_bus_dev; - - u8 has_gbit:1; - u8 is_ar91xx:1; - u8 is_ar7240:1; - u8 is_ar724x:1; - u8 has_ar8216:1; - - struct ag71xx_switch_platform_data *switch_data; - - void (*ddr_flush)(void); - void (*set_speed)(int speed); - - u32 fifo_cfg1; - u32 fifo_cfg2; - u32 fifo_cfg3; - - unsigned int max_frame_len; - unsigned int desc_pktlen_mask; -}; - -struct ag71xx_mdio_platform_data { - u32 phy_mask; - u8 builtin_switch:1; - u8 is_ar7240:1; - u8 is_ar9330:1; - u8 is_ar934x:1; - unsigned long mdio_clock; - unsigned long ref_clock; - - void (*reset)(struct mii_bus *bus); -}; - -#endif /* __ASM_MACH_ATH79_PLATFORM_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/mach-rb750.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/mach-rb750.h deleted file mode 100644 index 50d5a20..0000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/mach-rb750.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * MikroTik RouterBOARD 750 definitions - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ -#ifndef _MACH_RB750_H -#define _MACH_RB750_H - -#include <linux/bitops.h> - -#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */ -#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */ -#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */ -#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */ -#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */ -#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */ -#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */ -#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */ -#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */ -#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */ -#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */ -#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */ -#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */ -#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */ -#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */ - -#define RB750_GPIO_BTN_RESET 1 -#define RB750_GPIO_SPI_CS0 2 -#define RB750_GPIO_LED_ACT 12 -#define RB750_GPIO_LED_PORT1 13 -#define RB750_GPIO_LED_PORT2 14 -#define RB750_GPIO_LED_PORT3 15 -#define RB750_GPIO_LED_PORT4 16 -#define RB750_GPIO_LED_PORT5 17 - -#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT) -#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1) -#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2) -#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3) -#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4) -#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5) -#define RB750_NAND_NCE BIT(RB750_GPIO_NAND_NCE) - -#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE) - -#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \ - RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT) - -#define RB7XX_GPIO_NAND_NCE 0 -#define RB7XX_GPIO_MON 9 -#define RB7XX_GPIO_LED_ACT 11 -#define RB7XX_GPIO_USB_POWERON 13 - -#define RB7XX_NAND_NCE BIT(RB7XX_GPIO_NAND_NCE) -#define RB7XX_LED_ACT BIT(RB7XX_GPIO_LED_ACT) -#define RB7XX_MONITOR BIT(RB7XX_GPIO_MON) -#define RB7XX_USB_POWERON BIT(RB7XX_GPIO_USB_POWERON) - -struct rb750_led_data { - char *name; - char *default_trigger; - u32 mask; - int active_low; -}; - -struct rb750_led_platform_data { - int num_leds; - struct rb750_led_data *leds; - void (*latch_change)(u32 clear, u32 set); -}; - -struct rb7xx_nand_platform_data { - u32 nce_line; - - void (*enable_pins)(void); - void (*disable_pins)(void); - void (*latch_change)(u32, u32); -}; - -#endif /* _MACH_RB750_H */
\ No newline at end of file diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h deleted file mode 100644 index 5b17e94..0000000 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * SPI driver definitions for the CPLD chip on the Mikrotik RB4xx boards - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This file was based on the patches for Linux 2.6.27.39 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define CPLD_GPIO_nLED1 0 -#define CPLD_GPIO_nLED2 1 -#define CPLD_GPIO_nLED3 2 -#define CPLD_GPIO_nLED4 3 -#define CPLD_GPIO_FAN 4 -#define CPLD_GPIO_ALE 5 -#define CPLD_GPIO_CLE 6 -#define CPLD_GPIO_nCE 7 -#define CPLD_GPIO_nLED5 8 - -#define CPLD_NUM_GPIOS 9 - -#define CPLD_CFG_nLED1 BIT(CPLD_GPIO_nLED1) -#define CPLD_CFG_nLED2 BIT(CPLD_GPIO_nLED2) -#define CPLD_CFG_nLED3 BIT(CPLD_GPIO_nLED3) -#define CPLD_CFG_nLED4 BIT(CPLD_GPIO_nLED4) -#define CPLD_CFG_FAN BIT(CPLD_GPIO_FAN) -#define CPLD_CFG_ALE BIT(CPLD_GPIO_ALE) -#define CPLD_CFG_CLE BIT(CPLD_GPIO_CLE) -#define CPLD_CFG_nCE BIT(CPLD_GPIO_nCE) -#define CPLD_CFG_nLED5 BIT(CPLD_GPIO_nLED5) - -struct rb4xx_cpld_platform_data { - unsigned gpio_base; -}; - -extern int rb4xx_cpld_change_cfg(unsigned mask, unsigned value); -extern int rb4xx_cpld_read(unsigned char *rx_buf, - const unsigned char *verify_buf, - unsigned cnt); -extern int rb4xx_cpld_read_from(unsigned addr, - unsigned char *rx_buf, - const unsigned char *verify_buf, - unsigned cnt); -extern int rb4xx_cpld_write(const unsigned char *buf, unsigned count); diff --git a/target/linux/ar71xx/files/drivers/gpio/gpio-latch.c b/target/linux/ar71xx/files/drivers/gpio/gpio-latch.c deleted file mode 100644 index 1efa1a1..0000000 --- a/target/linux/ar71xx/files/drivers/gpio/gpio-latch.c +++ /dev/null @@ -1,219 +0,0 @@ -/* - * GPIO latch driver - * - * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/types.h> -#include <linux/gpio.h> -#include <linux/slab.h> -#include <linux/platform_device.h> - -#include <linux/platform_data/gpio-latch.h> - -struct gpio_latch_chip { - struct gpio_chip gc; - - struct mutex mutex; - struct mutex latch_mutex; - bool latch_enabled; - int le_gpio; - bool le_active_low; - int *gpios; -}; - -static inline struct gpio_latch_chip *to_gpio_latch_chip(struct gpio_chip *gc) -{ - return container_of(gc, struct gpio_latch_chip, gc); -} - -static void gpio_latch_lock(struct gpio_latch_chip *glc, bool enable) -{ - mutex_lock(&glc->mutex); - - if (enable) - glc->latch_enabled = true; - - if (glc->latch_enabled) - mutex_lock(&glc->latch_mutex); -} - -static void gpio_latch_unlock(struct gpio_latch_chip *glc, bool disable) -{ - if (glc->latch_enabled) - mutex_unlock(&glc->latch_mutex); - - if (disable) - glc->latch_enabled = true; - - mutex_unlock(&glc->mutex); -} - -static int -gpio_latch_get(struct gpio_chip *gc, unsigned offset) -{ - struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); - int ret; - - gpio_latch_lock(glc, false); - ret = gpio_get_value(glc->gpios[offset]); - gpio_latch_unlock(glc, false); - - return ret; -} - -static void -gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value) -{ - struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); - bool enable_latch = false; - bool disable_latch = false; - int gpio; - - gpio = glc->gpios[offset]; - - if (gpio == glc->le_gpio) { - enable_latch = value ^ glc->le_active_low; - disable_latch = !enable_latch; - } - - gpio_latch_lock(glc, enable_latch); - gpio_set_value(gpio, value); - gpio_latch_unlock(glc, disable_latch); -} - -static int -gpio_latch_direction_input(struct gpio_chip *gc, unsigned offset) -{ - struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); - int ret; - - gpio_latch_lock(glc, false); - ret = gpio_direction_input(glc->gpios[offset]); - gpio_latch_unlock(glc, false); - - return ret; -} - -static int -gpio_latch_direction_output(struct gpio_chip *gc, unsigned offset, int value) -{ - struct gpio_latch_chip *glc = to_gpio_latch_chip(gc); - bool enable_latch = false; - bool disable_latch = false; - int gpio; - int ret; - - gpio = glc->gpios[offset]; - - if (gpio == glc->le_gpio) { - enable_latch = value ^ glc->le_active_low; - disable_latch = !enable_latch; - } - - gpio_latch_lock(glc, enable_latch); - ret = gpio_direction_output(gpio, value); - gpio_latch_unlock(glc, disable_latch); - - return ret; -} - -static int gpio_latch_probe(struct platform_device *pdev) -{ - struct gpio_latch_chip *glc; - struct gpio_latch_platform_data *pdata; - struct gpio_chip *gc; - int size; - int ret; - int i; - - pdata = dev_get_platdata(&pdev->dev); - if (!pdata) - return -EINVAL; - - if (pdata->le_gpio_index >= pdata->num_gpios || - !pdata->num_gpios || - !pdata->gpios) - return -EINVAL; - - for (i = 0; i < pdata->num_gpios; i++) { - int gpio = pdata->gpios[i]; - - ret = devm_gpio_request(&pdev->dev, gpio, - GPIO_LATCH_DRIVER_NAME); - if (ret) - return ret; - } - - glc = devm_kzalloc(&pdev->dev, sizeof(*glc), GFP_KERNEL); - if (!glc) - return -ENOMEM; - - mutex_init(&glc->mutex); - mutex_init(&glc->latch_mutex); - - size = pdata->num_gpios * sizeof(glc->gpios[0]); - glc->gpios = devm_kzalloc(&pdev->dev, size , GFP_KERNEL); - if (!glc->gpios) - return -ENOMEM; - - memcpy(glc->gpios, pdata->gpios, size); - - glc->le_gpio = glc->gpios[pdata->le_gpio_index]; - glc->le_active_low = pdata->le_active_low; - - gc = &glc->gc; - - gc->label = GPIO_LATCH_DRIVER_NAME; - gc->base = pdata->base; - gc->can_sleep = true; - gc->ngpio = pdata->num_gpios; - gc->get = gpio_latch_get; - gc->set = gpio_latch_set; - gc->direction_input = gpio_latch_direction_input, - gc->direction_output = gpio_latch_direction_output; - - platform_set_drvdata(pdev, glc); - - ret = gpiochip_add(&glc->gc); - if (ret) - return ret; - - return 0; -} - -static int gpio_latch_remove(struct platform_device *pdev) -{ - struct gpio_latch_chip *glc = platform_get_drvdata(pdev); - - return gpiochip_remove(&glc->gc);; -} - - -static struct platform_driver gpio_latch_driver = { - .probe = gpio_latch_probe, - .remove = gpio_latch_remove, - .driver = { - .name = GPIO_LATCH_DRIVER_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init gpio_latch_init(void) -{ - return platform_driver_register(&gpio_latch_driver); -} - -postcore_initcall(gpio_latch_init); - -MODULE_DESCRIPTION("GPIO latch driver"); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" GPIO_LATCH_DRIVER_NAME); diff --git a/target/linux/ar71xx/files/drivers/gpio/gpio-nxp-74hc153.c b/target/linux/ar71xx/files/drivers/gpio/gpio-nxp-74hc153.c deleted file mode 100644 index 5bdeb3d..0000000 --- a/target/linux/ar71xx/files/drivers/gpio/gpio-nxp-74hc153.c +++ /dev/null @@ -1,247 +0,0 @@ -/* - * NXP 74HC153 - Dual 4-input multiplexer GPIO driver - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/module.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/slab.h> -#include <linux/platform_device.h> -#include <linux/nxp_74hc153.h> - -#define NXP_74HC153_NUM_GPIOS 8 -#define NXP_74HC153_S0_MASK 0x1 -#define NXP_74HC153_S1_MASK 0x2 -#define NXP_74HC153_BANK_MASK 0x4 - -struct nxp_74hc153_chip { - struct device *parent; - struct gpio_chip gpio_chip; - struct mutex lock; -}; - -static struct nxp_74hc153_chip *gpio_to_nxp(struct gpio_chip *gc) -{ - return container_of(gc, struct nxp_74hc153_chip, gpio_chip); -} - -static int nxp_74hc153_direction_input(struct gpio_chip *gc, unsigned offset) -{ - return 0; -} - -static int nxp_74hc153_direction_output(struct gpio_chip *gc, - unsigned offset, int val) -{ - return -EINVAL; -} - -static int nxp_74hc153_get_value(struct gpio_chip *gc, unsigned offset) -{ - struct nxp_74hc153_chip *nxp; - struct nxp_74hc153_platform_data *pdata; - unsigned s0; - unsigned s1; - unsigned pin; - int ret; - - nxp = gpio_to_nxp(gc); - pdata = nxp->parent->platform_data; - - s0 = !!(offset & NXP_74HC153_S0_MASK); - s1 = !!(offset & NXP_74HC153_S1_MASK); - pin = (offset & NXP_74HC153_BANK_MASK) ? pdata->gpio_pin_2y - : pdata->gpio_pin_1y; - - mutex_lock(&nxp->lock); - gpio_set_value(pdata->gpio_pin_s0, s0); - gpio_set_value(pdata->gpio_pin_s1, s1); - ret = gpio_get_value(pin); - mutex_unlock(&nxp->lock); - - return ret; -} - -static void nxp_74hc153_set_value(struct gpio_chip *gc, - unsigned offset, int val) -{ - /* not supported */ -} - -static int nxp_74hc153_probe(struct platform_device *pdev) -{ - struct nxp_74hc153_platform_data *pdata; - struct nxp_74hc153_chip *nxp; - struct gpio_chip *gc; - int err; - - pdata = pdev->dev.platform_data; - if (pdata == NULL) { - dev_dbg(&pdev->dev, "no platform data specified\n"); - return -EINVAL; - } - - nxp = kzalloc(sizeof(struct nxp_74hc153_chip), GFP_KERNEL); - if (nxp == NULL) { - dev_err(&pdev->dev, "no memory for private data\n"); - return -ENOMEM; - } - - err = gpio_request(pdata->gpio_pin_s0, dev_name(&pdev->dev)); - if (err) { - dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", - pdata->gpio_pin_s0, err); - goto err_free_nxp; - } - - err = gpio_request(pdata->gpio_pin_s1, dev_name(&pdev->dev)); - if (err) { - dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", - pdata->gpio_pin_s1, err); - goto err_free_s0; - } - - err = gpio_request(pdata->gpio_pin_1y, dev_name(&pdev->dev)); - if (err) { - dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", - pdata->gpio_pin_1y, err); - goto err_free_s1; - } - - err = gpio_request(pdata->gpio_pin_2y, dev_name(&pdev->dev)); - if (err) { - dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n", - pdata->gpio_pin_2y, err); - goto err_free_1y; - } - - err = gpio_direction_output(pdata->gpio_pin_s0, 0); - if (err) { - dev_err(&pdev->dev, - "unable to set direction of gpio %u, err=%d\n", - pdata->gpio_pin_s0, err); - goto err_free_2y; - } - - err = gpio_direction_output(pdata->gpio_pin_s1, 0); - if (err) { - dev_err(&pdev->dev, - "unable to set direction of gpio %u, err=%d\n", - pdata->gpio_pin_s1, err); - goto err_free_2y; - } - - err = gpio_direction_input(pdata->gpio_pin_1y); - if (err) { - dev_err(&pdev->dev, - "unable to set direction of gpio %u, err=%d\n", - pdata->gpio_pin_1y, err); - goto err_free_2y; - } - - err = gpio_direction_input(pdata->gpio_pin_2y); - if (err) { - dev_err(&pdev->dev, - "unable to set direction of gpio %u, err=%d\n", - pdata->gpio_pin_2y, err); - goto err_free_2y; - } - - nxp->parent = &pdev->dev; - mutex_init(&nxp->lock); - - gc = &nxp->gpio_chip; - - gc->direction_input = nxp_74hc153_direction_input; - gc->direction_output = nxp_74hc153_direction_output; - gc->get = nxp_74hc153_get_value; - gc->set = nxp_74hc153_set_value; - gc->can_sleep = 1; - - gc->base = pdata->gpio_base; - gc->ngpio = NXP_74HC153_NUM_GPIOS; - gc->label = dev_name(nxp->parent); - gc->dev = nxp->parent; - gc->owner = THIS_MODULE; - - err = gpiochip_add(&nxp->gpio_chip); - if (err) { - dev_err(&pdev->dev, "unable to add gpio chip, err=%d\n", err); - goto err_free_2y; - } - - platform_set_drvdata(pdev, nxp); - return 0; - -err_free_2y: - gpio_free(pdata->gpio_pin_2y); -err_free_1y: - gpio_free(pdata->gpio_pin_1y); -err_free_s1: - gpio_free(pdata->gpio_pin_s1); -err_free_s0: - gpio_free(pdata->gpio_pin_s0); -err_free_nxp: - kfree(nxp); - return err; -} - -static int nxp_74hc153_remove(struct platform_device *pdev) -{ - struct nxp_74hc153_chip *nxp = platform_get_drvdata(pdev); - struct nxp_74hc153_platform_data *pdata = pdev->dev.platform_data; - - if (nxp) { - int err; - - err = gpiochip_remove(&nxp->gpio_chip); - if (err) { - dev_err(&pdev->dev, - "unable to remove gpio chip, err=%d\n", - err); - return err; - } - - gpio_free(pdata->gpio_pin_2y); - gpio_free(pdata->gpio_pin_1y); - gpio_free(pdata->gpio_pin_s1); - gpio_free(pdata->gpio_pin_s0); - - kfree(nxp); - platform_set_drvdata(pdev, NULL); - } - - return 0; -} - -static struct platform_driver nxp_74hc153_driver = { - .probe = nxp_74hc153_probe, - .remove = nxp_74hc153_remove, - .driver = { - .name = NXP_74HC153_DRIVER_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init nxp_74hc153_init(void) -{ - return platform_driver_register(&nxp_74hc153_driver); -} -subsys_initcall(nxp_74hc153_init); - -static void __exit nxp_74hc153_exit(void) -{ - platform_driver_unregister(&nxp_74hc153_driver); -} -module_exit(nxp_74hc153_exit); - -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_DESCRIPTION("GPIO expander driver for NXP 74HC153"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" NXP_74HC153_DRIVER_NAME); diff --git a/target/linux/ar71xx/files/drivers/leds/leds-rb750.c b/target/linux/ar71xx/files/drivers/leds/leds-rb750.c deleted file mode 100644 index 79e98b4..0000000 --- a/target/linux/ar71xx/files/drivers/leds/leds-rb750.c +++ /dev/null @@ -1,144 +0,0 @@ -/* - * LED driver for the RouterBOARD 750 - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/leds.h> -#include <linux/slab.h> - -#include <asm/mach-ath79/mach-rb750.h> - -#define DRV_NAME "leds-rb750" - -struct rb750_led_dev { - struct led_classdev cdev; - u32 mask; - int active_low; - void (*latch_change)(u32 clear, u32 set); -}; - -struct rb750_led_drvdata { - struct rb750_led_dev *led_devs; - int num_leds; -}; - -static inline struct rb750_led_dev *to_rbled(struct led_classdev *led_cdev) -{ - return (struct rb750_led_dev *)container_of(led_cdev, - struct rb750_led_dev, cdev); -} - -static void rb750_led_brightness_set(struct led_classdev *led_cdev, - enum led_brightness value) -{ - struct rb750_led_dev *rbled = to_rbled(led_cdev); - int level; - - level = (value == LED_OFF) ? 0 : 1; - level ^= rbled->active_low; - - if (level) - rbled->latch_change(0, rbled->mask); - else - rbled->latch_change(rbled->mask, 0); -} - -static int rb750_led_probe(struct platform_device *pdev) -{ - struct rb750_led_platform_data *pdata; - struct rb750_led_drvdata *drvdata; - int ret = 0; - int i; - - pdata = pdev->dev.platform_data; - if (!pdata) - return -EINVAL; - - drvdata = kzalloc(sizeof(struct rb750_led_drvdata) + - sizeof(struct rb750_led_dev) * pdata->num_leds, - GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->num_leds = pdata->num_leds; - drvdata->led_devs = (struct rb750_led_dev *) &drvdata[1]; - - for (i = 0; i < drvdata->num_leds; i++) { - struct rb750_led_dev *rbled = &drvdata->led_devs[i]; - struct rb750_led_data *led_data = &pdata->leds[i]; - - rbled->cdev.name = led_data->name; - rbled->cdev.default_trigger = led_data->default_trigger; - rbled->cdev.brightness_set = rb750_led_brightness_set; - rbled->cdev.brightness = LED_OFF; - - rbled->mask = led_data->mask; - rbled->active_low = !!led_data->active_low; - rbled->latch_change = pdata->latch_change; - - ret = led_classdev_register(&pdev->dev, &rbled->cdev); - if (ret) - goto err; - } - - platform_set_drvdata(pdev, drvdata); - return 0; - -err: - for (i = i - 1; i >= 0; i--) - led_classdev_unregister(&drvdata->led_devs[i].cdev); - - kfree(drvdata); - return ret; -} - -static int rb750_led_remove(struct platform_device *pdev) -{ - struct rb750_led_drvdata *drvdata; - int i; - - drvdata = platform_get_drvdata(pdev); - for (i = 0; i < drvdata->num_leds; i++) - led_classdev_unregister(&drvdata->led_devs[i].cdev); - - kfree(drvdata); - return 0; -} - -static struct platform_driver rb750_led_driver = { - .probe = rb750_led_probe, - .remove = rb750_led_remove, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - }, -}; - -MODULE_ALIAS("platform:leds-rb750"); - -static int __init rb750_led_init(void) -{ - return platform_driver_register(&rb750_led_driver); -} - -static void __exit rb750_led_exit(void) -{ - platform_driver_unregister(&rb750_led_driver); -} - -module_init(rb750_led_init); -module_exit(rb750_led_exit); - -MODULE_DESCRIPTION(DRV_NAME); -MODULE_DESCRIPTION("LED driver for the RouterBOARD 750"); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/leds/leds-wndr3700-usb.c b/target/linux/ar71xx/files/drivers/leds/leds-wndr3700-usb.c deleted file mode 100644 index 6425b05..0000000 --- a/target/linux/ar71xx/files/drivers/leds/leds-wndr3700-usb.c +++ /dev/null @@ -1,76 +0,0 @@ -/* - * USB LED driver for the NETGEAR WNDR3700 - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/leds.h> -#include <linux/module.h> -#include <linux/platform_device.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#define DRIVER_NAME "wndr3700-led-usb" - -static void wndr3700_usb_led_set(struct led_classdev *cdev, - enum led_brightness brightness) -{ - if (brightness) - ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); - else - ath79_device_reset_set(AR71XX_RESET_GE1_PHY); -} - -static enum led_brightness wndr3700_usb_led_get(struct led_classdev *cdev) -{ - return ath79_device_reset_get(AR71XX_RESET_GE1_PHY) ? LED_OFF : LED_FULL; -} - -static struct led_classdev wndr3700_usb_led = { - .name = "netgear:green:usb", - .brightness_set = wndr3700_usb_led_set, - .brightness_get = wndr3700_usb_led_get, -}; - -static int wndr3700_usb_led_probe(struct platform_device *pdev) -{ - return led_classdev_register(&pdev->dev, &wndr3700_usb_led); -} - -static int wndr3700_usb_led_remove(struct platform_device *pdev) -{ - led_classdev_unregister(&wndr3700_usb_led); - return 0; -} - -static struct platform_driver wndr3700_usb_led_driver = { - .probe = wndr3700_usb_led_probe, - .remove = wndr3700_usb_led_remove, - .driver = { - .name = DRIVER_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init wndr3700_usb_led_init(void) -{ - return platform_driver_register(&wndr3700_usb_led_driver); -} - -static void __exit wndr3700_usb_led_exit(void) -{ - platform_driver_unregister(&wndr3700_usb_led_driver); -} - -module_init(wndr3700_usb_led_init); -module_exit(wndr3700_usb_led_exit); - -MODULE_DESCRIPTION("USB LED driver for the NETGEAR WNDR3700"); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/ar934x_nfc.c b/target/linux/ar71xx/files/drivers/mtd/nand/ar934x_nfc.c deleted file mode 100644 index 9231251..0000000 --- a/target/linux/ar71xx/files/drivers/mtd/nand/ar934x_nfc.c +++ /dev/null @@ -1,1504 +0,0 @@ -/* - * Driver for the built-in NAND controller of the Atheros AR934x SoCs - * - * Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/init.h> -#include <linux/interrupt.h> -#include <linux/module.h> -#include <linux/dma-mapping.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/slab.h> - -#include <linux/platform/ar934x_nfc.h> - -#define AR934X_NFC_REG_CMD 0x00 -#define AR934X_NFC_REG_CTRL 0x04 -#define AR934X_NFC_REG_STATUS 0x08 -#define AR934X_NFC_REG_INT_MASK 0x0c -#define AR934X_NFC_REG_INT_STATUS 0x10 -#define AR934X_NFC_REG_ECC_CTRL 0x14 -#define AR934X_NFC_REG_ECC_OFFSET 0x18 -#define AR934X_NFC_REG_ADDR0_0 0x1c -#define AR934X_NFC_REG_ADDR0_1 0x24 -#define AR934X_NFC_REG_ADDR1_0 0x20 -#define AR934X_NFC_REG_ADDR1_1 0x28 -#define AR934X_NFC_REG_SPARE_SIZE 0x30 -#define AR934X_NFC_REG_PROTECT 0x38 -#define AR934X_NFC_REG_LOOKUP_EN 0x40 -#define AR934X_NFC_REG_LOOKUP(_x) (0x44 + (_i) * 4) -#define AR934X_NFC_REG_DMA_ADDR 0x64 -#define AR934X_NFC_REG_DMA_COUNT 0x68 -#define AR934X_NFC_REG_DMA_CTRL 0x6c -#define AR934X_NFC_REG_MEM_CTRL 0x80 -#define AR934X_NFC_REG_DATA_SIZE 0x84 -#define AR934X_NFC_REG_READ_STATUS 0x88 -#define AR934X_NFC_REG_TIME_SEQ 0x8c -#define AR934X_NFC_REG_TIMINGS_ASYN 0x90 -#define AR934X_NFC_REG_TIMINGS_SYN 0x94 -#define AR934X_NFC_REG_FIFO_DATA 0x98 -#define AR934X_NFC_REG_TIME_MODE 0x9c -#define AR934X_NFC_REG_DMA_ADDR_OFFS 0xa0 -#define AR934X_NFC_REG_FIFO_INIT 0xb0 -#define AR934X_NFC_REG_GEN_SEQ_CTRL 0xb4 - -#define AR934X_NFC_CMD_CMD_SEQ_S 0 -#define AR934X_NFC_CMD_CMD_SEQ_M 0x3f -#define AR934X_NFC_CMD_SEQ_1C 0x00 -#define AR934X_NFC_CMD_SEQ_ERASE 0x0e -#define AR934X_NFC_CMD_SEQ_12 0x0c -#define AR934X_NFC_CMD_SEQ_1C1AXR 0x21 -#define AR934X_NFC_CMD_SEQ_S 0x24 -#define AR934X_NFC_CMD_SEQ_1C3AXR 0x27 -#define AR934X_NFC_CMD_SEQ_1C5A1CXR 0x2a -#define AR934X_NFC_CMD_SEQ_18 0x32 -#define AR934X_NFC_CMD_INPUT_SEL_SIU 0 -#define AR934X_NFC_CMD_INPUT_SEL_DMA BIT(6) -#define AR934X_NFC_CMD_ADDR_SEL_0 0 -#define AR934X_NFC_CMD_ADDR_SEL_1 BIT(7) -#define AR934X_NFC_CMD_CMD0_S 8 -#define AR934X_NFC_CMD_CMD0_M 0xff -#define AR934X_NFC_CMD_CMD1_S 16 -#define AR934X_NFC_CMD_CMD1_M 0xff -#define AR934X_NFC_CMD_CMD2_S 24 -#define AR934X_NFC_CMD_CMD2_M 0xff - -#define AR934X_NFC_CTRL_ADDR_CYCLE0_M 0x7 -#define AR934X_NFC_CTRL_ADDR_CYCLE0_S 0 -#define AR934X_NFC_CTRL_SPARE_EN BIT(3) -#define AR934X_NFC_CTRL_INT_EN BIT(4) -#define AR934X_NFC_CTRL_ECC_EN BIT(5) -#define AR934X_NFC_CTRL_BLOCK_SIZE_S 6 -#define AR934X_NFC_CTRL_BLOCK_SIZE_M 0x3 -#define AR934X_NFC_CTRL_BLOCK_SIZE_32 0 -#define AR934X_NFC_CTRL_BLOCK_SIZE_64 1 -#define AR934X_NFC_CTRL_BLOCK_SIZE_128 2 -#define AR934X_NFC_CTRL_BLOCK_SIZE_256 3 -#define AR934X_NFC_CTRL_PAGE_SIZE_S 8 -#define AR934X_NFC_CTRL_PAGE_SIZE_M 0x7 -#define AR934X_NFC_CTRL_PAGE_SIZE_256 0 -#define AR934X_NFC_CTRL_PAGE_SIZE_512 1 -#define AR934X_NFC_CTRL_PAGE_SIZE_1024 2 -#define AR934X_NFC_CTRL_PAGE_SIZE_2048 3 -#define AR934X_NFC_CTRL_PAGE_SIZE_4096 4 -#define AR934X_NFC_CTRL_PAGE_SIZE_8192 5 -#define AR934X_NFC_CTRL_PAGE_SIZE_16384 6 -#define AR934X_NFC_CTRL_CUSTOM_SIZE_EN BIT(11) -#define AR934X_NFC_CTRL_IO_WIDTH_8BITS 0 -#define AR934X_NFC_CTRL_IO_WIDTH_16BITS BIT(12) -#define AR934X_NFC_CTRL_LOOKUP_EN BIT(13) -#define AR934X_NFC_CTRL_PROT_EN BIT(14) -#define AR934X_NFC_CTRL_WORK_MODE_ASYNC 0 -#define AR934X_NFC_CTRL_WORK_MODE_SYNC BIT(15) -#define AR934X_NFC_CTRL_ADDR0_AUTO_INC BIT(16) -#define AR934X_NFC_CTRL_ADDR1_AUTO_INC BIT(17) -#define AR934X_NFC_CTRL_ADDR_CYCLE1_M 0x7 -#define AR934X_NFC_CTRL_ADDR_CYCLE1_S 18 -#define AR934X_NFC_CTRL_SMALL_PAGE BIT(21) - -#define AR934X_NFC_DMA_CTRL_DMA_START BIT(7) -#define AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE 0 -#define AR934X_NFC_DMA_CTRL_DMA_DIR_READ BIT(6) -#define AR934X_NFC_DMA_CTRL_DMA_MODE_SG BIT(5) -#define AR934X_NFC_DMA_CTRL_DMA_BURST_S 2 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_0 0 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_1 1 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_2 2 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_3 3 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_4 4 -#define AR934X_NFC_DMA_CTRL_DMA_BURST_5 5 -#define AR934X_NFC_DMA_CTRL_ERR_FLAG BIT(1) -#define AR934X_NFC_DMA_CTRL_DMA_READY BIT(0) - -#define AR934X_NFC_INT_DEV_RDY(_x) BIT(4 + (_x)) -#define AR934X_NFC_INT_CMD_END BIT(1) - -#define AR934X_NFC_ECC_CTRL_ERR_THRES_S 8 -#define AR934X_NFC_ECC_CTRL_ERR_THRES_M 0x1f -#define AR934X_NFC_ECC_CTRL_ECC_CAP_S 5 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_M 0x7 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_2 0 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_4 1 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_6 2 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_8 3 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_10 4 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_12 5 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_14 6 -#define AR934X_NFC_ECC_CTRL_ECC_CAP_16 7 -#define AR934X_NFC_ECC_CTRL_ERR_OVER BIT(2) -#define AR934X_NFC_ECC_CTRL_ERR_UNCORRECT BIT(1) -#define AR934X_NFC_ECC_CTRL_ERR_CORRECT BIT(0) - -#define AR934X_NFC_ECC_OFFS_OFSET_M 0xffff - -/* default timing values */ -#define AR934X_NFC_TIME_SEQ_DEFAULT 0x7fff -#define AR934X_NFC_TIMINGS_ASYN_DEFAULT 0x22 -#define AR934X_NFC_TIMINGS_SYN_DEFAULT 0xf - -#define AR934X_NFC_ID_BUF_SIZE 8 -#define AR934X_NFC_DEV_READY_TIMEOUT 25 /* msecs */ -#define AR934X_NFC_DMA_READY_TIMEOUT 25 /* msecs */ -#define AR934X_NFC_DONE_TIMEOUT 1000 -#define AR934X_NFC_DMA_RETRIES 20 - -#define AR934X_NFC_USE_IRQ true -#define AR934X_NFC_IRQ_MASK AR934X_NFC_INT_DEV_RDY(0) - -#define AR934X_NFC_GENSEQ_SMALL_PAGE_READ 0x30043 - -#undef AR934X_NFC_DEBUG_DATA -#undef AR934X_NFC_DEBUG - -struct ar934x_nfc; - -static inline __attribute__ ((format (printf, 2, 3))) -void _nfc_dbg(struct ar934x_nfc *nfc, const char *fmt, ...) -{ -} - -#ifdef AR934X_NFC_DEBUG -#define nfc_dbg(_nfc, fmt, ...) \ - dev_info((_nfc)->parent, fmt, ##__VA_ARGS__) -#else -#define nfc_dbg(_nfc, fmt, ...) \ - _nfc_dbg((_nfc), fmt, ##__VA_ARGS__) -#endif /* AR934X_NFC_DEBUG */ - -#ifdef AR934X_NFC_DEBUG_DATA -static void -nfc_debug_data(const char *label, void *data, int len) -{ - print_hex_dump(KERN_WARNING, label, DUMP_PREFIX_OFFSET, 16, 1, - data, len, 0); -} -#else -static inline void -nfc_debug_data(const char *label, void *data, int len) {} -#endif /* AR934X_NFC_DEBUG_DATA */ - -struct ar934x_nfc { - struct mtd_info mtd; - struct nand_chip nand_chip; - struct device *parent; - void __iomem *base; - void (*select_chip)(int chip_no); - bool swap_dma; - int irq; - wait_queue_head_t irq_waitq; - - bool spurious_irq_expected; - u32 irq_status; - - u32 ctrl_reg; - u32 ecc_ctrl_reg; - u32 ecc_offset_reg; - u32 ecc_thres; - u32 ecc_oob_pos; - - bool small_page; - unsigned int addr_count0; - unsigned int addr_count1; - - u8 *buf; - dma_addr_t buf_dma; - unsigned int buf_size; - int buf_index; - - bool read_id; - - int erase1_page_addr; - - int rndout_page_addr; - int rndout_read_cmd; - - int seqin_page_addr; - int seqin_column; - int seqin_read_cmd; -}; - -static void ar934x_nfc_restart(struct ar934x_nfc *nfc); - -static inline bool -is_all_ff(u8 *buf, int len) -{ - while (len--) - if (buf[len] != 0xff) - return false; - - return true; -} - -static inline void -ar934x_nfc_wr(struct ar934x_nfc *nfc, unsigned reg, u32 val) -{ - __raw_writel(val, nfc->base + reg); -} - -static inline u32 -ar934x_nfc_rr(struct ar934x_nfc *nfc, unsigned reg) -{ - return __raw_readl(nfc->base + reg); -} - -static inline struct ar934x_nfc_platform_data * -ar934x_nfc_get_platform_data(struct ar934x_nfc *nfc) -{ - return nfc->parent->platform_data; -} - -static inline struct -ar934x_nfc *mtd_to_ar934x_nfc(struct mtd_info *mtd) -{ - return container_of(mtd, struct ar934x_nfc, mtd); -} - -static inline bool ar934x_nfc_use_irq(struct ar934x_nfc *nfc) -{ - return AR934X_NFC_USE_IRQ; -} - -static inline void ar934x_nfc_write_cmd_reg(struct ar934x_nfc *nfc, u32 cmd_reg) -{ - wmb(); - - ar934x_nfc_wr(nfc, AR934X_NFC_REG_CMD, cmd_reg); - /* flush write */ - ar934x_nfc_rr(nfc, AR934X_NFC_REG_CMD); -} - -static bool -__ar934x_nfc_dev_ready(struct ar934x_nfc *nfc) -{ - u32 status; - - status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_STATUS); - return (status & 0xff) == 0xff; -} - -static inline bool -__ar934x_nfc_is_dma_ready(struct ar934x_nfc *nfc) -{ - u32 status; - - status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_DMA_CTRL); - return (status & AR934X_NFC_DMA_CTRL_DMA_READY) != 0; -} - -static int -ar934x_nfc_wait_dev_ready(struct ar934x_nfc *nfc) -{ - unsigned long timeout; - - timeout = jiffies + msecs_to_jiffies(AR934X_NFC_DEV_READY_TIMEOUT); - do { - if (__ar934x_nfc_dev_ready(nfc)) - return 0; - } while time_before(jiffies, timeout); - - nfc_dbg(nfc, "timeout waiting for device ready, status:%08x int:%08x\n", - ar934x_nfc_rr(nfc, AR934X_NFC_REG_STATUS), - ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS)); - return -ETIMEDOUT; -} - -static int -ar934x_nfc_wait_dma_ready(struct ar934x_nfc *nfc) -{ - unsigned long timeout; - - timeout = jiffies + msecs_to_jiffies(AR934X_NFC_DMA_READY_TIMEOUT); - do { - if (__ar934x_nfc_is_dma_ready(nfc)) - return 0; - } while time_before(jiffies, timeout); - - nfc_dbg(nfc, "timeout waiting for DMA ready, dma_ctrl:%08x\n", - ar934x_nfc_rr(nfc, AR934X_NFC_REG_DMA_CTRL)); - return -ETIMEDOUT; -} - -static int -ar934x_nfc_wait_irq(struct ar934x_nfc *nfc) -{ - long timeout; - int ret; - - timeout = wait_event_timeout(nfc->irq_waitq, - (nfc->irq_status & AR934X_NFC_IRQ_MASK) != 0, - msecs_to_jiffies(AR934X_NFC_DEV_READY_TIMEOUT)); - - ret = 0; - if (!timeout) { - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_MASK, 0); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); - /* flush write */ - ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); - - nfc_dbg(nfc, - "timeout waiting for interrupt, status:%08x\n", - nfc->irq_status); - ret = -ETIMEDOUT; - } - - nfc->irq_status = 0; - return ret; -} - -static int -ar934x_nfc_wait_done(struct ar934x_nfc *nfc) -{ - int ret; - - if (ar934x_nfc_use_irq(nfc)) - ret = ar934x_nfc_wait_irq(nfc); - else - ret = ar934x_nfc_wait_dev_ready(nfc); - - if (ret) - return ret; - - return ar934x_nfc_wait_dma_ready(nfc); -} - -static int -ar934x_nfc_alloc_buf(struct ar934x_nfc *nfc, unsigned size) -{ - nfc->buf = dma_alloc_coherent(nfc->parent, size, - &nfc->buf_dma, GFP_KERNEL); - if (nfc->buf == NULL) { - dev_err(nfc->parent, "no memory for DMA buffer\n"); - return -ENOMEM; - } - - nfc->buf_size = size; - nfc_dbg(nfc, "buf:%p size:%u\n", nfc->buf, nfc->buf_size); - - return 0; -} - -static void -ar934x_nfc_free_buf(struct ar934x_nfc *nfc) -{ - dma_free_coherent(nfc->parent, nfc->buf_size, nfc->buf, nfc->buf_dma); -} - -static void -ar934x_nfc_get_addr(struct ar934x_nfc *nfc, int column, int page_addr, - u32 *addr0, u32 *addr1) -{ - u32 a0, a1; - - a0 = 0; - a1 = 0; - - if (column == -1) { - /* ERASE1 */ - a0 = (page_addr & 0xffff) << 16; - a1 = (page_addr >> 16) & 0xf; - } else if (page_addr != -1) { - /* SEQIN, READ0, etc.. */ - - /* TODO: handle 16bit bus width */ - if (nfc->small_page) { - a0 = column & 0xff; - a0 |= (page_addr & 0xff) << 8; - a0 |= ((page_addr >> 8) & 0xff) << 16; - a0 |= ((page_addr >> 16) & 0xff) << 24; - } else { - a0 = column & 0x0FFF; - a0 |= (page_addr & 0xffff) << 16; - - if (nfc->addr_count0 > 4) - a1 = (page_addr >> 16) & 0xf; - } - } - - *addr0 = a0; - *addr1 = a1; -} - -static void -ar934x_nfc_send_cmd(struct ar934x_nfc *nfc, unsigned command) -{ - u32 cmd_reg; - - cmd_reg = AR934X_NFC_CMD_INPUT_SEL_SIU | AR934X_NFC_CMD_ADDR_SEL_0 | - AR934X_NFC_CMD_SEQ_1C; - cmd_reg |= (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; - - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); - - ar934x_nfc_write_cmd_reg(nfc, cmd_reg); - ar934x_nfc_wait_dev_ready(nfc); -} - -static int -ar934x_nfc_do_rw_command(struct ar934x_nfc *nfc, int column, int page_addr, - int len, u32 cmd_reg, u32 ctrl_reg, bool write) -{ - u32 addr0, addr1; - u32 dma_ctrl; - int dir; - int err; - int retries = 0; - - WARN_ON(len & 3); - - if (WARN_ON(len > nfc->buf_size)) - dev_err(nfc->parent, "len=%d > buf_size=%d", len, nfc->buf_size); - - if (write) { - dma_ctrl = AR934X_NFC_DMA_CTRL_DMA_DIR_WRITE; - dir = DMA_TO_DEVICE; - } else { - dma_ctrl = AR934X_NFC_DMA_CTRL_DMA_DIR_READ; - dir = DMA_FROM_DEVICE; - } - - ar934x_nfc_get_addr(nfc, column, page_addr, &addr0, &addr1); - - dma_ctrl |= AR934X_NFC_DMA_CTRL_DMA_START | - (AR934X_NFC_DMA_CTRL_DMA_BURST_3 << - AR934X_NFC_DMA_CTRL_DMA_BURST_S); - - cmd_reg |= AR934X_NFC_CMD_INPUT_SEL_DMA | AR934X_NFC_CMD_ADDR_SEL_0; - ctrl_reg |= AR934X_NFC_CTRL_INT_EN; - - nfc_dbg(nfc, "%s a0:%08x a1:%08x len:%x cmd:%08x dma:%08x ctrl:%08x\n", - (write) ? "write" : "read", - addr0, addr1, len, cmd_reg, dma_ctrl, ctrl_reg); - -retry: - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_0, addr0); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_1, addr1); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_ADDR, nfc->buf_dma); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_COUNT, len); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_DATA_SIZE, len); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, ctrl_reg); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_CTRL, dma_ctrl); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_ECC_CTRL, nfc->ecc_ctrl_reg); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_ECC_OFFSET, nfc->ecc_offset_reg); - - if (ar934x_nfc_use_irq(nfc)) { - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_MASK, AR934X_NFC_IRQ_MASK); - /* flush write */ - ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_MASK); - } - - ar934x_nfc_write_cmd_reg(nfc, cmd_reg); - err = ar934x_nfc_wait_done(nfc); - if (err) { - dev_dbg(nfc->parent, "%s operation stuck at page %d\n", - (write) ? "write" : "read", page_addr); - - ar934x_nfc_restart(nfc); - if (retries++ < AR934X_NFC_DMA_RETRIES) - goto retry; - - dev_err(nfc->parent, "%s operation failed on page %d\n", - (write) ? "write" : "read", page_addr); - } - - return err; -} - -static int -ar934x_nfc_send_readid(struct ar934x_nfc *nfc, unsigned command) -{ - u32 cmd_reg; - int err; - - nfc_dbg(nfc, "readid, cmd:%02x\n", command); - - cmd_reg = AR934X_NFC_CMD_SEQ_1C1AXR; - cmd_reg |= (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; - - err = ar934x_nfc_do_rw_command(nfc, -1, -1, AR934X_NFC_ID_BUF_SIZE, - cmd_reg, nfc->ctrl_reg, false); - - nfc_debug_data("[id] ", nfc->buf, AR934X_NFC_ID_BUF_SIZE); - - return err; -} - -static int -ar934x_nfc_send_read(struct ar934x_nfc *nfc, unsigned command, int column, - int page_addr, int len) -{ - u32 cmd_reg; - int err; - - nfc_dbg(nfc, "read, column=%d page=%d len=%d\n", - column, page_addr, len); - - cmd_reg = (command & AR934X_NFC_CMD_CMD0_M) << AR934X_NFC_CMD_CMD0_S; - - if (nfc->small_page) { - cmd_reg |= AR934X_NFC_CMD_SEQ_18; - } else { - cmd_reg |= NAND_CMD_READSTART << AR934X_NFC_CMD_CMD1_S; - cmd_reg |= AR934X_NFC_CMD_SEQ_1C5A1CXR; - } - - err = ar934x_nfc_do_rw_command(nfc, column, page_addr, len, - cmd_reg, nfc->ctrl_reg, false); - - nfc_debug_data("[data] ", nfc->buf, len); - - return err; -} - -static void -ar934x_nfc_send_erase(struct ar934x_nfc *nfc, unsigned command, int column, - int page_addr) -{ - u32 addr0, addr1; - u32 ctrl_reg; - u32 cmd_reg; - - ar934x_nfc_get_addr(nfc, column, page_addr, &addr0, &addr1); - - ctrl_reg = nfc->ctrl_reg; - if (nfc->small_page) { - /* override number of address cycles for the erase command */ - ctrl_reg &= ~(AR934X_NFC_CTRL_ADDR_CYCLE0_M << - AR934X_NFC_CTRL_ADDR_CYCLE0_S); - ctrl_reg &= ~(AR934X_NFC_CTRL_ADDR_CYCLE1_M << - AR934X_NFC_CTRL_ADDR_CYCLE1_S); - ctrl_reg &= ~(AR934X_NFC_CTRL_SMALL_PAGE); - ctrl_reg |= (nfc->addr_count0 + 1) << - AR934X_NFC_CTRL_ADDR_CYCLE0_S; - } - - cmd_reg = NAND_CMD_ERASE1 << AR934X_NFC_CMD_CMD0_S; - cmd_reg |= command << AR934X_NFC_CMD_CMD1_S; - cmd_reg |= AR934X_NFC_CMD_SEQ_ERASE; - - nfc_dbg(nfc, "erase page %d, a0:%08x a1:%08x cmd:%08x ctrl:%08x\n", - page_addr, addr0, addr1, cmd_reg, ctrl_reg); - - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, ctrl_reg); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_0, addr0); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_ADDR0_1, addr1); - - ar934x_nfc_write_cmd_reg(nfc, cmd_reg); - ar934x_nfc_wait_dev_ready(nfc); -} - -static int -ar934x_nfc_send_write(struct ar934x_nfc *nfc, unsigned command, int column, - int page_addr, int len) -{ - u32 cmd_reg; - - nfc_dbg(nfc, "write, column=%d page=%d len=%d\n", - column, page_addr, len); - - nfc_debug_data("[data] ", nfc->buf, len); - - cmd_reg = NAND_CMD_SEQIN << AR934X_NFC_CMD_CMD0_S; - cmd_reg |= command << AR934X_NFC_CMD_CMD1_S; - cmd_reg |= AR934X_NFC_CMD_SEQ_12; - - return ar934x_nfc_do_rw_command(nfc, column, page_addr, len, - cmd_reg, nfc->ctrl_reg, true); -} - -static void -ar934x_nfc_read_status(struct ar934x_nfc *nfc) -{ - u32 cmd_reg; - u32 status; - - cmd_reg = NAND_CMD_STATUS << AR934X_NFC_CMD_CMD0_S; - cmd_reg |= AR934X_NFC_CMD_SEQ_S; - - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); - - ar934x_nfc_write_cmd_reg(nfc, cmd_reg); - ar934x_nfc_wait_dev_ready(nfc); - - status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_READ_STATUS); - - nfc_dbg(nfc, "read status, cmd:%08x status:%02x\n", - cmd_reg, (status & 0xff)); - - if (nfc->swap_dma) - nfc->buf[0 ^ 3] = status; - else - nfc->buf[0] = status; -} - -static void -ar934x_nfc_cmdfunc(struct mtd_info *mtd, unsigned int command, int column, - int page_addr) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - struct nand_chip *nand = mtd->priv; - - nfc->read_id = false; - if (command != NAND_CMD_PAGEPROG) - nfc->buf_index = 0; - - switch (command) { - case NAND_CMD_RESET: - ar934x_nfc_send_cmd(nfc, command); - break; - - case NAND_CMD_READID: - nfc->read_id = true; - ar934x_nfc_send_readid(nfc, command); - break; - - case NAND_CMD_READ0: - case NAND_CMD_READ1: - if (nfc->small_page) { - ar934x_nfc_send_read(nfc, command, column, page_addr, - mtd->writesize + mtd->oobsize); - } else { - ar934x_nfc_send_read(nfc, command, 0, page_addr, - mtd->writesize + mtd->oobsize); - nfc->buf_index = column; - nfc->rndout_page_addr = page_addr; - nfc->rndout_read_cmd = command; - } - break; - - case NAND_CMD_READOOB: - if (nfc->small_page) - ar934x_nfc_send_read(nfc, NAND_CMD_READOOB, - column, page_addr, - mtd->oobsize); - else - ar934x_nfc_send_read(nfc, NAND_CMD_READ0, - mtd->writesize, page_addr, - mtd->oobsize); - break; - - case NAND_CMD_RNDOUT: - if (WARN_ON(nfc->small_page)) - break; - - /* emulate subpage read */ - ar934x_nfc_send_read(nfc, nfc->rndout_read_cmd, 0, - nfc->rndout_page_addr, - mtd->writesize + mtd->oobsize); - nfc->buf_index = column; - break; - - case NAND_CMD_ERASE1: - nfc->erase1_page_addr = page_addr; - break; - - case NAND_CMD_ERASE2: - ar934x_nfc_send_erase(nfc, command, -1, nfc->erase1_page_addr); - break; - - case NAND_CMD_STATUS: - ar934x_nfc_read_status(nfc); - break; - - case NAND_CMD_SEQIN: - if (nfc->small_page) { - /* output read command */ - if (column >= mtd->writesize) { - column -= mtd->writesize; - nfc->seqin_read_cmd = NAND_CMD_READOOB; - } else if (column < 256) { - nfc->seqin_read_cmd = NAND_CMD_READ0; - } else { - column -= 256; - nfc->seqin_read_cmd = NAND_CMD_READ1; - } - } else { - nfc->seqin_read_cmd = NAND_CMD_READ0; - } - nfc->seqin_column = column; - nfc->seqin_page_addr = page_addr; - break; - - case NAND_CMD_PAGEPROG: - if (nand->ecc.mode == NAND_ECC_HW) { - /* the data is already written */ - break; - } - - if (nfc->small_page) - ar934x_nfc_send_cmd(nfc, nfc->seqin_read_cmd); - - ar934x_nfc_send_write(nfc, command, nfc->seqin_column, - nfc->seqin_page_addr, - nfc->buf_index); - break; - - default: - dev_err(nfc->parent, - "unsupported command: %x, column:%d page_addr=%d\n", - command, column, page_addr); - break; - } -} - -static int -ar934x_nfc_dev_ready(struct mtd_info *mtd) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - - return __ar934x_nfc_dev_ready(nfc); -} - -static void -ar934x_nfc_select_chip(struct mtd_info *mtd, int chip_no) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - - if (nfc->select_chip) - nfc->select_chip(chip_no); -} - -static u8 -ar934x_nfc_read_byte(struct mtd_info *mtd) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - u8 data; - - WARN_ON(nfc->buf_index >= nfc->buf_size); - - if (nfc->swap_dma || nfc->read_id) - data = nfc->buf[nfc->buf_index ^ 3]; - else - data = nfc->buf[nfc->buf_index]; - - nfc->buf_index++; - - return data; -} - -static void -ar934x_nfc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - int i; - - WARN_ON(nfc->buf_index + len > nfc->buf_size); - - if (nfc->swap_dma) { - for (i = 0; i < len; i++) { - nfc->buf[nfc->buf_index ^ 3] = buf[i]; - nfc->buf_index++; - } - } else { - for (i = 0; i < len; i++) { - nfc->buf[nfc->buf_index] = buf[i]; - nfc->buf_index++; - } - } -} - -static void -ar934x_nfc_read_buf(struct mtd_info *mtd, u8 *buf, int len) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - int buf_index; - int i; - - WARN_ON(nfc->buf_index + len > nfc->buf_size); - - buf_index = nfc->buf_index; - - if (nfc->swap_dma || nfc->read_id) { - for (i = 0; i < len; i++) { - buf[i] = nfc->buf[buf_index ^ 3]; - buf_index++; - } - } else { - for (i = 0; i < len; i++) { - buf[i] = nfc->buf[buf_index]; - buf_index++; - } - } - - nfc->buf_index = buf_index; -} - -static inline void -ar934x_nfc_enable_hwecc(struct ar934x_nfc *nfc) -{ - nfc->ctrl_reg |= AR934X_NFC_CTRL_ECC_EN; - nfc->ctrl_reg &= ~AR934X_NFC_CTRL_CUSTOM_SIZE_EN; -} - -static inline void -ar934x_nfc_disable_hwecc(struct ar934x_nfc *nfc) -{ - nfc->ctrl_reg &= ~AR934X_NFC_CTRL_ECC_EN; - nfc->ctrl_reg |= AR934X_NFC_CTRL_CUSTOM_SIZE_EN; -} - -static int -ar934x_nfc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, - int page) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - int err; - - nfc_dbg(nfc, "read_oob: page:%d\n", page); - - err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, mtd->writesize, page, - mtd->oobsize); - if (err) - return err; - - memcpy(chip->oob_poi, nfc->buf, mtd->oobsize); - - return 0; -} - -static int -ar934x_nfc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, - int page) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - - nfc_dbg(nfc, "write_oob: page:%d\n", page); - - memcpy(nfc->buf, chip->oob_poi, mtd->oobsize); - - return ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, mtd->writesize, - page, mtd->oobsize); -} - -static int -ar934x_nfc_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, - u8 *buf, int oob_required, int page) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - int len; - int err; - - nfc_dbg(nfc, "read_page_raw: page:%d oob:%d\n", page, oob_required); - - len = mtd->writesize; - if (oob_required) - len += mtd->oobsize; - - err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, 0, page, len); - if (err) - return err; - - memcpy(buf, nfc->buf, mtd->writesize); - - if (oob_required) - memcpy(chip->oob_poi, &nfc->buf[mtd->writesize], mtd->oobsize); - - return 0; -} - -static int -ar934x_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip, - u8 *buf, int oob_required, int page) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - u32 ecc_ctrl; - int max_bitflips = 0; - bool ecc_failed; - bool ecc_corrected; - int err; - - nfc_dbg(nfc, "read_page: page:%d oob:%d\n", page, oob_required); - - ar934x_nfc_enable_hwecc(nfc); - err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, 0, page, - mtd->writesize); - ar934x_nfc_disable_hwecc(nfc); - - if (err) - return err; - - /* TODO: optimize to avoid memcpy */ - memcpy(buf, nfc->buf, mtd->writesize); - - /* read the ECC status */ - ecc_ctrl = ar934x_nfc_rr(nfc, AR934X_NFC_REG_ECC_CTRL); - ecc_failed = ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_UNCORRECT; - ecc_corrected = ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_CORRECT; - - if (oob_required || ecc_failed) { - err = ar934x_nfc_send_read(nfc, NAND_CMD_READ0, mtd->writesize, - page, mtd->oobsize); - if (err) - return err; - - if (oob_required) - memcpy(chip->oob_poi, nfc->buf, mtd->oobsize); - } - - if (ecc_failed) { - /* - * The hardware ECC engine reports uncorrectable errors - * on empty pages. Check the ECC bytes and the data. If - * both contains 0xff bytes only, dont report a failure. - * - * TODO: prebuild a buffer with 0xff bytes and use memcmp - * for better performance? - */ - if (!is_all_ff(&nfc->buf[nfc->ecc_oob_pos], chip->ecc.total) || - !is_all_ff(buf, mtd->writesize)) - mtd->ecc_stats.failed++; - } else if (ecc_corrected) { - /* - * The hardware does not report the exact count of the - * corrected bitflips, use assumptions based on the - * threshold. - */ - if (ecc_ctrl & AR934X_NFC_ECC_CTRL_ERR_OVER) { - /* - * The number of corrected bitflips exceeds the - * threshold. Assume the maximum. - */ - max_bitflips = chip->ecc.strength * chip->ecc.steps; - } else { - max_bitflips = nfc->ecc_thres * chip->ecc.steps; - } - - mtd->ecc_stats.corrected += max_bitflips; - } - - return max_bitflips; -} - -static int -ar934x_nfc_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, - const u8 *buf, int oob_required) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - int page; - int len; - - page = nfc->seqin_page_addr; - - nfc_dbg(nfc, "write_page_raw: page:%d oob:%d\n", page, oob_required); - - memcpy(nfc->buf, buf, mtd->writesize); - len = mtd->writesize; - - if (oob_required) { - memcpy(&nfc->buf[mtd->writesize], chip->oob_poi, mtd->oobsize); - len += mtd->oobsize; - } - - return ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, 0, page, len); -} - -static int -ar934x_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip, - const u8 *buf, int oob_required) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - int page; - int err; - - page = nfc->seqin_page_addr; - - nfc_dbg(nfc, "write_page: page:%d oob:%d\n", page, oob_required); - - /* write OOB first */ - if (oob_required && - !is_all_ff(chip->oob_poi, mtd->oobsize)) { - err = ar934x_nfc_write_oob(mtd, chip, page); - if (err) - return err; - } - - /* TODO: optimize to avoid memcopy */ - memcpy(nfc->buf, buf, mtd->writesize); - - ar934x_nfc_enable_hwecc(nfc); - err = ar934x_nfc_send_write(nfc, NAND_CMD_PAGEPROG, 0, page, - mtd->writesize); - ar934x_nfc_disable_hwecc(nfc); - - return err; -} - -static void -ar934x_nfc_hw_init(struct ar934x_nfc *nfc) -{ - struct ar934x_nfc_platform_data *pdata; - - pdata = ar934x_nfc_get_platform_data(nfc); - if (pdata->hw_reset) { - pdata->hw_reset(true); - pdata->hw_reset(false); - } - - /* - * setup timings - * TODO: make it configurable via platform data - */ - ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIME_SEQ, - AR934X_NFC_TIME_SEQ_DEFAULT); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIMINGS_ASYN, - AR934X_NFC_TIMINGS_ASYN_DEFAULT); - ar934x_nfc_wr(nfc, AR934X_NFC_REG_TIMINGS_SYN, - AR934X_NFC_TIMINGS_SYN_DEFAULT); - - /* disable WP on all chips, and select chip 0 */ - ar934x_nfc_wr(nfc, AR934X_NFC_REG_MEM_CTRL, 0xff00); - - ar934x_nfc_wr(nfc, AR934X_NFC_REG_DMA_ADDR_OFFS, 0); - - /* initialize Control register */ - nfc->ctrl_reg = AR934X_NFC_CTRL_CUSTOM_SIZE_EN; - ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); - - if (nfc->small_page) { - /* Setup generic sequence register for small page reads. */ - ar934x_nfc_wr(nfc, AR934X_NFC_REG_GEN_SEQ_CTRL, - AR934X_NFC_GENSEQ_SMALL_PAGE_READ); - } -} - -static void -ar934x_nfc_restart(struct ar934x_nfc *nfc) -{ - u32 ctrl_reg; - - if (nfc->select_chip) - nfc->select_chip(-1); - - ctrl_reg = nfc->ctrl_reg; - ar934x_nfc_hw_init(nfc); - nfc->ctrl_reg = ctrl_reg; - - if (nfc->select_chip) - nfc->select_chip(0); - - ar934x_nfc_send_cmd(nfc, NAND_CMD_RESET); -} - -static irqreturn_t -ar934x_nfc_irq_handler(int irq, void *data) -{ - struct ar934x_nfc *nfc = data; - u32 status; - - status = ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); - - ar934x_nfc_wr(nfc, AR934X_NFC_REG_INT_STATUS, 0); - /* flush write */ - ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_STATUS); - - status &= ar934x_nfc_rr(nfc, AR934X_NFC_REG_INT_MASK); - if (status) { - nfc_dbg(nfc, "got IRQ, status:%08x\n", status); - - nfc->irq_status = status; - nfc->spurious_irq_expected = true; - wake_up(&nfc->irq_waitq); - } else { - if (nfc->spurious_irq_expected) { - nfc->spurious_irq_expected = false; - } else { - dev_warn(nfc->parent, "spurious interrupt\n"); - } - } - - return IRQ_HANDLED; -} - -static int -ar934x_nfc_init_tail(struct mtd_info *mtd) -{ - struct ar934x_nfc *nfc = mtd_to_ar934x_nfc(mtd); - struct nand_chip *chip = &nfc->nand_chip; - u32 ctrl; - u32 t; - int err; - - switch (mtd->oobsize) { - case 16: - case 64: - case 128: - ar934x_nfc_wr(nfc, AR934X_NFC_REG_SPARE_SIZE, mtd->oobsize); - break; - - default: - dev_err(nfc->parent, "unsupported OOB size: %d bytes\n", - mtd->oobsize); - return -ENXIO; - } - - ctrl = AR934X_NFC_CTRL_CUSTOM_SIZE_EN; - - switch (mtd->erasesize / mtd->writesize) { - case 32: - t = AR934X_NFC_CTRL_BLOCK_SIZE_32; - break; - - case 64: - t = AR934X_NFC_CTRL_BLOCK_SIZE_64; - break; - - case 128: - t = AR934X_NFC_CTRL_BLOCK_SIZE_128; - break; - - case 256: - t = AR934X_NFC_CTRL_BLOCK_SIZE_256; - break; - - default: - dev_err(nfc->parent, "unsupported block size: %u\n", - mtd->erasesize / mtd->writesize); - return -ENXIO; - } - - ctrl |= t << AR934X_NFC_CTRL_BLOCK_SIZE_S; - - switch (mtd->writesize) { - case 256: - nfc->small_page = 1; - t = AR934X_NFC_CTRL_PAGE_SIZE_256; - break; - - case 512: - nfc->small_page = 1; - t = AR934X_NFC_CTRL_PAGE_SIZE_512; - break; - - case 1024: - t = AR934X_NFC_CTRL_PAGE_SIZE_1024; - break; - - case 2048: - t = AR934X_NFC_CTRL_PAGE_SIZE_2048; - break; - - case 4096: - t = AR934X_NFC_CTRL_PAGE_SIZE_4096; - break; - - case 8192: - t = AR934X_NFC_CTRL_PAGE_SIZE_8192; - break; - - case 16384: - t = AR934X_NFC_CTRL_PAGE_SIZE_16384; - break; - - default: - dev_err(nfc->parent, "unsupported write size: %d bytes\n", - mtd->writesize); - return -ENXIO; - } - - ctrl |= t << AR934X_NFC_CTRL_PAGE_SIZE_S; - - if (nfc->small_page) { - ctrl |= AR934X_NFC_CTRL_SMALL_PAGE; - - if (chip->chipsize > (32 << 20)) { - nfc->addr_count0 = 4; - nfc->addr_count1 = 3; - } else if (chip->chipsize > (2 << 16)) { - nfc->addr_count0 = 3; - nfc->addr_count1 = 2; - } else { - nfc->addr_count0 = 2; - nfc->addr_count1 = 1; - } - } else { - if (chip->chipsize > (128 << 20)) { - nfc->addr_count0 = 5; - nfc->addr_count1 = 3; - } else if (chip->chipsize > (8 << 16)) { - nfc->addr_count0 = 4; - nfc->addr_count1 = 2; - } else { - nfc->addr_count0 = 3; - nfc->addr_count1 = 1; - } - } - - ctrl |= nfc->addr_count0 << AR934X_NFC_CTRL_ADDR_CYCLE0_S; - ctrl |= nfc->addr_count1 << AR934X_NFC_CTRL_ADDR_CYCLE1_S; - - nfc->ctrl_reg = ctrl; - ar934x_nfc_wr(nfc, AR934X_NFC_REG_CTRL, nfc->ctrl_reg); - - ar934x_nfc_free_buf(nfc); - err = ar934x_nfc_alloc_buf(nfc, mtd->writesize + mtd->oobsize); - - return err; -} - -static struct nand_ecclayout ar934x_nfc_oob_64_hwecc = { - .eccbytes = 28, - .eccpos = { - 20, 21, 22, 23, 24, 25, 26, - 27, 28, 29, 30, 31, 32, 33, - 34, 35, 36, 37, 38, 39, 40, - 41, 42, 43, 44, 45, 46, 47, - }, - .oobfree = { - { - .offset = 4, - .length = 16, - }, - { - .offset = 48, - .length = 16, - }, - }, -}; - -static int -ar934x_nfc_setup_hwecc(struct ar934x_nfc *nfc) -{ - struct nand_chip *nand = &nfc->nand_chip; - u32 ecc_cap; - u32 ecc_thres; - - if (!config_enabled(CONFIG_MTD_NAND_AR934X_HW_ECC)) { - dev_err(nfc->parent, "hardware ECC support is disabled\n"); - return -EINVAL; - } - - switch (nfc->mtd.writesize) { - case 2048: - /* - * Writing a subpage separately is not supported, because - * the controller only does ECC on full-page accesses. - */ - nand->options = NAND_NO_SUBPAGE_WRITE; - - nand->ecc.size = 512; - nand->ecc.bytes = 7; - nand->ecc.strength = 4; - nand->ecc.layout = &ar934x_nfc_oob_64_hwecc; - break; - - default: - dev_err(nfc->parent, - "hardware ECC is not available for %d byte pages\n", - nfc->mtd.writesize); - return -EINVAL; - } - - BUG_ON(!nand->ecc.layout); - - switch (nand->ecc.strength) { - case 4: - ecc_cap = AR934X_NFC_ECC_CTRL_ECC_CAP_4; - ecc_thres = 4; - break; - - default: - dev_err(nfc->parent, "unsupported ECC strength %u\n", - nand->ecc.strength); - return -EINVAL; - } - - nfc->ecc_thres = ecc_thres; - nfc->ecc_oob_pos = nand->ecc.layout->eccpos[0]; - - nfc->ecc_ctrl_reg = ecc_cap << AR934X_NFC_ECC_CTRL_ECC_CAP_S; - nfc->ecc_ctrl_reg |= ecc_thres << AR934X_NFC_ECC_CTRL_ERR_THRES_S; - - nfc->ecc_offset_reg = nfc->mtd.writesize + nfc->ecc_oob_pos; - - nand->ecc.mode = NAND_ECC_HW; - nand->ecc.read_page = ar934x_nfc_read_page; - nand->ecc.read_page_raw = ar934x_nfc_read_page_raw; - nand->ecc.write_page = ar934x_nfc_write_page; - nand->ecc.write_page_raw = ar934x_nfc_write_page_raw; - nand->ecc.read_oob = ar934x_nfc_read_oob; - nand->ecc.write_oob = ar934x_nfc_write_oob; - - return 0; -} - -static int -ar934x_nfc_probe(struct platform_device *pdev) -{ - static const char *part_probes[] = { "cmdlinepart", NULL, }; - struct ar934x_nfc_platform_data *pdata; - struct ar934x_nfc *nfc; - struct resource *res; - struct mtd_info *mtd; - struct nand_chip *nand; - struct mtd_part_parser_data ppdata; - int ret; - - pdata = pdev->dev.platform_data; - if (pdata == NULL) { - dev_err(&pdev->dev, "no platform data defined\n"); - return -EINVAL; - } - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "failed to get I/O memory\n"); - return -EINVAL; - } - - nfc = devm_kzalloc(&pdev->dev, sizeof(struct ar934x_nfc), GFP_KERNEL); - if (!nfc) { - dev_err(&pdev->dev, "failed to allocate driver data\n"); - return -ENOMEM; - } - - nfc->base = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(nfc->base)) { - dev_err(&pdev->dev, "failed to remap I/O memory\n"); - return PTR_ERR(nfc->base); - } - - nfc->irq = platform_get_irq(pdev, 0); - if (nfc->irq < 0) { - dev_err(&pdev->dev, "no IRQ resource specified\n"); - return -EINVAL; - } - - init_waitqueue_head(&nfc->irq_waitq); - ret = request_irq(nfc->irq, ar934x_nfc_irq_handler, IRQF_DISABLED, - dev_name(&pdev->dev), nfc); - if (ret) { - dev_err(&pdev->dev, "requast_irq failed, err:%d\n", ret); - return ret; - } - - nfc->parent = &pdev->dev; - nfc->select_chip = pdata->select_chip; - nfc->swap_dma = pdata->swap_dma; - - nand = &nfc->nand_chip; - mtd = &nfc->mtd; - - mtd->priv = nand; - mtd->owner = THIS_MODULE; - if (pdata->name) - mtd->name = pdata->name; - else - mtd->name = dev_name(&pdev->dev); - - nand->chip_delay = 25; - - nand->dev_ready = ar934x_nfc_dev_ready; - nand->cmdfunc = ar934x_nfc_cmdfunc; - nand->read_byte = ar934x_nfc_read_byte; - nand->write_buf = ar934x_nfc_write_buf; - nand->read_buf = ar934x_nfc_read_buf; - nand->select_chip = ar934x_nfc_select_chip; - - ret = ar934x_nfc_alloc_buf(nfc, AR934X_NFC_ID_BUF_SIZE); - if (ret) - goto err_free_irq; - - platform_set_drvdata(pdev, nfc); - - ar934x_nfc_hw_init(nfc); - - ret = nand_scan_ident(mtd, 1, NULL); - if (ret) { - dev_err(&pdev->dev, "nand_scan_ident failed, err:%d\n", ret); - goto err_free_buf; - } - - ret = ar934x_nfc_init_tail(mtd); - if (ret) { - dev_err(&pdev->dev, "init tail failed, err:%d\n", ret); - goto err_free_buf; - } - - if (pdata->scan_fixup) { - ret = pdata->scan_fixup(mtd); - if (ret) - goto err_free_buf; - } - - switch (pdata->ecc_mode) { - case AR934X_NFC_ECC_SOFT: - nand->ecc.mode = NAND_ECC_SOFT; - break; - - case AR934X_NFC_ECC_HW: - ret = ar934x_nfc_setup_hwecc(nfc); - if (ret) - goto err_free_buf; - - break; - - default: - dev_err(nfc->parent, "unknown ECC mode %d\n", pdata->ecc_mode); - return -EINVAL; - } - - ret = nand_scan_tail(mtd); - if (ret) { - dev_err(&pdev->dev, "scan tail failed, err:%d\n", ret); - goto err_free_buf; - } - - memset(&ppdata, '\0', sizeof(ppdata)); - ret = mtd_device_parse_register(mtd, part_probes, &ppdata, - pdata->parts, pdata->nr_parts); - if (ret) { - dev_err(&pdev->dev, "unable to register mtd, err:%d\n", ret); - goto err_free_buf; - } - - return 0; - -err_free_buf: - ar934x_nfc_free_buf(nfc); -err_free_irq: - free_irq(nfc->irq, nfc); - return ret; -} - -static int -ar934x_nfc_remove(struct platform_device *pdev) -{ - struct ar934x_nfc *nfc; - - nfc = platform_get_drvdata(pdev); - if (nfc) { - nand_release(&nfc->mtd); - ar934x_nfc_free_buf(nfc); - free_irq(nfc->irq, nfc); - } - - return 0; -} - -static struct platform_driver ar934x_nfc_driver = { - .probe = ar934x_nfc_probe, - .remove = ar934x_nfc_remove, - .driver = { - .name = AR934X_NFC_DRIVER_NAME, - .owner = THIS_MODULE, - }, -}; - -module_platform_driver(ar934x_nfc_driver); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_DESCRIPTION("Atheros AR934x NAND Flash Controller driver"); -MODULE_ALIAS("platform:" AR934X_NFC_DRIVER_NAME); diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/rb4xx_nand.c b/target/linux/ar71xx/files/drivers/mtd/nand/rb4xx_nand.c deleted file mode 100644 index 5b9841b..0000000 --- a/target/linux/ar71xx/files/drivers/mtd/nand/rb4xx_nand.c +++ /dev/null @@ -1,305 +0,0 @@ -/* - * NAND flash driver for the MikroTik RouterBoard 4xx series - * - * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * This file was based on the driver for Linux 2.6.22 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/slab.h> - -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/rb4xx_cpld.h> - -#define DRV_NAME "rb4xx-nand" -#define DRV_VERSION "0.2.0" -#define DRV_DESC "NAND flash driver for RouterBoard 4xx series" - -#define RB4XX_NAND_GPIO_READY 5 -#define RB4XX_NAND_GPIO_ALE 37 -#define RB4XX_NAND_GPIO_CLE 38 -#define RB4XX_NAND_GPIO_NCE 39 - -struct rb4xx_nand_info { - struct nand_chip chip; - struct mtd_info mtd; -}; - -/* - * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader - * will not be able to find the kernel that we load. - */ -static struct nand_ecclayout rb4xx_nand_ecclayout = { - .eccbytes = 6, - .eccpos = { 8, 9, 10, 13, 14, 15 }, - .oobavail = 9, - .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -}; - -static struct mtd_partition rb4xx_nand_partitions[] = { - { - .name = "booter", - .offset = 0, - .size = (256 * 1024), - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "kernel", - .offset = (256 * 1024), - .size = (4 * 1024 * 1024) - (256 * 1024), - }, - { - .name = "rootfs", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, - }, -}; - -static int rb4xx_nand_dev_ready(struct mtd_info *mtd) -{ - return gpio_get_value_cansleep(RB4XX_NAND_GPIO_READY); -} - -static void rb4xx_nand_write_cmd(unsigned char cmd) -{ - unsigned char data = cmd; - int err; - - err = rb4xx_cpld_write(&data, 1); - if (err) - pr_err("rb4xx_nand: write cmd failed, err=%d\n", err); -} - -static void rb4xx_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, - unsigned int ctrl) -{ - if (ctrl & NAND_CTRL_CHANGE) { - gpio_set_value_cansleep(RB4XX_NAND_GPIO_CLE, - (ctrl & NAND_CLE) ? 1 : 0); - gpio_set_value_cansleep(RB4XX_NAND_GPIO_ALE, - (ctrl & NAND_ALE) ? 1 : 0); - gpio_set_value_cansleep(RB4XX_NAND_GPIO_NCE, - (ctrl & NAND_NCE) ? 0 : 1); - } - - if (cmd != NAND_CMD_NONE) - rb4xx_nand_write_cmd(cmd); -} - -static unsigned char rb4xx_nand_read_byte(struct mtd_info *mtd) -{ - unsigned char data = 0; - int err; - - err = rb4xx_cpld_read(&data, NULL, 1); - if (err) { - pr_err("rb4xx_nand: read data failed, err=%d\n", err); - data = 0xff; - } - - return data; -} - -static void rb4xx_nand_write_buf(struct mtd_info *mtd, const unsigned char *buf, - int len) -{ - int err; - - err = rb4xx_cpld_write(buf, len); - if (err) - pr_err("rb4xx_nand: write buf failed, err=%d\n", err); -} - -static void rb4xx_nand_read_buf(struct mtd_info *mtd, unsigned char *buf, - int len) -{ - int err; - - err = rb4xx_cpld_read(buf, NULL, len); - if (err) - pr_err("rb4xx_nand: read buf failed, err=%d\n", err); -} - -static int rb4xx_nand_probe(struct platform_device *pdev) -{ - struct rb4xx_nand_info *info; - int ret; - - printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n"); - - ret = gpio_request(RB4XX_NAND_GPIO_READY, "NAND RDY"); - if (ret) { - dev_err(&pdev->dev, "unable to request gpio %d\n", - RB4XX_NAND_GPIO_READY); - goto err; - } - - ret = gpio_direction_input(RB4XX_NAND_GPIO_READY); - if (ret) { - dev_err(&pdev->dev, "unable to set input mode on gpio %d\n", - RB4XX_NAND_GPIO_READY); - goto err_free_gpio_ready; - } - - ret = gpio_request(RB4XX_NAND_GPIO_ALE, "NAND ALE"); - if (ret) { - dev_err(&pdev->dev, "unable to request gpio %d\n", - RB4XX_NAND_GPIO_ALE); - goto err_free_gpio_ready; - } - - ret = gpio_direction_output(RB4XX_NAND_GPIO_ALE, 0); - if (ret) { - dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", - RB4XX_NAND_GPIO_ALE); - goto err_free_gpio_ale; - } - - ret = gpio_request(RB4XX_NAND_GPIO_CLE, "NAND CLE"); - if (ret) { - dev_err(&pdev->dev, "unable to request gpio %d\n", - RB4XX_NAND_GPIO_CLE); - goto err_free_gpio_ale; - } - - ret = gpio_direction_output(RB4XX_NAND_GPIO_CLE, 0); - if (ret) { - dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", - RB4XX_NAND_GPIO_CLE); - goto err_free_gpio_cle; - } - - ret = gpio_request(RB4XX_NAND_GPIO_NCE, "NAND NCE"); - if (ret) { - dev_err(&pdev->dev, "unable to request gpio %d\n", - RB4XX_NAND_GPIO_NCE); - goto err_free_gpio_cle; - } - - ret = gpio_direction_output(RB4XX_NAND_GPIO_NCE, 1); - if (ret) { - dev_err(&pdev->dev, "unable to set output mode on gpio %d\n", - RB4XX_NAND_GPIO_ALE); - goto err_free_gpio_nce; - } - - info = kzalloc(sizeof(*info), GFP_KERNEL); - if (!info) { - dev_err(&pdev->dev, "rb4xx-nand: no memory for private data\n"); - ret = -ENOMEM; - goto err_free_gpio_nce; - } - - info->chip.priv = &info; - info->mtd.priv = &info->chip; - info->mtd.owner = THIS_MODULE; - - info->chip.cmd_ctrl = rb4xx_nand_cmd_ctrl; - info->chip.dev_ready = rb4xx_nand_dev_ready; - info->chip.read_byte = rb4xx_nand_read_byte; - info->chip.write_buf = rb4xx_nand_write_buf; - info->chip.read_buf = rb4xx_nand_read_buf; - - info->chip.chip_delay = 25; - info->chip.ecc.mode = NAND_ECC_SOFT; - - platform_set_drvdata(pdev, info); - - ret = nand_scan_ident(&info->mtd, 1, NULL); - if (ret) { - ret = -ENXIO; - goto err_free_info; - } - - if (info->mtd.writesize == 512) - info->chip.ecc.layout = &rb4xx_nand_ecclayout; - - ret = nand_scan_tail(&info->mtd); - if (ret) { - return -ENXIO; - goto err_set_drvdata; - } - - mtd_device_register(&info->mtd, rb4xx_nand_partitions, - ARRAY_SIZE(rb4xx_nand_partitions)); - if (ret) - goto err_release_nand; - - return 0; - -err_release_nand: - nand_release(&info->mtd); -err_set_drvdata: - platform_set_drvdata(pdev, NULL); -err_free_info: - kfree(info); -err_free_gpio_nce: - gpio_free(RB4XX_NAND_GPIO_NCE); -err_free_gpio_cle: - gpio_free(RB4XX_NAND_GPIO_CLE); -err_free_gpio_ale: - gpio_free(RB4XX_NAND_GPIO_ALE); -err_free_gpio_ready: - gpio_free(RB4XX_NAND_GPIO_READY); -err: - return ret; -} - -static int rb4xx_nand_remove(struct platform_device *pdev) -{ - struct rb4xx_nand_info *info = platform_get_drvdata(pdev); - - nand_release(&info->mtd); - platform_set_drvdata(pdev, NULL); - kfree(info); - gpio_free(RB4XX_NAND_GPIO_NCE); - gpio_free(RB4XX_NAND_GPIO_CLE); - gpio_free(RB4XX_NAND_GPIO_ALE); - gpio_free(RB4XX_NAND_GPIO_READY); - - return 0; -} - -static struct platform_driver rb4xx_nand_driver = { - .probe = rb4xx_nand_probe, - .remove = rb4xx_nand_remove, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init rb4xx_nand_init(void) -{ - return platform_driver_register(&rb4xx_nand_driver); -} - -static void __exit rb4xx_nand_exit(void) -{ - platform_driver_unregister(&rb4xx_nand_driver); -} - -module_init(rb4xx_nand_init); -module_exit(rb4xx_nand_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c b/target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c deleted file mode 100644 index a20409b..0000000 --- a/target/linux/ar71xx/files/drivers/mtd/nand/rb750_nand.c +++ /dev/null @@ -1,354 +0,0 @@ -/* - * NAND flash driver for the MikroTik RouterBOARD 750 - * - * Copyright (C) 2010-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/slab.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/mach-rb750.h> - -#define DRV_NAME "rb750-nand" -#define DRV_VERSION "0.1.0" -#define DRV_DESC "NAND flash driver for the RouterBOARD 750" - -#define RB750_NAND_IO0 BIT(RB750_GPIO_NAND_IO0) -#define RB750_NAND_ALE BIT(RB750_GPIO_NAND_ALE) -#define RB750_NAND_CLE BIT(RB750_GPIO_NAND_CLE) -#define RB750_NAND_NRE BIT(RB750_GPIO_NAND_NRE) -#define RB750_NAND_NWE BIT(RB750_GPIO_NAND_NWE) -#define RB750_NAND_RDY BIT(RB750_GPIO_NAND_RDY) - -#define RB750_NAND_DATA_SHIFT 1 -#define RB750_NAND_DATA_BITS (0xff << RB750_NAND_DATA_SHIFT) -#define RB750_NAND_INPUT_BITS (RB750_NAND_DATA_BITS | RB750_NAND_RDY) -#define RB750_NAND_OUTPUT_BITS (RB750_NAND_ALE | RB750_NAND_CLE | \ - RB750_NAND_NRE | RB750_NAND_NWE) - -struct rb750_nand_info { - struct nand_chip chip; - struct mtd_info mtd; - struct rb7xx_nand_platform_data *pdata; -}; - -static inline struct rb750_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) -{ - return container_of(mtd, struct rb750_nand_info, mtd); -} - -/* - * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader - * will not be able to find the kernel that we load. - */ -static struct nand_ecclayout rb750_nand_ecclayout = { - .eccbytes = 6, - .eccpos = { 8, 9, 10, 13, 14, 15 }, - .oobavail = 9, - .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -}; - -static struct mtd_partition rb750_nand_partitions[] = { - { - .name = "booter", - .offset = 0, - .size = (256 * 1024), - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = (256 * 1024), - .size = (4 * 1024 * 1024) - (256 * 1024), - }, { - .name = "rootfs", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, - }, -}; - -static void rb750_nand_write(const u8 *buf, unsigned len) -{ - void __iomem *base = ath79_gpio_base; - u32 out; - u32 t; - unsigned i; - - /* set data lines to output mode */ - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(t | RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); - - out = __raw_readl(base + AR71XX_GPIO_REG_OUT); - out &= ~(RB750_NAND_DATA_BITS | RB750_NAND_NWE); - for (i = 0; i != len; i++) { - u32 data; - - data = buf[i]; - data <<= RB750_NAND_DATA_SHIFT; - data |= out; - __raw_writel(data, base + AR71XX_GPIO_REG_OUT); - - __raw_writel(data | RB750_NAND_NWE, base + AR71XX_GPIO_REG_OUT); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_OUT); - } - - /* set data lines to input mode */ - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(t & ~RB750_NAND_DATA_BITS, base + AR71XX_GPIO_REG_OE); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_OE); -} - -static void rb750_nand_read(u8 *read_buf, unsigned len) -{ - void __iomem *base = ath79_gpio_base; - unsigned i; - - for (i = 0; i < len; i++) { - u8 data; - - /* activate RE line */ - __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_CLEAR); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_CLEAR); - - /* read input lines */ - data = __raw_readl(base + AR71XX_GPIO_REG_IN) >> - RB750_NAND_DATA_SHIFT; - - /* deactivate RE line */ - __raw_writel(RB750_NAND_NRE, base + AR71XX_GPIO_REG_SET); - - read_buf[i] = data; - } -} - -static void rb750_nand_select_chip(struct mtd_info *mtd, int chip) -{ - struct rb750_nand_info *rbinfo = mtd_to_rbinfo(mtd); - void __iomem *base = ath79_gpio_base; - u32 t; - - if (chip >= 0) { - rbinfo->pdata->enable_pins(); - - /* set input mode for data lines */ - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(t & ~RB750_NAND_INPUT_BITS, - base + AR71XX_GPIO_REG_OE); - - /* deactivate RE and WE lines */ - __raw_writel(RB750_NAND_NRE | RB750_NAND_NWE, - base + AR71XX_GPIO_REG_SET); - /* flush write */ - (void) __raw_readl(base + AR71XX_GPIO_REG_SET); - - /* activate CE line */ - __raw_writel(rbinfo->pdata->nce_line, - base + AR71XX_GPIO_REG_CLEAR); - } else { - /* deactivate CE line */ - __raw_writel(rbinfo->pdata->nce_line, - base + AR71XX_GPIO_REG_SET); - /* flush write */ - (void) __raw_readl(base + AR71XX_GPIO_REG_SET); - - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(t | RB750_NAND_IO0 | RB750_NAND_RDY, - base + AR71XX_GPIO_REG_OE); - - rbinfo->pdata->disable_pins(); - } -} - -static int rb750_nand_dev_ready(struct mtd_info *mtd) -{ - void __iomem *base = ath79_gpio_base; - - return !!(__raw_readl(base + AR71XX_GPIO_REG_IN) & RB750_NAND_RDY); -} - -static void rb750_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, - unsigned int ctrl) -{ - if (ctrl & NAND_CTRL_CHANGE) { - void __iomem *base = ath79_gpio_base; - u32 t; - - t = __raw_readl(base + AR71XX_GPIO_REG_OUT); - - t &= ~(RB750_NAND_CLE | RB750_NAND_ALE); - t |= (ctrl & NAND_CLE) ? RB750_NAND_CLE : 0; - t |= (ctrl & NAND_ALE) ? RB750_NAND_ALE : 0; - - __raw_writel(t, base + AR71XX_GPIO_REG_OUT); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_OUT); - } - - if (cmd != NAND_CMD_NONE) { - u8 t = cmd; - rb750_nand_write(&t, 1); - } -} - -static u8 rb750_nand_read_byte(struct mtd_info *mtd) -{ - u8 data = 0; - rb750_nand_read(&data, 1); - return data; -} - -static void rb750_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) -{ - rb750_nand_read(buf, len); -} - -static void rb750_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) -{ - rb750_nand_write(buf, len); -} - -static void __init rb750_nand_gpio_init(struct rb750_nand_info *info) -{ - void __iomem *base = ath79_gpio_base; - u32 out; - u32 t; - - out = __raw_readl(base + AR71XX_GPIO_REG_OUT); - - /* setup output levels */ - __raw_writel(RB750_NAND_NCE | RB750_NAND_NRE | RB750_NAND_NWE, - base + AR71XX_GPIO_REG_SET); - - __raw_writel(RB750_NAND_ALE | RB750_NAND_CLE, - base + AR71XX_GPIO_REG_CLEAR); - - /* setup input lines */ - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(t & ~(RB750_NAND_INPUT_BITS), base + AR71XX_GPIO_REG_OE); - - /* setup output lines */ - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - t |= RB750_NAND_OUTPUT_BITS; - t |= info->pdata->nce_line; - __raw_writel(t, base + AR71XX_GPIO_REG_OE); - - info->pdata->latch_change(~out & RB750_NAND_IO0, out & RB750_NAND_IO0); -} - -static int rb750_nand_probe(struct platform_device *pdev) -{ - struct rb750_nand_info *info; - struct rb7xx_nand_platform_data *pdata; - int ret; - - printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n"); - - pdata = pdev->dev.platform_data; - if (!pdata) - return -EINVAL; - - info = kzalloc(sizeof(*info), GFP_KERNEL); - if (!info) - return -ENOMEM; - - info->chip.priv = &info; - info->mtd.priv = &info->chip; - info->mtd.owner = THIS_MODULE; - - info->chip.select_chip = rb750_nand_select_chip; - info->chip.cmd_ctrl = rb750_nand_cmd_ctrl; - info->chip.dev_ready = rb750_nand_dev_ready; - info->chip.read_byte = rb750_nand_read_byte; - info->chip.write_buf = rb750_nand_write_buf; - info->chip.read_buf = rb750_nand_read_buf; - - info->chip.chip_delay = 25; - info->chip.ecc.mode = NAND_ECC_SOFT; - - info->pdata = pdata; - - platform_set_drvdata(pdev, info); - - rb750_nand_gpio_init(info); - - ret = nand_scan_ident(&info->mtd, 1, NULL); - if (ret) { - ret = -ENXIO; - goto err_free_info; - } - - if (info->mtd.writesize == 512) - info->chip.ecc.layout = &rb750_nand_ecclayout; - - ret = nand_scan_tail(&info->mtd); - if (ret) { - return -ENXIO; - goto err_set_drvdata; - } - - ret = mtd_device_register(&info->mtd, rb750_nand_partitions, - ARRAY_SIZE(rb750_nand_partitions)); - if (ret) - goto err_release_nand; - - return 0; - -err_release_nand: - nand_release(&info->mtd); -err_set_drvdata: - platform_set_drvdata(pdev, NULL); -err_free_info: - kfree(info); - return ret; -} - -static int rb750_nand_remove(struct platform_device *pdev) -{ - struct rb750_nand_info *info = platform_get_drvdata(pdev); - - nand_release(&info->mtd); - platform_set_drvdata(pdev, NULL); - kfree(info); - - return 0; -} - -static struct platform_driver rb750_nand_driver = { - .probe = rb750_nand_probe, - .remove = rb750_nand_remove, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init rb750_nand_init(void) -{ - return platform_driver_register(&rb750_nand_driver); -} - -static void __exit rb750_nand_exit(void) -{ - platform_driver_unregister(&rb750_nand_driver); -} - -module_init(rb750_nand_init); -module_exit(rb750_nand_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c b/target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c deleted file mode 100644 index f0aa3c3..0000000 --- a/target/linux/ar71xx/files/drivers/mtd/nand/rb91x_nand.c +++ /dev/null @@ -1,377 +0,0 @@ -/* - * NAND flash driver for the MikroTik RouterBOARD 91x series - * - * Copyright (C) 2013-2014 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/spinlock.h> -#include <linux/module.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/gpio.h> -#include <linux/platform_data/rb91x_nand.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#define DRV_DESC "NAND flash driver for the RouterBOARD 91x series" - -#define RB91X_NAND_NRWE BIT(12) - -#define RB91X_NAND_DATA_BITS (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) |\ - BIT(13) | BIT(14) | BIT(15)) - -#define RB91X_NAND_INPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_RDY) -#define RB91X_NAND_OUTPUT_BITS (RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE) - -#define RB91X_NAND_LOW_DATA_MASK 0x1f -#define RB91X_NAND_HIGH_DATA_MASK 0xe0 -#define RB91X_NAND_HIGH_DATA_SHIFT 8 - -struct rb91x_nand_info { - struct nand_chip chip; - struct mtd_info mtd; - struct device *dev; - - int gpio_nce; - int gpio_ale; - int gpio_cle; - int gpio_rdy; - int gpio_read; - int gpio_nrw; - int gpio_nle; -}; - -static inline struct rb91x_nand_info *mtd_to_rbinfo(struct mtd_info *mtd) -{ - return container_of(mtd, struct rb91x_nand_info, mtd); -} - -/* - * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader - * will not be able to find the kernel that we load. - */ -static struct nand_ecclayout rb91x_nand_ecclayout = { - .eccbytes = 6, - .eccpos = { 8, 9, 10, 13, 14, 15 }, - .oobavail = 9, - .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -}; - -static struct mtd_partition rb91x_nand_partitions[] = { - { - .name = "booter", - .offset = 0, - .size = (256 * 1024), - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = (256 * 1024), - .size = (4 * 1024 * 1024) - (256 * 1024), - }, { - .name = "rootfs", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL, - }, -}; - -static void rb91x_nand_write(struct rb91x_nand_info *rbni, - const u8 *buf, - unsigned len) -{ - void __iomem *base = ath79_gpio_base; - u32 oe_reg; - u32 out_reg; - u32 out; - unsigned i; - - /* enable the latch */ - gpio_set_value_cansleep(rbni->gpio_nle, 0); - - oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); - out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); - - /* set data lines to output mode */ - __raw_writel(oe_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE), - base + AR71XX_GPIO_REG_OE); - - out = out_reg & ~(RB91X_NAND_DATA_BITS | RB91X_NAND_NRWE); - for (i = 0; i != len; i++) { - u32 data; - - data = (buf[i] & RB91X_NAND_HIGH_DATA_MASK) << - RB91X_NAND_HIGH_DATA_SHIFT; - data |= buf[i] & RB91X_NAND_LOW_DATA_MASK; - data |= out; - __raw_writel(data, base + AR71XX_GPIO_REG_OUT); - - /* deactivate WE line */ - data |= RB91X_NAND_NRWE; - __raw_writel(data, base + AR71XX_GPIO_REG_OUT); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_OUT); - } - - /* restore registers */ - __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); - __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_OUT); - - /* disable the latch */ - gpio_set_value_cansleep(rbni->gpio_nle, 1); -} - -static void rb91x_nand_read(struct rb91x_nand_info *rbni, - u8 *read_buf, - unsigned len) -{ - void __iomem *base = ath79_gpio_base; - u32 oe_reg; - u32 out_reg; - unsigned i; - - /* enable read mode */ - gpio_set_value_cansleep(rbni->gpio_read, 1); - - /* enable latch */ - gpio_set_value_cansleep(rbni->gpio_nle, 0); - - /* save registers */ - oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); - out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); - - /* set data lines to input mode */ - __raw_writel(oe_reg | RB91X_NAND_DATA_BITS, - base + AR71XX_GPIO_REG_OE); - - for (i = 0; i < len; i++) { - u32 in; - u8 data; - - /* activate RE line */ - __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_CLEAR); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_CLEAR); - - /* read input lines */ - in = __raw_readl(base + AR71XX_GPIO_REG_IN); - - /* deactivate RE line */ - __raw_writel(RB91X_NAND_NRWE, base + AR71XX_GPIO_REG_SET); - - data = (in & RB91X_NAND_LOW_DATA_MASK); - data |= (in >> RB91X_NAND_HIGH_DATA_SHIFT) & - RB91X_NAND_HIGH_DATA_MASK; - - read_buf[i] = data; - } - - /* restore registers */ - __raw_writel(out_reg, base + AR71XX_GPIO_REG_OUT); - __raw_writel(oe_reg, base + AR71XX_GPIO_REG_OE); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_OUT); - - /* disable latch */ - gpio_set_value_cansleep(rbni->gpio_nle, 1); - - /* disable read mode */ - gpio_set_value_cansleep(rbni->gpio_read, 0); -} - -static int rb91x_nand_dev_ready(struct mtd_info *mtd) -{ - struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); - - return gpio_get_value_cansleep(rbni->gpio_rdy); -} - -static void rb91x_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, - unsigned int ctrl) -{ - struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); - - if (ctrl & NAND_CTRL_CHANGE) { - gpio_set_value_cansleep(rbni->gpio_cle, - (ctrl & NAND_CLE) ? 1 : 0); - gpio_set_value_cansleep(rbni->gpio_ale, - (ctrl & NAND_ALE) ? 1 : 0); - gpio_set_value_cansleep(rbni->gpio_nce, - (ctrl & NAND_NCE) ? 0 : 1); - } - - if (cmd != NAND_CMD_NONE) { - u8 t = cmd; - - rb91x_nand_write(rbni, &t, 1); - } -} - -static u8 rb91x_nand_read_byte(struct mtd_info *mtd) -{ - struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); - u8 data = 0xff; - - rb91x_nand_read(rbni, &data, 1); - - return data; -} - -static void rb91x_nand_read_buf(struct mtd_info *mtd, u8 *buf, int len) -{ - struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); - - rb91x_nand_read(rbni, buf, len); -} - -static void rb91x_nand_write_buf(struct mtd_info *mtd, const u8 *buf, int len) -{ - struct rb91x_nand_info *rbni = mtd_to_rbinfo(mtd); - - rb91x_nand_write(rbni, buf, len); -} - -static int rb91x_nand_gpio_init(struct rb91x_nand_info *info) -{ - int ret; - - /* - * Ensure that the LATCH is disabled before initializing - * control lines. - */ - ret = devm_gpio_request_one(info->dev, info->gpio_nle, - GPIOF_OUT_INIT_HIGH, "LATCH enable"); - if (ret) - return ret; - - ret = devm_gpio_request_one(info->dev, info->gpio_nce, - GPIOF_OUT_INIT_HIGH, "NAND nCE"); - if (ret) - return ret; - - ret = devm_gpio_request_one(info->dev, info->gpio_nrw, - GPIOF_OUT_INIT_HIGH, "NAND nRW"); - if (ret) - return ret; - - ret = devm_gpio_request_one(info->dev, info->gpio_cle, - GPIOF_OUT_INIT_LOW, "NAND CLE"); - if (ret) - return ret; - - ret = devm_gpio_request_one(info->dev, info->gpio_ale, - GPIOF_OUT_INIT_LOW, "NAND ALE"); - if (ret) - return ret; - - ret = devm_gpio_request_one(info->dev, info->gpio_read, - GPIOF_OUT_INIT_LOW, "NAND READ"); - if (ret) - return ret; - - ret = devm_gpio_request_one(info->dev, info->gpio_rdy, - GPIOF_IN, "NAND RDY"); - return ret; -} - -static int rb91x_nand_probe(struct platform_device *pdev) -{ - struct rb91x_nand_info *rbni; - struct rb91x_nand_platform_data *pdata; - int ret; - - pr_info(DRV_DESC "\n"); - - pdata = dev_get_platdata(&pdev->dev); - if (!pdata) - return -EINVAL; - - rbni = devm_kzalloc(&pdev->dev, sizeof(*rbni), GFP_KERNEL); - if (!rbni) - return -ENOMEM; - - rbni->dev = &pdev->dev; - rbni->gpio_nce = pdata->gpio_nce; - rbni->gpio_ale = pdata->gpio_ale; - rbni->gpio_cle = pdata->gpio_cle; - rbni->gpio_read = pdata->gpio_read; - rbni->gpio_nrw = pdata->gpio_nrw; - rbni->gpio_rdy = pdata->gpio_rdy; - rbni->gpio_nle = pdata->gpio_nle; - - rbni->chip.priv = &rbni; - rbni->mtd.priv = &rbni->chip; - rbni->mtd.owner = THIS_MODULE; - - rbni->chip.cmd_ctrl = rb91x_nand_cmd_ctrl; - rbni->chip.dev_ready = rb91x_nand_dev_ready; - rbni->chip.read_byte = rb91x_nand_read_byte; - rbni->chip.write_buf = rb91x_nand_write_buf; - rbni->chip.read_buf = rb91x_nand_read_buf; - - rbni->chip.chip_delay = 25; - rbni->chip.ecc.mode = NAND_ECC_SOFT; - - platform_set_drvdata(pdev, rbni); - - ret = rb91x_nand_gpio_init(rbni); - if (ret) - return ret; - - ret = nand_scan_ident(&rbni->mtd, 1, NULL); - if (ret) - return ret; - - if (rbni->mtd.writesize == 512) - rbni->chip.ecc.layout = &rb91x_nand_ecclayout; - - ret = nand_scan_tail(&rbni->mtd); - if (ret) - return ret; - - ret = mtd_device_register(&rbni->mtd, rb91x_nand_partitions, - ARRAY_SIZE(rb91x_nand_partitions)); - if (ret) - goto err_release_nand; - - return 0; - -err_release_nand: - nand_release(&rbni->mtd); - return ret; -} - -static int rb91x_nand_remove(struct platform_device *pdev) -{ - struct rb91x_nand_info *info = platform_get_drvdata(pdev); - - nand_release(&info->mtd); - - return 0; -} - -static struct platform_driver rb91x_nand_driver = { - .probe = rb91x_nand_probe, - .remove = rb91x_nand_remove, - .driver = { - .name = RB91X_NAND_DRIVER_NAME, - .owner = THIS_MODULE, - }, -}; - -module_platform_driver(rb91x_nand_driver); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/mtd/tplinkpart.c b/target/linux/ar71xx/files/drivers/mtd/tplinkpart.c deleted file mode 100644 index ab952b6..0000000 --- a/target/linux/ar71xx/files/drivers/mtd/tplinkpart.c +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/slab.h> -#include <linux/vmalloc.h> -#include <linux/magic.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -#define TPLINK_NUM_PARTS 5 -#define TPLINK_HEADER_V1 0x01000000 -#define MD5SUM_LEN 16 - -#define TPLINK_ART_LEN 0x10000 -#define TPLINK_KERNEL_OFFS 0x20000 - -struct tplink_fw_header { - uint32_t version; /* header version */ - char vendor_name[24]; - char fw_version[36]; - uint32_t hw_id; /* hardware id */ - uint32_t hw_rev; /* hardware revision */ - uint32_t unk1; - uint8_t md5sum1[MD5SUM_LEN]; - uint32_t unk2; - uint8_t md5sum2[MD5SUM_LEN]; - uint32_t unk3; - uint32_t kernel_la; /* kernel load address */ - uint32_t kernel_ep; /* kernel entry point */ - uint32_t fw_length; /* total length of the firmware */ - uint32_t kernel_ofs; /* kernel data offset */ - uint32_t kernel_len; /* kernel data length */ - uint32_t rootfs_ofs; /* rootfs data offset */ - uint32_t rootfs_len; /* rootfs data length */ - uint32_t boot_ofs; /* bootloader data offset */ - uint32_t boot_len; /* bootloader data length */ - uint8_t pad[360]; -} __attribute__ ((packed)); - -static struct tplink_fw_header * -tplink_read_header(struct mtd_info *mtd, size_t offset) -{ - struct tplink_fw_header *header; - size_t header_len; - size_t retlen; - int ret; - u32 t; - - header = vmalloc(sizeof(*header)); - if (!header) - goto err; - - header_len = sizeof(struct tplink_fw_header); - ret = mtd_read(mtd, offset, header_len, &retlen, - (unsigned char *) header); - if (ret) - goto err_free_header; - - if (retlen != header_len) - goto err_free_header; - - /* sanity checks */ - t = be32_to_cpu(header->version); - if (t != TPLINK_HEADER_V1) - goto err_free_header; - - t = be32_to_cpu(header->kernel_ofs); - if (t != header_len) - goto err_free_header; - - return header; - -err_free_header: - vfree(header); -err: - return NULL; -} - -static int tplink_check_rootfs_magic(struct mtd_info *mtd, size_t offset) -{ - u32 magic; - size_t retlen; - int ret; - - ret = mtd_read(mtd, offset, sizeof(magic), &retlen, - (unsigned char *) &magic); - if (ret) - return ret; - - if (retlen != sizeof(magic)) - return -EIO; - - if (le32_to_cpu(magic) != SQUASHFS_MAGIC && - magic != 0x19852003) - return -EINVAL; - - return 0; -} - -static int tplink_parse_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -{ - struct mtd_partition *parts; - struct tplink_fw_header *header; - int nr_parts; - size_t offset; - size_t art_offset; - size_t rootfs_offset; - size_t squashfs_offset; - int ret; - - nr_parts = TPLINK_NUM_PARTS; - parts = kzalloc(nr_parts * sizeof(struct mtd_partition), GFP_KERNEL); - if (!parts) { - ret = -ENOMEM; - goto err; - } - - offset = TPLINK_KERNEL_OFFS; - - header = tplink_read_header(master, offset); - if (!header) { - pr_notice("%s: no TP-Link header found\n", master->name); - ret = -ENODEV; - goto err_free_parts; - } - - squashfs_offset = offset + sizeof(struct tplink_fw_header) + - be32_to_cpu(header->kernel_len); - - ret = tplink_check_rootfs_magic(master, squashfs_offset); - if (ret == 0) - rootfs_offset = squashfs_offset; - else - rootfs_offset = offset + be32_to_cpu(header->rootfs_ofs); - - art_offset = master->size - TPLINK_ART_LEN; - - parts[0].name = "u-boot"; - parts[0].offset = 0; - parts[0].size = offset; - parts[0].mask_flags = MTD_WRITEABLE; - - parts[1].name = "kernel"; - parts[1].offset = offset; - parts[1].size = rootfs_offset - offset; - - parts[2].name = "rootfs"; - parts[2].offset = rootfs_offset; - parts[2].size = art_offset - rootfs_offset; - - parts[3].name = "art"; - parts[3].offset = art_offset; - parts[3].size = TPLINK_ART_LEN; - parts[3].mask_flags = MTD_WRITEABLE; - - parts[4].name = "firmware"; - parts[4].offset = offset; - parts[4].size = art_offset - offset; - - vfree(header); - - *pparts = parts; - return nr_parts; - -err_free_parts: - kfree(parts); -err: - *pparts = NULL; - return ret; -} - -static struct mtd_part_parser tplink_parser = { - .owner = THIS_MODULE, - .parse_fn = tplink_parse_partitions, - .name = "tp-link", -}; - -static int __init tplink_parser_init(void) -{ - register_mtd_parser(&tplink_parser); - - return 0; -} - -module_init(tplink_parser_init); - -MODULE_LICENSE("GPL v2"); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); diff --git a/target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c b/target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c deleted file mode 100644 index 698bba8..0000000 --- a/target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Copyright (C) 2009 Christian Daniel <cd@maintech.de> - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - * - * TRX flash partition table. - * Based on ar7 map by Felix Fietkau <nbd@openwrt.org> - * - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/slab.h> -#include <linux/vmalloc.h> - -#include <linux/mtd/mtd.h> -#include <linux/mtd/partitions.h> - -struct cybertan_header { - char magic[4]; - u8 res1[4]; - char fw_date[3]; - char fw_ver[3]; - char id[4]; - char hw_ver; - char unused; - u8 flags[2]; - u8 res2[10]; -}; - -#define TRX_PARTS 6 -#define TRX_MAGIC 0x30524448 -#define TRX_MAX_OFFSET 3 - -struct trx_header { - uint32_t magic; /* "HDR0" */ - uint32_t len; /* Length of file including header */ - uint32_t crc32; /* 32-bit CRC from flag_version to end of file */ - uint32_t flag_version; /* 0:15 flags, 16:31 version */ - uint32_t offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */ -}; - -#define IH_MAGIC 0x27051956 /* Image Magic Number */ -#define IH_NMLEN 32 /* Image Name Length */ - -struct uimage_header { - uint32_t ih_magic; /* Image Header Magic Number */ - uint32_t ih_hcrc; /* Image Header CRC Checksum */ - uint32_t ih_time; /* Image Creation Timestamp */ - uint32_t ih_size; /* Image Data Size */ - uint32_t ih_load; /* Data» Load Address */ - uint32_t ih_ep; /* Entry Point Address */ - uint32_t ih_dcrc; /* Image Data CRC Checksum */ - uint8_t ih_os; /* Operating System */ - uint8_t ih_arch; /* CPU architecture */ - uint8_t ih_type; /* Image Type */ - uint8_t ih_comp; /* Compression Type */ - uint8_t ih_name[IH_NMLEN]; /* Image Name */ -}; - -struct wrt160nl_header { - struct cybertan_header cybertan; - struct trx_header trx; - struct uimage_header uimage; -} __attribute__ ((packed)); - -#define WRT160NL_UBOOT_LEN 0x40000 -#define WRT160NL_ART_LEN 0x10000 -#define WRT160NL_NVRAM_LEN 0x10000 - -static int wrt160nl_parse_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - struct mtd_part_parser_data *data) -{ - struct wrt160nl_header *header; - struct trx_header *theader; - struct uimage_header *uheader; - struct mtd_partition *trx_parts; - size_t retlen; - unsigned int kernel_len; - unsigned int uboot_len; - unsigned int nvram_len; - unsigned int art_len; - int ret; - - uboot_len = max_t(unsigned int, master->erasesize, WRT160NL_UBOOT_LEN); - nvram_len = max_t(unsigned int, master->erasesize, WRT160NL_NVRAM_LEN); - art_len = max_t(unsigned int, master->erasesize, WRT160NL_ART_LEN); - - trx_parts = kzalloc(TRX_PARTS * sizeof(struct mtd_partition), - GFP_KERNEL); - if (!trx_parts) { - ret = -ENOMEM; - goto out; - } - - header = vmalloc(sizeof(*header)); - if (!header) { - return -ENOMEM; - goto free_parts; - } - - ret = mtd_read(master, uboot_len, sizeof(*header), - &retlen, (void *) header); - if (ret) - goto free_hdr; - - if (retlen != sizeof(*header)) { - ret = -EIO; - goto free_hdr; - } - - if (strncmp(header->cybertan.magic, "NL16", 4) != 0) { - printk(KERN_NOTICE "%s: no WRT160NL signature found\n", - master->name); - goto free_hdr; - } - - theader = &header->trx; - if (le32_to_cpu(theader->magic) != TRX_MAGIC) { - printk(KERN_NOTICE "%s: no TRX header found\n", master->name); - goto free_hdr; - } - - uheader = &header->uimage; - if (uheader->ih_magic != IH_MAGIC) { - printk(KERN_NOTICE "%s: no uImage found\n", master->name); - goto free_hdr; - } - - kernel_len = le32_to_cpu(theader->offsets[1]) + - sizeof(struct cybertan_header); - - trx_parts[0].name = "u-boot"; - trx_parts[0].offset = 0; - trx_parts[0].size = uboot_len; - trx_parts[0].mask_flags = MTD_WRITEABLE; - - trx_parts[1].name = "kernel"; - trx_parts[1].offset = trx_parts[0].offset + trx_parts[0].size; - trx_parts[1].size = kernel_len; - trx_parts[1].mask_flags = 0; - - trx_parts[2].name = "rootfs"; - trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size; - trx_parts[2].size = master->size - uboot_len - nvram_len - art_len - - trx_parts[1].size; - trx_parts[2].mask_flags = 0; - - trx_parts[3].name = "nvram"; - trx_parts[3].offset = master->size - nvram_len - art_len; - trx_parts[3].size = nvram_len; - trx_parts[3].mask_flags = MTD_WRITEABLE; - - trx_parts[4].name = "art"; - trx_parts[4].offset = master->size - art_len; - trx_parts[4].size = art_len; - trx_parts[4].mask_flags = MTD_WRITEABLE; - - trx_parts[5].name = "firmware"; - trx_parts[5].offset = uboot_len; - trx_parts[5].size = master->size - uboot_len - nvram_len - art_len; - trx_parts[5].mask_flags = 0; - - vfree(header); - - *pparts = trx_parts; - return TRX_PARTS; - -free_hdr: - vfree(header); -free_parts: - kfree(trx_parts); -out: - return ret; -} - -static struct mtd_part_parser wrt160nl_parser = { - .owner = THIS_MODULE, - .parse_fn = wrt160nl_parse_partitions, - .name = "wrt160nl", -}; - -static int __init wrt160nl_parser_init(void) -{ - register_mtd_parser(&wrt160nl_parser); - - return 0; -} - -module_init(wrt160nl_parser_init); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Christian Daniel <cd@maintech.de>"); diff --git a/target/linux/ar71xx/files/drivers/net/dsa/mv88e6063.c b/target/linux/ar71xx/files/drivers/net/dsa/mv88e6063.c deleted file mode 100644 index b41eb54..0000000 --- a/target/linux/ar71xx/files/drivers/net/dsa/mv88e6063.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * net/dsa/mv88e6063.c - Driver for Marvell 88e6063 switch chips - * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This driver was base on: net/dsa/mv88e6060.c - * net/dsa/mv88e6063.c - Driver for Marvell 88e6060 switch chips - * Copyright (c) 2008-2009 Marvell Semiconductor - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/list.h> -#include <linux/netdevice.h> -#include <linux/phy.h> -#include <net/dsa.h> - -#define REG_BASE 0x10 -#define REG_PHY(p) (REG_BASE + (p)) -#define REG_PORT(p) (REG_BASE + 8 + (p)) -#define REG_GLOBAL (REG_BASE + 0x0f) -#define NUM_PORTS 7 - -static int reg_read(struct dsa_switch *ds, int addr, int reg) -{ - return mdiobus_read(ds->master_mii_bus, addr, reg); -} - -#define REG_READ(addr, reg) \ - ({ \ - int __ret; \ - \ - __ret = reg_read(ds, addr, reg); \ - if (__ret < 0) \ - return __ret; \ - __ret; \ - }) - - -static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) -{ - return mdiobus_write(ds->master_mii_bus, addr, reg, val); -} - -#define REG_WRITE(addr, reg, val) \ - ({ \ - int __ret; \ - \ - __ret = reg_write(ds, addr, reg, val); \ - if (__ret < 0) \ - return __ret; \ - }) - -static char *mv88e6063_probe(struct mii_bus *bus, int sw_addr) -{ - int ret; - - ret = mdiobus_read(bus, REG_PORT(0), 0x03); - if (ret >= 0) { - ret &= 0xfff0; - if (ret == 0x1530) - return "Marvell 88E6063"; - } - - return NULL; -} - -static int mv88e6063_switch_reset(struct dsa_switch *ds) -{ - int i; - int ret; - - /* - * Set all ports to the disabled state. - */ - for (i = 0; i < NUM_PORTS; i++) { - ret = REG_READ(REG_PORT(i), 0x04); - REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc); - } - - /* - * Wait for transmit queues to drain. - */ - msleep(2); - - /* - * Reset the switch. - */ - REG_WRITE(REG_GLOBAL, 0x0a, 0xa130); - - /* - * Wait up to one second for reset to complete. - */ - for (i = 0; i < 1000; i++) { - ret = REG_READ(REG_GLOBAL, 0x00); - if ((ret & 0x8000) == 0x0000) - break; - - msleep(1); - } - if (i == 1000) - return -ETIMEDOUT; - - return 0; -} - -static int mv88e6063_setup_global(struct dsa_switch *ds) -{ - /* - * Disable discarding of frames with excessive collisions, - * set the maximum frame size to 1536 bytes, and mask all - * interrupt sources. - */ - REG_WRITE(REG_GLOBAL, 0x04, 0x0800); - - /* - * Enable automatic address learning, set the address - * database size to 1024 entries, and set the default aging - * time to 5 minutes. - */ - REG_WRITE(REG_GLOBAL, 0x0a, 0x2130); - - return 0; -} - -static int mv88e6063_setup_port(struct dsa_switch *ds, int p) -{ - int addr = REG_PORT(p); - - /* - * Do not force flow control, disable Ingress and Egress - * Header tagging, disable VLAN tunneling, and set the port - * state to Forwarding. Additionally, if this is the CPU - * port, enable Ingress and Egress Trailer tagging mode. - */ - REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003); - - /* - * Port based VLAN map: give each port its own address - * database, allow the CPU port to talk to each of the 'real' - * ports, and allow each of the 'real' ports to only talk to - * the CPU port. - */ - REG_WRITE(addr, 0x06, - ((p & 0xf) << 12) | - (dsa_is_cpu_port(ds, p) ? - ds->phys_port_mask : - (1 << ds->dst->cpu_port))); - - /* - * Port Association Vector: when learning source addresses - * of packets, add the address to the address database using - * a port bitmap that has only the bit for this port set and - * the other bits clear. - */ - REG_WRITE(addr, 0x0b, 1 << p); - - return 0; -} - -static int mv88e6063_setup(struct dsa_switch *ds) -{ - int i; - int ret; - - ret = mv88e6063_switch_reset(ds); - if (ret < 0) - return ret; - - /* @@@ initialise atu */ - - ret = mv88e6063_setup_global(ds); - if (ret < 0) - return ret; - - for (i = 0; i < NUM_PORTS; i++) { - ret = mv88e6063_setup_port(ds, i); - if (ret < 0) - return ret; - } - - return 0; -} - -static int mv88e6063_set_addr(struct dsa_switch *ds, u8 *addr) -{ - REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]); - REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]); - REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]); - - return 0; -} - -static int mv88e6063_port_to_phy_addr(int port) -{ - if (port >= 0 && port <= NUM_PORTS) - return REG_PHY(port); - return -1; -} - -static int mv88e6063_phy_read(struct dsa_switch *ds, int port, int regnum) -{ - int addr; - - addr = mv88e6063_port_to_phy_addr(port); - if (addr == -1) - return 0xffff; - - return reg_read(ds, addr, regnum); -} - -static int -mv88e6063_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) -{ - int addr; - - addr = mv88e6063_port_to_phy_addr(port); - if (addr == -1) - return 0xffff; - - return reg_write(ds, addr, regnum, val); -} - -static void mv88e6063_poll_link(struct dsa_switch *ds) -{ - int i; - - for (i = 0; i < DSA_MAX_PORTS; i++) { - struct net_device *dev; - int uninitialized_var(port_status); - int link; - int speed; - int duplex; - int fc; - - dev = ds->ports[i]; - if (dev == NULL) - continue; - - link = 0; - if (dev->flags & IFF_UP) { - port_status = reg_read(ds, REG_PORT(i), 0x00); - if (port_status < 0) - continue; - - link = !!(port_status & 0x1000); - } - - if (!link) { - if (netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link down\n", dev->name); - netif_carrier_off(dev); - } - continue; - } - - speed = (port_status & 0x0100) ? 100 : 10; - duplex = (port_status & 0x0200) ? 1 : 0; - fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0; - - if (!netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " - "flow control %sabled\n", dev->name, - speed, duplex ? "full" : "half", - fc ? "en" : "dis"); - netif_carrier_on(dev); - } - } -} - -static struct dsa_switch_driver mv88e6063_switch_driver = { - .tag_protocol = htons(ETH_P_TRAILER), - .probe = mv88e6063_probe, - .setup = mv88e6063_setup, - .set_addr = mv88e6063_set_addr, - .phy_read = mv88e6063_phy_read, - .phy_write = mv88e6063_phy_write, - .poll_link = mv88e6063_poll_link, -}; - -static int __init mv88e6063_init(void) -{ - register_switch_driver(&mv88e6063_switch_driver); - return 0; -} -module_init(mv88e6063_init); - -static void __exit mv88e6063_cleanup(void) -{ - unregister_switch_driver(&mv88e6063_switch_driver); -} -module_exit(mv88e6063_cleanup); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Kconfig b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Kconfig deleted file mode 100644 index 42d544f..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -config AG71XX - tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" - depends on ATH79 - select PHYLIB - help - If you wish to compile a kernel for AR7XXX/91XXX and enable - ethernet support, then you should always answer Y to this. - -if AG71XX - -config AG71XX_DEBUG - bool "Atheros AR71xx built-in ethernet driver debugging" - default n - help - Atheros AR71xx built-in ethernet driver debugging messages. - -config AG71XX_DEBUG_FS - bool "Atheros AR71xx built-in ethernet driver debugfs support" - depends on DEBUG_FS - default n - help - Say Y, if you need access to various statistics provided by - the ag71xx driver. - -config AG71XX_AR8216_SUPPORT - bool "special support for the Atheros AR8216 switch" - default n - default y if ATH79_MACH_WNR2000 || ATH79_MACH_MZK_W04NU - help - Say 'y' here if you want to enable special support for the - Atheros AR8216 switch found on some boards. - -endif diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Makefile b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Makefile deleted file mode 100644 index b3ec408..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Makefile +++ /dev/null @@ -1,15 +0,0 @@ -# -# Makefile for the Atheros AR71xx built-in ethernet macs -# - -ag71xx-y += ag71xx_main.o -ag71xx-y += ag71xx_ethtool.o -ag71xx-y += ag71xx_phy.o -ag71xx-y += ag71xx_mdio.o -ag71xx-y += ag71xx_ar7240.o - -ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o -ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT) += ag71xx_ar8216.o - -obj-$(CONFIG_AG71XX) += ag71xx.o - diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h deleted file mode 100644 index f6d85b9..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ /dev/null @@ -1,476 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __AG71XX_H -#define __AG71XX_H - -#include <linux/kernel.h> -#include <linux/version.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/types.h> -#include <linux/random.h> -#include <linux/spinlock.h> -#include <linux/interrupt.h> -#include <linux/platform_device.h> -#include <linux/ethtool.h> -#include <linux/etherdevice.h> -#include <linux/if_vlan.h> -#include <linux/phy.h> -#include <linux/skbuff.h> -#include <linux/dma-mapping.h> -#include <linux/workqueue.h> - -#include <linux/bitops.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> -#include <asm/mach-ath79/ag71xx_platform.h> - -#define AG71XX_DRV_NAME "ag71xx" -#define AG71XX_DRV_VERSION "0.5.35" - -#define AG71XX_NAPI_WEIGHT 64 -#define AG71XX_OOM_REFILL (1 + HZ/10) - -#define AG71XX_INT_ERR (AG71XX_INT_RX_BE | AG71XX_INT_TX_BE) -#define AG71XX_INT_TX (AG71XX_INT_TX_PS) -#define AG71XX_INT_RX (AG71XX_INT_RX_PR | AG71XX_INT_RX_OF) - -#define AG71XX_INT_POLL (AG71XX_INT_RX | AG71XX_INT_TX) -#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL) - -#define AG71XX_TX_MTU_LEN 1540 - -#define AG71XX_TX_RING_SIZE_DEFAULT 32 -#define AG71XX_RX_RING_SIZE_DEFAULT 128 - -#define AG71XX_TX_RING_SIZE_MAX 32 -#define AG71XX_RX_RING_SIZE_MAX 128 - -#ifdef CONFIG_AG71XX_DEBUG -#define DBG(fmt, args...) pr_debug(fmt, ## args) -#else -#define DBG(fmt, args...) do {} while (0) -#endif - -#define ag71xx_assert(_cond) \ -do { \ - if (_cond) \ - break; \ - printk("%s,%d: assertion failed\n", __FILE__, __LINE__); \ - BUG(); \ -} while (0) - -struct ag71xx_desc { - u32 data; - u32 ctrl; -#define DESC_EMPTY BIT(31) -#define DESC_MORE BIT(24) -#define DESC_PKTLEN_M 0xfff - u32 next; - u32 pad; -} __attribute__((aligned(4))); - -struct ag71xx_buf { - union { - struct sk_buff *skb; - void *rx_buf; - }; - struct ag71xx_desc *desc; - union { - dma_addr_t dma_addr; - unsigned long timestamp; - }; - unsigned int len; -}; - -struct ag71xx_ring { - struct ag71xx_buf *buf; - u8 *descs_cpu; - dma_addr_t descs_dma; - unsigned int desc_size; - unsigned int curr; - unsigned int dirty; - unsigned int size; -}; - -struct ag71xx_mdio { - struct mii_bus *mii_bus; - int mii_irq[PHY_MAX_ADDR]; - void __iomem *mdio_base; - struct ag71xx_mdio_platform_data *pdata; -}; - -struct ag71xx_int_stats { - unsigned long rx_pr; - unsigned long rx_be; - unsigned long rx_of; - unsigned long tx_ps; - unsigned long tx_be; - unsigned long tx_ur; - unsigned long total; -}; - -struct ag71xx_napi_stats { - unsigned long napi_calls; - unsigned long rx_count; - unsigned long rx_packets; - unsigned long rx_packets_max; - unsigned long tx_count; - unsigned long tx_packets; - unsigned long tx_packets_max; - - unsigned long rx[AG71XX_NAPI_WEIGHT + 1]; - unsigned long tx[AG71XX_NAPI_WEIGHT + 1]; -}; - -struct ag71xx_debug { - struct dentry *debugfs_dir; - - struct ag71xx_int_stats int_stats; - struct ag71xx_napi_stats napi_stats; -}; - -struct ag71xx { - void __iomem *mac_base; - - spinlock_t lock; - struct platform_device *pdev; - struct net_device *dev; - struct napi_struct napi; - u32 msg_enable; - - struct ag71xx_desc *stop_desc; - dma_addr_t stop_desc_dma; - - struct ag71xx_ring rx_ring; - struct ag71xx_ring tx_ring; - - struct mii_bus *mii_bus; - struct phy_device *phy_dev; - void *phy_priv; - - unsigned int link; - unsigned int speed; - int duplex; - - unsigned int max_frame_len; - unsigned int desc_pktlen_mask; - unsigned int rx_buf_size; - - struct work_struct restart_work; - struct delayed_work link_work; - struct timer_list oom_timer; - -#ifdef CONFIG_AG71XX_DEBUG_FS - struct ag71xx_debug debug; -#endif -}; - -extern struct ethtool_ops ag71xx_ethtool_ops; -void ag71xx_link_adjust(struct ag71xx *ag); - -int ag71xx_mdio_driver_init(void) __init; -void ag71xx_mdio_driver_exit(void); - -int ag71xx_phy_connect(struct ag71xx *ag); -void ag71xx_phy_disconnect(struct ag71xx *ag); -void ag71xx_phy_start(struct ag71xx *ag); -void ag71xx_phy_stop(struct ag71xx *ag); - -static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag) -{ - return ag->pdev->dev.platform_data; -} - -static inline int ag71xx_desc_empty(struct ag71xx_desc *desc) -{ - return (desc->ctrl & DESC_EMPTY) != 0; -} - -/* Register offsets */ -#define AG71XX_REG_MAC_CFG1 0x0000 -#define AG71XX_REG_MAC_CFG2 0x0004 -#define AG71XX_REG_MAC_IPG 0x0008 -#define AG71XX_REG_MAC_HDX 0x000c -#define AG71XX_REG_MAC_MFL 0x0010 -#define AG71XX_REG_MII_CFG 0x0020 -#define AG71XX_REG_MII_CMD 0x0024 -#define AG71XX_REG_MII_ADDR 0x0028 -#define AG71XX_REG_MII_CTRL 0x002c -#define AG71XX_REG_MII_STATUS 0x0030 -#define AG71XX_REG_MII_IND 0x0034 -#define AG71XX_REG_MAC_IFCTL 0x0038 -#define AG71XX_REG_MAC_ADDR1 0x0040 -#define AG71XX_REG_MAC_ADDR2 0x0044 -#define AG71XX_REG_FIFO_CFG0 0x0048 -#define AG71XX_REG_FIFO_CFG1 0x004c -#define AG71XX_REG_FIFO_CFG2 0x0050 -#define AG71XX_REG_FIFO_CFG3 0x0054 -#define AG71XX_REG_FIFO_CFG4 0x0058 -#define AG71XX_REG_FIFO_CFG5 0x005c -#define AG71XX_REG_FIFO_RAM0 0x0060 -#define AG71XX_REG_FIFO_RAM1 0x0064 -#define AG71XX_REG_FIFO_RAM2 0x0068 -#define AG71XX_REG_FIFO_RAM3 0x006c -#define AG71XX_REG_FIFO_RAM4 0x0070 -#define AG71XX_REG_FIFO_RAM5 0x0074 -#define AG71XX_REG_FIFO_RAM6 0x0078 -#define AG71XX_REG_FIFO_RAM7 0x007c - -#define AG71XX_REG_TX_CTRL 0x0180 -#define AG71XX_REG_TX_DESC 0x0184 -#define AG71XX_REG_TX_STATUS 0x0188 -#define AG71XX_REG_RX_CTRL 0x018c -#define AG71XX_REG_RX_DESC 0x0190 -#define AG71XX_REG_RX_STATUS 0x0194 -#define AG71XX_REG_INT_ENABLE 0x0198 -#define AG71XX_REG_INT_STATUS 0x019c - -#define AG71XX_REG_FIFO_DEPTH 0x01a8 -#define AG71XX_REG_RX_SM 0x01b0 -#define AG71XX_REG_TX_SM 0x01b4 - -#define MAC_CFG1_TXE BIT(0) /* Tx Enable */ -#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */ -#define MAC_CFG1_RXE BIT(2) /* Rx Enable */ -#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */ -#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */ -#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */ -#define MAC_CFG1_LB BIT(8) /* Loopback mode */ -#define MAC_CFG1_SR BIT(31) /* Soft Reset */ - -#define MAC_CFG2_FDX BIT(0) -#define MAC_CFG2_CRC_EN BIT(1) -#define MAC_CFG2_PAD_CRC_EN BIT(2) -#define MAC_CFG2_LEN_CHECK BIT(4) -#define MAC_CFG2_HUGE_FRAME_EN BIT(5) -#define MAC_CFG2_IF_1000 BIT(9) -#define MAC_CFG2_IF_10_100 BIT(8) - -#define FIFO_CFG0_WTM BIT(0) /* Watermark Module */ -#define FIFO_CFG0_RXS BIT(1) /* Rx System Module */ -#define FIFO_CFG0_RXF BIT(2) /* Rx Fabric Module */ -#define FIFO_CFG0_TXS BIT(3) /* Tx System Module */ -#define FIFO_CFG0_TXF BIT(4) /* Tx Fabric Module */ -#define FIFO_CFG0_ALL (FIFO_CFG0_WTM | FIFO_CFG0_RXS | FIFO_CFG0_RXF \ - | FIFO_CFG0_TXS | FIFO_CFG0_TXF) - -#define FIFO_CFG0_ENABLE_SHIFT 8 - -#define FIFO_CFG4_DE BIT(0) /* Drop Event */ -#define FIFO_CFG4_DV BIT(1) /* RX_DV Event */ -#define FIFO_CFG4_FC BIT(2) /* False Carrier */ -#define FIFO_CFG4_CE BIT(3) /* Code Error */ -#define FIFO_CFG4_CR BIT(4) /* CRC error */ -#define FIFO_CFG4_LM BIT(5) /* Length Mismatch */ -#define FIFO_CFG4_LO BIT(6) /* Length out of range */ -#define FIFO_CFG4_OK BIT(7) /* Packet is OK */ -#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */ -#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */ -#define FIFO_CFG4_DR BIT(10) /* Dribble */ -#define FIFO_CFG4_LE BIT(11) /* Long Event */ -#define FIFO_CFG4_CF BIT(12) /* Control Frame */ -#define FIFO_CFG4_PF BIT(13) /* Pause Frame */ -#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */ -#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */ -#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */ -#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */ - -#define FIFO_CFG5_DE BIT(0) /* Drop Event */ -#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */ -#define FIFO_CFG5_FC BIT(2) /* False Carrier */ -#define FIFO_CFG5_CE BIT(3) /* Code Error */ -#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */ -#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */ -#define FIFO_CFG5_OK BIT(6) /* Packet is OK */ -#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */ -#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */ -#define FIFO_CFG5_DR BIT(9) /* Dribble */ -#define FIFO_CFG5_CF BIT(10) /* Control Frame */ -#define FIFO_CFG5_PF BIT(11) /* Pause Frame */ -#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */ -#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */ -#define FIFO_CFG5_LE BIT(14) /* Long Event */ -#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */ -#define FIFO_CFG5_16 BIT(16) /* unknown */ -#define FIFO_CFG5_17 BIT(17) /* unknown */ -#define FIFO_CFG5_SF BIT(18) /* Short Frame */ -#define FIFO_CFG5_BM BIT(19) /* Byte Mode */ - -#define AG71XX_INT_TX_PS BIT(0) -#define AG71XX_INT_TX_UR BIT(1) -#define AG71XX_INT_TX_BE BIT(3) -#define AG71XX_INT_RX_PR BIT(4) -#define AG71XX_INT_RX_OF BIT(6) -#define AG71XX_INT_RX_BE BIT(7) - -#define MAC_IFCTL_SPEED BIT(16) - -#define MII_CFG_CLK_DIV_4 0 -#define MII_CFG_CLK_DIV_6 2 -#define MII_CFG_CLK_DIV_8 3 -#define MII_CFG_CLK_DIV_10 4 -#define MII_CFG_CLK_DIV_14 5 -#define MII_CFG_CLK_DIV_20 6 -#define MII_CFG_CLK_DIV_28 7 -#define MII_CFG_CLK_DIV_34 8 -#define MII_CFG_CLK_DIV_42 9 -#define MII_CFG_CLK_DIV_50 10 -#define MII_CFG_CLK_DIV_58 11 -#define MII_CFG_CLK_DIV_66 12 -#define MII_CFG_CLK_DIV_74 13 -#define MII_CFG_CLK_DIV_82 14 -#define MII_CFG_CLK_DIV_98 15 -#define MII_CFG_RESET BIT(31) - -#define MII_CMD_WRITE 0x0 -#define MII_CMD_READ 0x1 -#define MII_ADDR_SHIFT 8 -#define MII_IND_BUSY BIT(0) -#define MII_IND_INVALID BIT(2) - -#define TX_CTRL_TXE BIT(0) /* Tx Enable */ - -#define TX_STATUS_PS BIT(0) /* Packet Sent */ -#define TX_STATUS_UR BIT(1) /* Tx Underrun */ -#define TX_STATUS_BE BIT(3) /* Bus Error */ - -#define RX_CTRL_RXE BIT(0) /* Rx Enable */ - -#define RX_STATUS_PR BIT(0) /* Packet Received */ -#define RX_STATUS_OF BIT(2) /* Rx Overflow */ -#define RX_STATUS_BE BIT(3) /* Bus Error */ - -static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg) -{ - switch (reg) { - case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: - case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_TX_SM: - case AG71XX_REG_MII_CFG: - break; - - default: - BUG(); - } -} - -static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) -{ - ag71xx_check_reg_offset(ag, reg); - - __raw_writel(value, ag->mac_base + reg); - /* flush write */ - (void) __raw_readl(ag->mac_base + reg); -} - -static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) -{ - ag71xx_check_reg_offset(ag, reg); - - return __raw_readl(ag->mac_base + reg); -} - -static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask) -{ - void __iomem *r; - - ag71xx_check_reg_offset(ag, reg); - - r = ag->mac_base + reg; - __raw_writel(__raw_readl(r) | mask, r); - /* flush write */ - (void)__raw_readl(r); -} - -static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask) -{ - void __iomem *r; - - ag71xx_check_reg_offset(ag, reg); - - r = ag->mac_base + reg; - __raw_writel(__raw_readl(r) & ~mask, r); - /* flush write */ - (void) __raw_readl(r); -} - -static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints) -{ - ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints); -} - -static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints) -{ - ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); -} - -#ifdef CONFIG_AG71XX_AR8216_SUPPORT -void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb); -int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, - int pktlen); -static inline int ag71xx_has_ar8216(struct ag71xx *ag) -{ - return ag71xx_get_pdata(ag)->has_ar8216; -} -#else -static inline void ag71xx_add_ar8216_header(struct ag71xx *ag, - struct sk_buff *skb) -{ -} - -static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag, - struct sk_buff *skb, - int pktlen) -{ - return 0; -} -static inline int ag71xx_has_ar8216(struct ag71xx *ag) -{ - return 0; -} -#endif - -#ifdef CONFIG_AG71XX_DEBUG_FS -int ag71xx_debugfs_root_init(void); -void ag71xx_debugfs_root_exit(void); -int ag71xx_debugfs_init(struct ag71xx *ag); -void ag71xx_debugfs_exit(struct ag71xx *ag); -void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status); -void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx); -#else -static inline int ag71xx_debugfs_root_init(void) { return 0; } -static inline void ag71xx_debugfs_root_exit(void) {} -static inline int ag71xx_debugfs_init(struct ag71xx *ag) { return 0; } -static inline void ag71xx_debugfs_exit(struct ag71xx *ag) {} -static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, - u32 status) {} -static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, - int rx, int tx) {} -#endif /* CONFIG_AG71XX_DEBUG_FS */ - -void ag71xx_ar7240_start(struct ag71xx *ag); -void ag71xx_ar7240_stop(struct ag71xx *ag); -int ag71xx_ar7240_init(struct ag71xx *ag); -void ag71xx_ar7240_cleanup(struct ag71xx *ag); - -int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg); -void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val); - -u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr); -int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr, u16 reg_val); - -#endif /* _AG71XX_H */ diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c deleted file mode 100644 index d4ccc02..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c +++ /dev/null @@ -1,1202 +0,0 @@ -/* - * Driver for the built-in ethernet switch of the Atheros AR7240 SoC - * Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (c) 2010 Felix Fietkau <nbd@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ - -#include <linux/etherdevice.h> -#include <linux/list.h> -#include <linux/netdevice.h> -#include <linux/phy.h> -#include <linux/mii.h> -#include <linux/bitops.h> -#include <linux/switch.h> -#include "ag71xx.h" - -#define BITM(_count) (BIT(_count) - 1) -#define BITS(_shift, _count) (BITM(_count) << _shift) - -#define AR7240_REG_MASK_CTRL 0x00 -#define AR7240_MASK_CTRL_REVISION_M BITM(8) -#define AR7240_MASK_CTRL_VERSION_M BITM(8) -#define AR7240_MASK_CTRL_VERSION_S 8 -#define AR7240_MASK_CTRL_VERSION_AR7240 0x01 -#define AR7240_MASK_CTRL_VERSION_AR934X 0x02 -#define AR7240_MASK_CTRL_SOFT_RESET BIT(31) - -#define AR7240_REG_MAC_ADDR0 0x20 -#define AR7240_REG_MAC_ADDR1 0x24 - -#define AR7240_REG_FLOOD_MASK 0x2c -#define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26) - -#define AR7240_REG_GLOBAL_CTRL 0x30 -#define AR7240_GLOBAL_CTRL_MTU_M BITM(11) -#define AR9340_GLOBAL_CTRL_MTU_M BITM(14) - -#define AR7240_REG_VTU 0x0040 -#define AR7240_VTU_OP BITM(3) -#define AR7240_VTU_OP_NOOP 0x0 -#define AR7240_VTU_OP_FLUSH 0x1 -#define AR7240_VTU_OP_LOAD 0x2 -#define AR7240_VTU_OP_PURGE 0x3 -#define AR7240_VTU_OP_REMOVE_PORT 0x4 -#define AR7240_VTU_ACTIVE BIT(3) -#define AR7240_VTU_FULL BIT(4) -#define AR7240_VTU_PORT BITS(8, 4) -#define AR7240_VTU_PORT_S 8 -#define AR7240_VTU_VID BITS(16, 12) -#define AR7240_VTU_VID_S 16 -#define AR7240_VTU_PRIO BITS(28, 3) -#define AR7240_VTU_PRIO_S 28 -#define AR7240_VTU_PRIO_EN BIT(31) - -#define AR7240_REG_VTU_DATA 0x0044 -#define AR7240_VTUDATA_MEMBER BITS(0, 10) -#define AR7240_VTUDATA_VALID BIT(11) - -#define AR7240_REG_ATU 0x50 -#define AR7240_ATU_FLUSH_ALL 0x1 - -#define AR7240_REG_AT_CTRL 0x5c -#define AR7240_AT_CTRL_AGE_TIME BITS(0, 15) -#define AR7240_AT_CTRL_AGE_EN BIT(17) -#define AR7240_AT_CTRL_LEARN_CHANGE BIT(18) -#define AR7240_AT_CTRL_RESERVED BIT(19) -#define AR7240_AT_CTRL_ARP_EN BIT(20) - -#define AR7240_REG_TAG_PRIORITY 0x70 - -#define AR7240_REG_SERVICE_TAG 0x74 -#define AR7240_SERVICE_TAG_M BITM(16) - -#define AR7240_REG_CPU_PORT 0x78 -#define AR7240_MIRROR_PORT_S 4 -#define AR7240_CPU_PORT_EN BIT(8) - -#define AR7240_REG_MIB_FUNCTION0 0x80 -#define AR7240_MIB_TIMER_M BITM(16) -#define AR7240_MIB_AT_HALF_EN BIT(16) -#define AR7240_MIB_BUSY BIT(17) -#define AR7240_MIB_FUNC_S 24 -#define AR7240_MIB_FUNC_M BITM(3) -#define AR7240_MIB_FUNC_NO_OP 0x0 -#define AR7240_MIB_FUNC_FLUSH 0x1 -#define AR7240_MIB_FUNC_CAPTURE 0x3 - -#define AR7240_REG_MDIO_CTRL 0x98 -#define AR7240_MDIO_CTRL_DATA_M BITM(16) -#define AR7240_MDIO_CTRL_REG_ADDR_S 16 -#define AR7240_MDIO_CTRL_PHY_ADDR_S 21 -#define AR7240_MDIO_CTRL_CMD_WRITE 0 -#define AR7240_MDIO_CTRL_CMD_READ BIT(27) -#define AR7240_MDIO_CTRL_MASTER_EN BIT(30) -#define AR7240_MDIO_CTRL_BUSY BIT(31) - -#define AR7240_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) - -#define AR7240_REG_PORT_STATUS(_port) (AR7240_REG_PORT_BASE((_port)) + 0x00) -#define AR7240_PORT_STATUS_SPEED_S 0 -#define AR7240_PORT_STATUS_SPEED_M BITM(2) -#define AR7240_PORT_STATUS_SPEED_10 0 -#define AR7240_PORT_STATUS_SPEED_100 1 -#define AR7240_PORT_STATUS_SPEED_1000 2 -#define AR7240_PORT_STATUS_TXMAC BIT(2) -#define AR7240_PORT_STATUS_RXMAC BIT(3) -#define AR7240_PORT_STATUS_TXFLOW BIT(4) -#define AR7240_PORT_STATUS_RXFLOW BIT(5) -#define AR7240_PORT_STATUS_DUPLEX BIT(6) -#define AR7240_PORT_STATUS_LINK_UP BIT(8) -#define AR7240_PORT_STATUS_LINK_AUTO BIT(9) -#define AR7240_PORT_STATUS_LINK_PAUSE BIT(10) - -#define AR7240_REG_PORT_CTRL(_port) (AR7240_REG_PORT_BASE((_port)) + 0x04) -#define AR7240_PORT_CTRL_STATE_M BITM(3) -#define AR7240_PORT_CTRL_STATE_DISABLED 0 -#define AR7240_PORT_CTRL_STATE_BLOCK 1 -#define AR7240_PORT_CTRL_STATE_LISTEN 2 -#define AR7240_PORT_CTRL_STATE_LEARN 3 -#define AR7240_PORT_CTRL_STATE_FORWARD 4 -#define AR7240_PORT_CTRL_LEARN_LOCK BIT(7) -#define AR7240_PORT_CTRL_VLAN_MODE_S 8 -#define AR7240_PORT_CTRL_VLAN_MODE_KEEP 0 -#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1 -#define AR7240_PORT_CTRL_VLAN_MODE_ADD 2 -#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3 -#define AR7240_PORT_CTRL_IGMP_SNOOP BIT(10) -#define AR7240_PORT_CTRL_HEADER BIT(11) -#define AR7240_PORT_CTRL_MAC_LOOP BIT(12) -#define AR7240_PORT_CTRL_SINGLE_VLAN BIT(13) -#define AR7240_PORT_CTRL_LEARN BIT(14) -#define AR7240_PORT_CTRL_DOUBLE_TAG BIT(15) -#define AR7240_PORT_CTRL_MIRROR_TX BIT(16) -#define AR7240_PORT_CTRL_MIRROR_RX BIT(17) - -#define AR7240_REG_PORT_VLAN(_port) (AR7240_REG_PORT_BASE((_port)) + 0x08) - -#define AR7240_PORT_VLAN_DEFAULT_ID_S 0 -#define AR7240_PORT_VLAN_DEST_PORTS_S 16 -#define AR7240_PORT_VLAN_MODE_S 30 -#define AR7240_PORT_VLAN_MODE_PORT_ONLY 0 -#define AR7240_PORT_VLAN_MODE_PORT_FALLBACK 1 -#define AR7240_PORT_VLAN_MODE_VLAN_ONLY 2 -#define AR7240_PORT_VLAN_MODE_SECURE 3 - - -#define AR7240_REG_STATS_BASE(_port) (0x20000 + (_port) * 0x100) - -#define AR7240_STATS_RXBROAD 0x00 -#define AR7240_STATS_RXPAUSE 0x04 -#define AR7240_STATS_RXMULTI 0x08 -#define AR7240_STATS_RXFCSERR 0x0c -#define AR7240_STATS_RXALIGNERR 0x10 -#define AR7240_STATS_RXRUNT 0x14 -#define AR7240_STATS_RXFRAGMENT 0x18 -#define AR7240_STATS_RX64BYTE 0x1c -#define AR7240_STATS_RX128BYTE 0x20 -#define AR7240_STATS_RX256BYTE 0x24 -#define AR7240_STATS_RX512BYTE 0x28 -#define AR7240_STATS_RX1024BYTE 0x2c -#define AR7240_STATS_RX1518BYTE 0x30 -#define AR7240_STATS_RXMAXBYTE 0x34 -#define AR7240_STATS_RXTOOLONG 0x38 -#define AR7240_STATS_RXGOODBYTE 0x3c -#define AR7240_STATS_RXBADBYTE 0x44 -#define AR7240_STATS_RXOVERFLOW 0x4c -#define AR7240_STATS_FILTERED 0x50 -#define AR7240_STATS_TXBROAD 0x54 -#define AR7240_STATS_TXPAUSE 0x58 -#define AR7240_STATS_TXMULTI 0x5c -#define AR7240_STATS_TXUNDERRUN 0x60 -#define AR7240_STATS_TX64BYTE 0x64 -#define AR7240_STATS_TX128BYTE 0x68 -#define AR7240_STATS_TX256BYTE 0x6c -#define AR7240_STATS_TX512BYTE 0x70 -#define AR7240_STATS_TX1024BYTE 0x74 -#define AR7240_STATS_TX1518BYTE 0x78 -#define AR7240_STATS_TXMAXBYTE 0x7c -#define AR7240_STATS_TXOVERSIZE 0x80 -#define AR7240_STATS_TXBYTE 0x84 -#define AR7240_STATS_TXCOLLISION 0x8c -#define AR7240_STATS_TXABORTCOL 0x90 -#define AR7240_STATS_TXMULTICOL 0x94 -#define AR7240_STATS_TXSINGLECOL 0x98 -#define AR7240_STATS_TXEXCDEFER 0x9c -#define AR7240_STATS_TXDEFER 0xa0 -#define AR7240_STATS_TXLATECOL 0xa4 - -#define AR7240_PORT_CPU 0 -#define AR7240_NUM_PORTS 6 -#define AR7240_NUM_PHYS 5 - -#define AR7240_PHY_ID1 0x004d -#define AR7240_PHY_ID2 0xd041 - -#define AR934X_PHY_ID1 0x004d -#define AR934X_PHY_ID2 0xd042 - -#define AR7240_MAX_VLANS 16 - -#define AR934X_REG_OPER_MODE0 0x04 -#define AR934X_OPER_MODE0_MAC_GMII_EN BIT(6) -#define AR934X_OPER_MODE0_PHY_MII_EN BIT(10) - -#define AR934X_REG_OPER_MODE1 0x08 -#define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) - -#define AR934X_REG_FLOOD_MASK 0x2c -#define AR934X_FLOOD_MASK_MC_DP(_p) BIT(16 + (_p)) -#define AR934X_FLOOD_MASK_BC_DP(_p) BIT(25 + (_p)) - -#define AR934X_REG_QM_CTRL 0x3c -#define AR934X_QM_CTRL_ARP_EN BIT(15) - -#define AR934X_REG_AT_CTRL 0x5c -#define AR934X_AT_CTRL_AGE_TIME BITS(0, 15) -#define AR934X_AT_CTRL_AGE_EN BIT(17) -#define AR934X_AT_CTRL_LEARN_CHANGE BIT(18) - -#define AR934X_MIB_ENABLE BIT(30) - -#define AR934X_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) - -#define AR934X_REG_PORT_VLAN1(_port) (AR934X_REG_PORT_BASE((_port)) + 0x08) -#define AR934X_PORT_VLAN1_DEFAULT_SVID_S 0 -#define AR934X_PORT_VLAN1_FORCE_DEFAULT_VID_EN BIT(12) -#define AR934X_PORT_VLAN1_PORT_TLS_MODE BIT(13) -#define AR934X_PORT_VLAN1_PORT_VLAN_PROP_EN BIT(14) -#define AR934X_PORT_VLAN1_PORT_CLONE_EN BIT(15) -#define AR934X_PORT_VLAN1_DEFAULT_CVID_S 16 -#define AR934X_PORT_VLAN1_FORCE_PORT_VLAN_EN BIT(28) -#define AR934X_PORT_VLAN1_ING_PORT_PRI_S 29 - -#define AR934X_REG_PORT_VLAN2(_port) (AR934X_REG_PORT_BASE((_port)) + 0x0c) -#define AR934X_PORT_VLAN2_PORT_VID_MEM_S 16 -#define AR934X_PORT_VLAN2_8021Q_MODE_S 30 -#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_ONLY 0 -#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_FALLBACK 1 -#define AR934X_PORT_VLAN2_8021Q_MODE_VLAN_ONLY 2 -#define AR934X_PORT_VLAN2_8021Q_MODE_SECURE 3 - -#define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev) - -struct ar7240sw_port_stat { - unsigned long rx_broadcast; - unsigned long rx_pause; - unsigned long rx_multicast; - unsigned long rx_fcs_error; - unsigned long rx_align_error; - unsigned long rx_runt; - unsigned long rx_fragments; - unsigned long rx_64byte; - unsigned long rx_128byte; - unsigned long rx_256byte; - unsigned long rx_512byte; - unsigned long rx_1024byte; - unsigned long rx_1518byte; - unsigned long rx_maxbyte; - unsigned long rx_toolong; - unsigned long rx_good_byte; - unsigned long rx_bad_byte; - unsigned long rx_overflow; - unsigned long filtered; - - unsigned long tx_broadcast; - unsigned long tx_pause; - unsigned long tx_multicast; - unsigned long tx_underrun; - unsigned long tx_64byte; - unsigned long tx_128byte; - unsigned long tx_256byte; - unsigned long tx_512byte; - unsigned long tx_1024byte; - unsigned long tx_1518byte; - unsigned long tx_maxbyte; - unsigned long tx_oversize; - unsigned long tx_byte; - unsigned long tx_collision; - unsigned long tx_abortcol; - unsigned long tx_multicol; - unsigned long tx_singlecol; - unsigned long tx_excdefer; - unsigned long tx_defer; - unsigned long tx_xlatecol; -}; - -struct ar7240sw { - struct mii_bus *mii_bus; - struct ag71xx_switch_platform_data *swdata; - struct switch_dev swdev; - int num_ports; - u8 ver; - bool vlan; - u16 vlan_id[AR7240_MAX_VLANS]; - u8 vlan_table[AR7240_MAX_VLANS]; - u8 vlan_tagged; - u16 pvid[AR7240_NUM_PORTS]; - char buf[80]; - - rwlock_t stats_lock; - struct ar7240sw_port_stat port_stats[AR7240_NUM_PORTS]; -}; - -struct ar7240sw_hw_stat { - char string[ETH_GSTRING_LEN]; - int sizeof_stat; - int reg; -}; - -static DEFINE_MUTEX(reg_mutex); - -static inline int sw_is_ar7240(struct ar7240sw *as) -{ - return as->ver == AR7240_MASK_CTRL_VERSION_AR7240; -} - -static inline int sw_is_ar934x(struct ar7240sw *as) -{ - return as->ver == AR7240_MASK_CTRL_VERSION_AR934X; -} - -static inline u32 ar7240sw_port_mask(struct ar7240sw *as, int port) -{ - return BIT(port); -} - -static inline u32 ar7240sw_port_mask_all(struct ar7240sw *as) -{ - return BIT(as->swdev.ports) - 1; -} - -static inline u32 ar7240sw_port_mask_but(struct ar7240sw *as, int port) -{ - return ar7240sw_port_mask_all(as) & ~BIT(port); -} - -static inline u16 mk_phy_addr(u32 reg) -{ - return 0x17 & ((reg >> 4) | 0x10); -} - -static inline u16 mk_phy_reg(u32 reg) -{ - return (reg << 1) & 0x1e; -} - -static inline u16 mk_high_addr(u32 reg) -{ - return (reg >> 7) & 0x1ff; -} - -static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg) -{ - unsigned long flags; - u16 phy_addr; - u16 phy_reg; - u32 hi, lo; - - reg = (reg & 0xfffffffc) >> 2; - phy_addr = mk_phy_addr(reg); - phy_reg = mk_phy_reg(reg); - - local_irq_save(flags); - ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); - lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg); - hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1); - local_irq_restore(flags); - - return (hi << 16) | lo; -} - -static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val) -{ - unsigned long flags; - u16 phy_addr; - u16 phy_reg; - - reg = (reg & 0xfffffffc) >> 2; - phy_addr = mk_phy_addr(reg); - phy_reg = mk_phy_reg(reg); - - local_irq_save(flags); - ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); - ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16)); - ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff)); - local_irq_restore(flags); -} - -static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr) -{ - u32 ret; - - mutex_lock(®_mutex); - ret = __ar7240sw_reg_read(mii, reg_addr); - mutex_unlock(®_mutex); - - return ret; -} - -static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val) -{ - mutex_lock(®_mutex); - __ar7240sw_reg_write(mii, reg_addr, reg_val); - mutex_unlock(®_mutex); -} - -static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val) -{ - u32 t; - - mutex_lock(®_mutex); - t = __ar7240sw_reg_read(mii, reg); - t &= ~mask; - t |= val; - __ar7240sw_reg_write(mii, reg, t); - mutex_unlock(®_mutex); - - return t; -} - -static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val) -{ - u32 t; - - mutex_lock(®_mutex); - t = __ar7240sw_reg_read(mii, reg); - t |= val; - __ar7240sw_reg_write(mii, reg, t); - mutex_unlock(®_mutex); -} - -static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, - unsigned timeout) -{ - int i; - - for (i = 0; i < timeout; i++) { - u32 t; - - t = __ar7240sw_reg_read(mii, reg); - if ((t & mask) == val) - return 0; - - msleep(1); - } - - return -ETIMEDOUT; -} - -static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, - unsigned timeout) -{ - int ret; - - mutex_lock(®_mutex); - ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout); - mutex_unlock(®_mutex); - return ret; -} - -u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr) -{ - u32 t, val = 0xffff; - int err; - - if (phy_addr >= AR7240_NUM_PHYS) - return 0xffff; - - mutex_lock(®_mutex); - t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | - (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | - AR7240_MDIO_CTRL_MASTER_EN | - AR7240_MDIO_CTRL_BUSY | - AR7240_MDIO_CTRL_CMD_READ; - - __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); - err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, - AR7240_MDIO_CTRL_BUSY, 0, 5); - if (!err) - val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL); - mutex_unlock(®_mutex); - - return val & AR7240_MDIO_CTRL_DATA_M; -} - -int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr, u16 reg_val) -{ - u32 t; - int ret; - - if (phy_addr >= AR7240_NUM_PHYS) - return -EINVAL; - - mutex_lock(®_mutex); - t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | - (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | - AR7240_MDIO_CTRL_MASTER_EN | - AR7240_MDIO_CTRL_BUSY | - AR7240_MDIO_CTRL_CMD_WRITE | - reg_val; - - __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); - ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, - AR7240_MDIO_CTRL_BUSY, 0, 5); - mutex_unlock(®_mutex); - - return ret; -} - -static int ar7240sw_capture_stats(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - int port; - int ret; - - write_lock(&as->stats_lock); - - /* Capture the hardware statistics for all ports */ - ar7240sw_reg_rmw(mii, AR7240_REG_MIB_FUNCTION0, - (AR7240_MIB_FUNC_M << AR7240_MIB_FUNC_S), - (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S)); - - /* Wait for the capturing to complete. */ - ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0, - AR7240_MIB_BUSY, 0, 10); - - if (ret) - goto unlock; - - for (port = 0; port < AR7240_NUM_PORTS; port++) { - unsigned int base; - struct ar7240sw_port_stat *stats; - - base = AR7240_REG_STATS_BASE(port); - stats = &as->port_stats[port]; - -#define READ_STAT(_r) ar7240sw_reg_read(mii, base + AR7240_STATS_ ## _r) - - stats->rx_good_byte += READ_STAT(RXGOODBYTE); - stats->tx_byte += READ_STAT(TXBYTE); - -#undef READ_STAT - } - - ret = 0; - -unlock: - write_unlock(&as->stats_lock); - return ret; -} - -static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port) -{ - ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port), - AR7240_PORT_CTRL_STATE_DISABLED); -} - -static void ar7240sw_setup(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - - /* Enable CPU port, and disable mirror port */ - ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT, - AR7240_CPU_PORT_EN | - (15 << AR7240_MIRROR_PORT_S)); - - /* Setup TAG priority mapping */ - ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50); - - if (sw_is_ar934x(as)) { - /* Enable aging, MAC replacing */ - ar7240sw_reg_write(mii, AR934X_REG_AT_CTRL, - 0x2b /* 5 min age time */ | - AR934X_AT_CTRL_AGE_EN | - AR934X_AT_CTRL_LEARN_CHANGE); - /* Enable ARP frame acknowledge */ - ar7240sw_reg_set(mii, AR934X_REG_QM_CTRL, - AR934X_QM_CTRL_ARP_EN); - /* Enable Broadcast/Multicast frames transmitted to the CPU */ - ar7240sw_reg_set(mii, AR934X_REG_FLOOD_MASK, - AR934X_FLOOD_MASK_BC_DP(0) | - AR934X_FLOOD_MASK_MC_DP(0)); - - /* setup MTU */ - ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, - AR9340_GLOBAL_CTRL_MTU_M, - AR9340_GLOBAL_CTRL_MTU_M); - - /* Enable MIB counters */ - ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0, - AR934X_MIB_ENABLE); - - } else { - /* Enable ARP frame acknowledge, aging, MAC replacing */ - ar7240sw_reg_write(mii, AR7240_REG_AT_CTRL, - AR7240_AT_CTRL_RESERVED | - 0x2b /* 5 min age time */ | - AR7240_AT_CTRL_AGE_EN | - AR7240_AT_CTRL_ARP_EN | - AR7240_AT_CTRL_LEARN_CHANGE); - /* Enable Broadcast frames transmitted to the CPU */ - ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK, - AR7240_FLOOD_MASK_BROAD_TO_CPU); - - /* setup MTU */ - ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, - AR7240_GLOBAL_CTRL_MTU_M, - AR7240_GLOBAL_CTRL_MTU_M); - } - - /* setup Service TAG */ - ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0); -} - -static int ar7240sw_reset(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - int ret; - int i; - - /* Set all ports to disabled state. */ - for (i = 0; i < AR7240_NUM_PORTS; i++) - ar7240sw_disable_port(as, i); - - /* Wait for transmit queues to drain. */ - msleep(2); - - /* Reset the switch. */ - ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL, - AR7240_MASK_CTRL_SOFT_RESET); - - ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL, - AR7240_MASK_CTRL_SOFT_RESET, 0, 1000); - - /* setup PHYs */ - for (i = 0; i < AR7240_NUM_PHYS; i++) { - ar7240sw_phy_write(mii, i, MII_ADVERTISE, - ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | - ADVERTISE_PAUSE_ASYM); - ar7240sw_phy_write(mii, i, MII_BMCR, - BMCR_RESET | BMCR_ANENABLE); - } - msleep(1000); - - ar7240sw_setup(as); - return ret; -} - -static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask) -{ - struct mii_bus *mii = as->mii_bus; - u32 ctrl; - u32 vid, mode; - - ctrl = AR7240_PORT_CTRL_STATE_FORWARD | AR7240_PORT_CTRL_LEARN | - AR7240_PORT_CTRL_SINGLE_VLAN; - - if (port == AR7240_PORT_CPU) { - ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), - AR7240_PORT_STATUS_SPEED_1000 | - AR7240_PORT_STATUS_TXFLOW | - AR7240_PORT_STATUS_RXFLOW | - AR7240_PORT_STATUS_TXMAC | - AR7240_PORT_STATUS_RXMAC | - AR7240_PORT_STATUS_DUPLEX); - } else { - ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), - AR7240_PORT_STATUS_LINK_AUTO); - } - - /* Set the default VID for this port */ - if (as->vlan) { - vid = as->vlan_id[as->pvid[port]]; - mode = AR7240_PORT_VLAN_MODE_SECURE; - } else { - vid = port; - mode = AR7240_PORT_VLAN_MODE_PORT_ONLY; - } - - if (as->vlan) { - if (as->vlan_tagged & BIT(port)) - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_ADD << - AR7240_PORT_CTRL_VLAN_MODE_S; - else - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_STRIP << - AR7240_PORT_CTRL_VLAN_MODE_S; - } else { - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_KEEP << - AR7240_PORT_CTRL_VLAN_MODE_S; - } - - if (!portmask) { - if (port == AR7240_PORT_CPU) - portmask = ar7240sw_port_mask_but(as, AR7240_PORT_CPU); - else - portmask = ar7240sw_port_mask(as, AR7240_PORT_CPU); - } - - /* allow the port to talk to all other ports, but exclude its - * own ID to prevent frames from being reflected back to the - * port that they came from */ - portmask &= ar7240sw_port_mask_but(as, port); - - ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl); - if (sw_is_ar934x(as)) { - u32 vlan1, vlan2; - - vlan1 = (vid << AR934X_PORT_VLAN1_DEFAULT_CVID_S); - vlan2 = (portmask << AR934X_PORT_VLAN2_PORT_VID_MEM_S) | - (mode << AR934X_PORT_VLAN2_8021Q_MODE_S); - ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN1(port), vlan1); - ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN2(port), vlan2); - } else { - u32 vlan; - - vlan = vid | (mode << AR7240_PORT_VLAN_MODE_S) | - (portmask << AR7240_PORT_VLAN_DEST_PORTS_S); - - ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan); - } -} - -static int ar7240_set_addr(struct ar7240sw *as, u8 *addr) -{ - struct mii_bus *mii = as->mii_bus; - u32 t; - - t = (addr[4] << 8) | addr[5]; - ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR0, t); - - t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]; - ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR1, t); - - return 0; -} - -static int -ar7240_set_vid(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - as->vlan_id[val->port_vlan] = val->value.i; - return 0; -} - -static int -ar7240_get_vid(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - val->value.i = as->vlan_id[val->port_vlan]; - return 0; -} - -static int -ar7240_set_pvid(struct switch_dev *dev, int port, int vlan) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - - /* make sure no invalid PVIDs get set */ - - if (vlan >= dev->vlans) - return -EINVAL; - - as->pvid[port] = vlan; - return 0; -} - -static int -ar7240_get_pvid(struct switch_dev *dev, int port, int *vlan) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - *vlan = as->pvid[port]; - return 0; -} - -static int -ar7240_get_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 ports = as->vlan_table[val->port_vlan]; - int i; - - val->len = 0; - for (i = 0; i < as->swdev.ports; i++) { - struct switch_port *p; - - if (!(ports & (1 << i))) - continue; - - p = &val->value.ports[val->len++]; - p->id = i; - if (as->vlan_tagged & (1 << i)) - p->flags = (1 << SWITCH_PORT_FLAG_TAGGED); - else - p->flags = 0; - } - return 0; -} - -static int -ar7240_set_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 *vt = &as->vlan_table[val->port_vlan]; - int i, j; - - *vt = 0; - for (i = 0; i < val->len; i++) { - struct switch_port *p = &val->value.ports[i]; - - if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) - as->vlan_tagged |= (1 << p->id); - else { - as->vlan_tagged &= ~(1 << p->id); - as->pvid[p->id] = val->port_vlan; - - /* make sure that an untagged port does not - * appear in other vlans */ - for (j = 0; j < AR7240_MAX_VLANS; j++) { - if (j == val->port_vlan) - continue; - as->vlan_table[j] &= ~(1 << p->id); - } - } - - *vt |= 1 << p->id; - } - return 0; -} - -static int -ar7240_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - as->vlan = !!val->value.i; - return 0; -} - -static int -ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - val->value.i = as->vlan; - return 0; -} - -static void -ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val) -{ - struct mii_bus *mii = as->mii_bus; - - if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5)) - return; - - if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) { - val &= AR7240_VTUDATA_MEMBER; - val |= AR7240_VTUDATA_VALID; - ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val); - } - op |= AR7240_VTU_ACTIVE; - ar7240sw_reg_write(mii, AR7240_REG_VTU, op); -} - -static int -ar7240_hw_apply(struct switch_dev *dev) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 portmask[AR7240_NUM_PORTS]; - int i, j; - - /* flush all vlan translation unit entries */ - ar7240_vtu_op(as, AR7240_VTU_OP_FLUSH, 0); - - memset(portmask, 0, sizeof(portmask)); - if (as->vlan) { - /* calculate the port destination masks and load vlans - * into the vlan translation unit */ - for (j = 0; j < AR7240_MAX_VLANS; j++) { - u8 vp = as->vlan_table[j]; - - if (!vp) - continue; - - for (i = 0; i < as->swdev.ports; i++) { - u8 mask = (1 << i); - if (vp & mask) - portmask[i] |= vp & ~mask; - } - - ar7240_vtu_op(as, - AR7240_VTU_OP_LOAD | - (as->vlan_id[j] << AR7240_VTU_VID_S), - as->vlan_table[j]); - } - } else { - /* vlan disabled: - * isolate all ports, but connect them to the cpu port */ - for (i = 0; i < as->swdev.ports; i++) { - if (i == AR7240_PORT_CPU) - continue; - - portmask[i] = 1 << AR7240_PORT_CPU; - portmask[AR7240_PORT_CPU] |= (1 << i); - } - } - - /* update the port destination mask registers and tag settings */ - for (i = 0; i < as->swdev.ports; i++) - ar7240sw_setup_port(as, i, portmask[i]); - - return 0; -} - -static int -ar7240_reset_switch(struct switch_dev *dev) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - ar7240sw_reset(as); - return 0; -} - -static int -ar7240_get_port_link(struct switch_dev *dev, int port, - struct switch_port_link *link) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - u32 status; - - if (port > AR7240_NUM_PORTS) - return -EINVAL; - - status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); - link->aneg = !!(status & AR7240_PORT_STATUS_LINK_AUTO); - if (link->aneg) { - link->link = !!(status & AR7240_PORT_STATUS_LINK_UP); - if (!link->link) - return 0; - } else { - link->link = true; - } - - link->duplex = !!(status & AR7240_PORT_STATUS_DUPLEX); - link->tx_flow = !!(status & AR7240_PORT_STATUS_TXFLOW); - link->rx_flow = !!(status & AR7240_PORT_STATUS_RXFLOW); - switch (status & AR7240_PORT_STATUS_SPEED_M) { - case AR7240_PORT_STATUS_SPEED_10: - link->speed = SWITCH_PORT_SPEED_10; - break; - case AR7240_PORT_STATUS_SPEED_100: - link->speed = SWITCH_PORT_SPEED_100; - break; - case AR7240_PORT_STATUS_SPEED_1000: - link->speed = SWITCH_PORT_SPEED_1000; - break; - } - - return 0; -} - -static int -ar7240_get_port_stats(struct switch_dev *dev, int port, - struct switch_port_stats *stats) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - - if (port > AR7240_NUM_PORTS) - return -EINVAL; - - ar7240sw_capture_stats(as); - - read_lock(&as->stats_lock); - stats->rx_bytes = as->port_stats[port].rx_good_byte; - stats->tx_bytes = as->port_stats[port].tx_byte; - read_unlock(&as->stats_lock); - - return 0; -} - -static struct switch_attr ar7240_globals[] = { - { - .type = SWITCH_TYPE_INT, - .name = "enable_vlan", - .description = "Enable VLAN mode", - .set = ar7240_set_vlan, - .get = ar7240_get_vlan, - .max = 1 - }, -}; - -static struct switch_attr ar7240_port[] = { -}; - -static struct switch_attr ar7240_vlan[] = { - { - .type = SWITCH_TYPE_INT, - .name = "vid", - .description = "VLAN ID", - .set = ar7240_set_vid, - .get = ar7240_get_vid, - .max = 4094, - }, -}; - -static const struct switch_dev_ops ar7240_ops = { - .attr_global = { - .attr = ar7240_globals, - .n_attr = ARRAY_SIZE(ar7240_globals), - }, - .attr_port = { - .attr = ar7240_port, - .n_attr = ARRAY_SIZE(ar7240_port), - }, - .attr_vlan = { - .attr = ar7240_vlan, - .n_attr = ARRAY_SIZE(ar7240_vlan), - }, - .get_port_pvid = ar7240_get_pvid, - .set_port_pvid = ar7240_set_pvid, - .get_vlan_ports = ar7240_get_ports, - .set_vlan_ports = ar7240_set_ports, - .apply_config = ar7240_hw_apply, - .reset_switch = ar7240_reset_switch, - .get_port_link = ar7240_get_port_link, - .get_port_stats = ar7240_get_port_stats, -}; - -static struct ar7240sw *ar7240_probe(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct mii_bus *mii = ag->mii_bus; - struct ar7240sw *as; - struct switch_dev *swdev; - u32 ctrl; - u16 phy_id1; - u16 phy_id2; - int i; - - phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1); - phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2); - if ((phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) && - (phy_id1 != AR934X_PHY_ID1 || phy_id2 != AR934X_PHY_ID2)) { - pr_err("%s: unknown phy id '%04x:%04x'\n", - dev_name(&mii->dev), phy_id1, phy_id2); - return NULL; - } - - as = kzalloc(sizeof(*as), GFP_KERNEL); - if (!as) - return NULL; - - as->mii_bus = mii; - as->swdata = pdata->switch_data; - - swdev = &as->swdev; - - ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL); - as->ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & - AR7240_MASK_CTRL_VERSION_M; - - if (sw_is_ar7240(as)) { - swdev->name = "AR7240/AR9330 built-in switch"; - swdev->ports = AR7240_NUM_PORTS - 1; - } else if (sw_is_ar934x(as)) { - swdev->name = "AR934X built-in switch"; - - if (pdata->phy_if_mode == PHY_INTERFACE_MODE_GMII) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, - AR934X_OPER_MODE0_MAC_GMII_EN); - } else if (pdata->phy_if_mode == PHY_INTERFACE_MODE_MII) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, - AR934X_OPER_MODE0_PHY_MII_EN); - } else { - pr_err("%s: invalid PHY interface mode\n", - dev_name(&mii->dev)); - goto err_free; - } - - if (as->swdata->phy4_mii_en) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1, - AR934X_REG_OPER_MODE1_PHY4_MII_EN); - swdev->ports = AR7240_NUM_PORTS - 1; - } else { - swdev->ports = AR7240_NUM_PORTS; - } - } else { - pr_err("%s: unsupported chip, ctrl=%08x\n", - dev_name(&mii->dev), ctrl); - goto err_free; - } - - swdev->cpu_port = AR7240_PORT_CPU; - swdev->vlans = AR7240_MAX_VLANS; - swdev->ops = &ar7240_ops; - - if (register_switch(&as->swdev, ag->dev) < 0) - goto err_free; - - pr_info("%s: Found an %s\n", dev_name(&mii->dev), swdev->name); - - /* initialize defaults */ - for (i = 0; i < AR7240_MAX_VLANS; i++) - as->vlan_id[i] = i; - - as->vlan_table[0] = ar7240sw_port_mask_all(as); - - return as; - -err_free: - kfree(as); - return NULL; -} - -static void link_function(struct work_struct *work) { - struct ag71xx *ag = container_of(work, struct ag71xx, link_work.work); - struct ar7240sw *as = ag->phy_priv; - unsigned long flags; - u8 mask; - int i; - int status = 0; - - mask = ~as->swdata->phy_poll_mask; - for (i = 0; i < AR7240_NUM_PHYS; i++) { - int link; - - if (!(mask & BIT(i))) - continue; - - link = ar7240sw_phy_read(ag->mii_bus, i, MII_BMSR); - if (link & BMSR_LSTATUS) { - status = 1; - break; - } - } - - spin_lock_irqsave(&ag->lock, flags); - if (status != ag->link) { - ag->link = status; - ag71xx_link_adjust(ag); - } - spin_unlock_irqrestore(&ag->lock, flags); - - schedule_delayed_work(&ag->link_work, HZ / 2); -} - -void ag71xx_ar7240_start(struct ag71xx *ag) -{ - struct ar7240sw *as = ag->phy_priv; - - ar7240sw_reset(as); - - ag->speed = SPEED_1000; - ag->duplex = 1; - - ar7240_set_addr(as, ag->dev->dev_addr); - ar7240_hw_apply(&as->swdev); - - schedule_delayed_work(&ag->link_work, HZ / 10); -} - -void ag71xx_ar7240_stop(struct ag71xx *ag) -{ - cancel_delayed_work_sync(&ag->link_work); -} - -int ag71xx_ar7240_init(struct ag71xx *ag) -{ - struct ar7240sw *as; - - as = ar7240_probe(ag); - if (!as) - return -ENODEV; - - ag->phy_priv = as; - ar7240sw_reset(as); - - rwlock_init(&as->stats_lock); - INIT_DELAYED_WORK(&ag->link_work, link_function); - - return 0; -} - -void ag71xx_ar7240_cleanup(struct ag71xx *ag) -{ - struct ar7240sw *as = ag->phy_priv; - - if (!as) - return; - - unregister_switch(&as->swdev); - kfree(as); - ag->phy_priv = NULL; -} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c deleted file mode 100644 index 7ec43b7..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * Special support for the Atheros ar8216 switch chip - * - * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org> - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -#define AR8216_PACKET_TYPE_MASK 0xf -#define AR8216_PACKET_TYPE_NORMAL 0 - -#define AR8216_HEADER_LEN 2 - -void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) -{ - skb_push(skb, AR8216_HEADER_LEN); - skb->data[0] = 0x10; - skb->data[1] = 0x80; -} - -int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, - int pktlen) -{ - u8 type; - - type = skb->data[1] & AR8216_PACKET_TYPE_MASK; - switch (type) { - case AR8216_PACKET_TYPE_NORMAL: - break; - - default: - return -EINVAL; - } - - skb_pull(skb, AR8216_HEADER_LEN); - return 0; -} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c deleted file mode 100644 index 757a572..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c +++ /dev/null @@ -1,284 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/debugfs.h> - -#include "ag71xx.h" - -static struct dentry *ag71xx_debugfs_root; - -static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file) -{ - file->private_data = inode->i_private; - return 0; -} - -void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) -{ - if (status) - ag->debug.int_stats.total++; - if (status & AG71XX_INT_TX_PS) - ag->debug.int_stats.tx_ps++; - if (status & AG71XX_INT_TX_UR) - ag->debug.int_stats.tx_ur++; - if (status & AG71XX_INT_TX_BE) - ag->debug.int_stats.tx_be++; - if (status & AG71XX_INT_RX_PR) - ag->debug.int_stats.rx_pr++; - if (status & AG71XX_INT_RX_OF) - ag->debug.int_stats.rx_of++; - if (status & AG71XX_INT_RX_BE) - ag->debug.int_stats.rx_be++; -} - -static ssize_t read_file_int_stats(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ -#define PR_INT_STAT(_label, _field) \ - len += snprintf(buf + len, sizeof(buf) - len, \ - "%20s: %10lu\n", _label, ag->debug.int_stats._field); - - struct ag71xx *ag = file->private_data; - char buf[256]; - unsigned int len = 0; - - PR_INT_STAT("TX Packet Sent", tx_ps); - PR_INT_STAT("TX Underrun", tx_ur); - PR_INT_STAT("TX Bus Error", tx_be); - PR_INT_STAT("RX Packet Received", rx_pr); - PR_INT_STAT("RX Overflow", rx_of); - PR_INT_STAT("RX Bus Error", rx_be); - len += snprintf(buf + len, sizeof(buf) - len, "\n"); - PR_INT_STAT("Total", total); - - return simple_read_from_buffer(user_buf, count, ppos, buf, len); -#undef PR_INT_STAT -} - -static const struct file_operations ag71xx_fops_int_stats = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_int_stats, - .owner = THIS_MODULE -}; - -void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) -{ - struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; - - if (rx) { - stats->rx_count++; - stats->rx_packets += rx; - if (rx <= AG71XX_NAPI_WEIGHT) - stats->rx[rx]++; - if (rx > stats->rx_packets_max) - stats->rx_packets_max = rx; - } - - if (tx) { - stats->tx_count++; - stats->tx_packets += tx; - if (tx <= AG71XX_NAPI_WEIGHT) - stats->tx[tx]++; - if (tx > stats->tx_packets_max) - stats->tx_packets_max = tx; - } -} - -static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct ag71xx *ag = file->private_data; - struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; - char *buf; - unsigned int buflen; - unsigned int len = 0; - unsigned long rx_avg = 0; - unsigned long tx_avg = 0; - int ret; - int i; - - buflen = 2048; - buf = kmalloc(buflen, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - if (stats->rx_count) - rx_avg = stats->rx_packets / stats->rx_count; - - if (stats->tx_count) - tx_avg = stats->tx_packets / stats->tx_count; - - len += snprintf(buf + len, buflen - len, "%3s %10s %10s\n", - "len", "rx", "tx"); - - for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++) - len += snprintf(buf + len, buflen - len, - "%3d: %10lu %10lu\n", - i, stats->rx[i], stats->tx[i]); - - len += snprintf(buf + len, buflen - len, "\n"); - - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "sum", stats->rx_count, stats->tx_count); - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "avg", rx_avg, tx_avg); - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "max", stats->rx_packets_max, stats->tx_packets_max); - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "pkt", stats->rx_packets, stats->tx_packets); - - ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); - kfree(buf); - - return ret; -} - -static const struct file_operations ag71xx_fops_napi_stats = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_napi_stats, - .owner = THIS_MODULE -}; - -#define DESC_PRINT_LEN 64 - -static ssize_t read_file_ring(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos, - struct ag71xx *ag, - struct ag71xx_ring *ring, - unsigned desc_reg) -{ - char *buf; - unsigned int buflen; - unsigned int len = 0; - unsigned long flags; - ssize_t ret; - int curr; - int dirty; - u32 desc_hw; - int i; - - buflen = (ring->size * DESC_PRINT_LEN); - buf = kmalloc(buflen, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - len += snprintf(buf + len, buflen - len, - "Idx ... %-8s %-8s %-8s %-8s . %-10s\n", - "desc", "next", "data", "ctrl", "timestamp"); - - spin_lock_irqsave(&ag->lock, flags); - - curr = (ring->curr % ring->size); - dirty = (ring->dirty % ring->size); - desc_hw = ag71xx_rr(ag, desc_reg); - for (i = 0; i < ring->size; i++) { - struct ag71xx_buf *ab = &ring->buf[i]; - u32 desc_dma = ((u32) ring->descs_dma) + i * ring->desc_size; - - len += snprintf(buf + len, buflen - len, - "%3d %c%c%c %08x %08x %08x %08x %c %10lu\n", - i, - (i == curr) ? 'C' : ' ', - (i == dirty) ? 'D' : ' ', - (desc_hw == desc_dma) ? 'H' : ' ', - desc_dma, - ab->desc->next, - ab->desc->data, - ab->desc->ctrl, - (ab->desc->ctrl & DESC_EMPTY) ? 'E' : '*', - ab->timestamp); - } - - spin_unlock_irqrestore(&ag->lock, flags); - - ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); - kfree(buf); - - return ret; -} - -static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct ag71xx *ag = file->private_data; - - return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring, - AG71XX_REG_TX_DESC); -} - -static const struct file_operations ag71xx_fops_tx_ring = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_tx_ring, - .owner = THIS_MODULE -}; - -static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct ag71xx *ag = file->private_data; - - return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring, - AG71XX_REG_RX_DESC); -} - -static const struct file_operations ag71xx_fops_rx_ring = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_rx_ring, - .owner = THIS_MODULE -}; - -void ag71xx_debugfs_exit(struct ag71xx *ag) -{ - debugfs_remove_recursive(ag->debug.debugfs_dir); -} - -int ag71xx_debugfs_init(struct ag71xx *ag) -{ - struct device *dev = &ag->pdev->dev; - - ag->debug.debugfs_dir = debugfs_create_dir(dev_name(dev), - ag71xx_debugfs_root); - if (!ag->debug.debugfs_dir) { - dev_err(dev, "unable to create debugfs directory\n"); - return -ENOENT; - } - - debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_int_stats); - debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_napi_stats); - debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_tx_ring); - debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_rx_ring); - - return 0; -} - -int ag71xx_debugfs_root_init(void) -{ - if (ag71xx_debugfs_root) - return -EBUSY; - - ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); - if (!ag71xx_debugfs_root) - return -ENOENT; - - return 0; -} - -void ag71xx_debugfs_root_exit(void) -{ - debugfs_remove(ag71xx_debugfs_root); - ag71xx_debugfs_root = NULL; -} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c deleted file mode 100644 index 498fbed..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -static int ag71xx_ethtool_get_settings(struct net_device *dev, - struct ethtool_cmd *cmd) -{ - struct ag71xx *ag = netdev_priv(dev); - struct phy_device *phydev = ag->phy_dev; - - if (!phydev) - return -ENODEV; - - return phy_ethtool_gset(phydev, cmd); -} - -static int ag71xx_ethtool_set_settings(struct net_device *dev, - struct ethtool_cmd *cmd) -{ - struct ag71xx *ag = netdev_priv(dev); - struct phy_device *phydev = ag->phy_dev; - - if (!phydev) - return -ENODEV; - - return phy_ethtool_sset(phydev, cmd); -} - -static void ag71xx_ethtool_get_drvinfo(struct net_device *dev, - struct ethtool_drvinfo *info) -{ - struct ag71xx *ag = netdev_priv(dev); - - strcpy(info->driver, ag->pdev->dev.driver->name); - strcpy(info->version, AG71XX_DRV_VERSION); - strcpy(info->bus_info, dev_name(&ag->pdev->dev)); -} - -static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - - return ag->msg_enable; -} - -static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level) -{ - struct ag71xx *ag = netdev_priv(dev); - - ag->msg_enable = msg_level; -} - -static void ag71xx_ethtool_get_ringparam(struct net_device *dev, - struct ethtool_ringparam *er) -{ - struct ag71xx *ag = netdev_priv(dev); - - er->tx_max_pending = AG71XX_TX_RING_SIZE_MAX; - er->rx_max_pending = AG71XX_RX_RING_SIZE_MAX; - er->rx_mini_max_pending = 0; - er->rx_jumbo_max_pending = 0; - - er->tx_pending = ag->tx_ring.size; - er->rx_pending = ag->rx_ring.size; - er->rx_mini_pending = 0; - er->rx_jumbo_pending = 0; -} - -static int ag71xx_ethtool_set_ringparam(struct net_device *dev, - struct ethtool_ringparam *er) -{ - struct ag71xx *ag = netdev_priv(dev); - unsigned tx_size; - unsigned rx_size; - int err; - - if (er->rx_mini_pending != 0|| - er->rx_jumbo_pending != 0 || - er->rx_pending == 0 || - er->tx_pending == 0) - return -EINVAL; - - tx_size = er->tx_pending < AG71XX_TX_RING_SIZE_MAX ? - er->tx_pending : AG71XX_TX_RING_SIZE_MAX; - - rx_size = er->rx_pending < AG71XX_RX_RING_SIZE_MAX ? - er->rx_pending : AG71XX_RX_RING_SIZE_MAX; - - if (netif_running(dev)) { - err = dev->netdev_ops->ndo_stop(dev); - if (err) - return err; - } - - ag->tx_ring.size = tx_size; - ag->rx_ring.size = rx_size; - - if (netif_running(dev)) - err = dev->netdev_ops->ndo_open(dev); - - return err; -} - -struct ethtool_ops ag71xx_ethtool_ops = { - .set_settings = ag71xx_ethtool_set_settings, - .get_settings = ag71xx_ethtool_get_settings, - .get_drvinfo = ag71xx_ethtool_get_drvinfo, - .get_msglevel = ag71xx_ethtool_get_msglevel, - .set_msglevel = ag71xx_ethtool_set_msglevel, - .get_ringparam = ag71xx_ethtool_get_ringparam, - .set_ringparam = ag71xx_ethtool_set_ringparam, - .get_link = ethtool_op_get_link, -}; diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c deleted file mode 100644 index d010373..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ /dev/null @@ -1,1325 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -#define AG71XX_DEFAULT_MSG_ENABLE \ - (NETIF_MSG_DRV \ - | NETIF_MSG_PROBE \ - | NETIF_MSG_LINK \ - | NETIF_MSG_TIMER \ - | NETIF_MSG_IFDOWN \ - | NETIF_MSG_IFUP \ - | NETIF_MSG_RX_ERR \ - | NETIF_MSG_TX_ERR) - -static int ag71xx_msg_level = -1; - -module_param_named(msg_level, ag71xx_msg_level, int, 0); -MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); - -#define ETH_SWITCH_HEADER_LEN 2 - -static inline unsigned int ag71xx_max_frame_len(unsigned int mtu) -{ - return ETH_SWITCH_HEADER_LEN + ETH_HLEN + VLAN_HLEN + mtu + ETH_FCS_LEN; -} - -static void ag71xx_dump_dma_regs(struct ag71xx *ag) -{ - DBG("%s: dma_tx_ctrl=%08x, dma_tx_desc=%08x, dma_tx_status=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_TX_CTRL), - ag71xx_rr(ag, AG71XX_REG_TX_DESC), - ag71xx_rr(ag, AG71XX_REG_TX_STATUS)); - - DBG("%s: dma_rx_ctrl=%08x, dma_rx_desc=%08x, dma_rx_status=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_RX_CTRL), - ag71xx_rr(ag, AG71XX_REG_RX_DESC), - ag71xx_rr(ag, AG71XX_REG_RX_STATUS)); -} - -static void ag71xx_dump_regs(struct ag71xx *ag) -{ - DBG("%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_MAC_CFG1), - ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), - ag71xx_rr(ag, AG71XX_REG_MAC_IPG), - ag71xx_rr(ag, AG71XX_REG_MAC_HDX), - ag71xx_rr(ag, AG71XX_REG_MAC_MFL)); - DBG("%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL), - ag71xx_rr(ag, AG71XX_REG_MAC_ADDR1), - ag71xx_rr(ag, AG71XX_REG_MAC_ADDR2)); - DBG("%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); - DBG("%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); -} - -static inline void ag71xx_dump_intr(struct ag71xx *ag, char *label, u32 intr) -{ - DBG("%s: %s intr=%08x %s%s%s%s%s%s\n", - ag->dev->name, label, intr, - (intr & AG71XX_INT_TX_PS) ? "TXPS " : "", - (intr & AG71XX_INT_TX_UR) ? "TXUR " : "", - (intr & AG71XX_INT_TX_BE) ? "TXBE " : "", - (intr & AG71XX_INT_RX_PR) ? "RXPR " : "", - (intr & AG71XX_INT_RX_OF) ? "RXOF " : "", - (intr & AG71XX_INT_RX_BE) ? "RXBE " : ""); -} - -static void ag71xx_ring_free(struct ag71xx_ring *ring) -{ - kfree(ring->buf); - - if (ring->descs_cpu) - dma_free_coherent(NULL, ring->size * ring->desc_size, - ring->descs_cpu, ring->descs_dma); -} - -static int ag71xx_ring_alloc(struct ag71xx_ring *ring) -{ - int err; - int i; - - ring->desc_size = sizeof(struct ag71xx_desc); - if (ring->desc_size % cache_line_size()) { - DBG("ag71xx: ring %p, desc size %u rounded to %u\n", - ring, ring->desc_size, - roundup(ring->desc_size, cache_line_size())); - ring->desc_size = roundup(ring->desc_size, cache_line_size()); - } - - ring->descs_cpu = dma_alloc_coherent(NULL, ring->size * ring->desc_size, - &ring->descs_dma, GFP_ATOMIC); - if (!ring->descs_cpu) { - err = -ENOMEM; - goto err; - } - - - ring->buf = kzalloc(ring->size * sizeof(*ring->buf), GFP_KERNEL); - if (!ring->buf) { - err = -ENOMEM; - goto err; - } - - for (i = 0; i < ring->size; i++) { - int idx = i * ring->desc_size; - ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[idx]; - DBG("ag71xx: ring %p, desc %d at %p\n", - ring, i, ring->buf[i].desc); - } - - return 0; - -err: - return err; -} - -static void ag71xx_ring_tx_clean(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->tx_ring; - struct net_device *dev = ag->dev; - u32 bytes_compl = 0, pkts_compl = 0; - - while (ring->curr != ring->dirty) { - u32 i = ring->dirty % ring->size; - - if (!ag71xx_desc_empty(ring->buf[i].desc)) { - ring->buf[i].desc->ctrl = 0; - dev->stats.tx_errors++; - } - - if (ring->buf[i].skb) { - bytes_compl += ring->buf[i].len; - pkts_compl++; - dev_kfree_skb_any(ring->buf[i].skb); - } - ring->buf[i].skb = NULL; - ring->dirty++; - } - - /* flush descriptors */ - wmb(); - - netdev_completed_queue(dev, pkts_compl, bytes_compl); -} - -static void ag71xx_ring_tx_init(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->tx_ring; - int i; - - for (i = 0; i < ring->size; i++) { - ring->buf[i].desc->next = (u32) (ring->descs_dma + - ring->desc_size * ((i + 1) % ring->size)); - - ring->buf[i].desc->ctrl = DESC_EMPTY; - ring->buf[i].skb = NULL; - } - - /* flush descriptors */ - wmb(); - - ring->curr = 0; - ring->dirty = 0; - netdev_reset_queue(ag->dev); -} - -static void ag71xx_ring_rx_clean(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->rx_ring; - int i; - - if (!ring->buf) - return; - - for (i = 0; i < ring->size; i++) - if (ring->buf[i].rx_buf) { - dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr, - ag->rx_buf_size, DMA_FROM_DEVICE); - kfree(ring->buf[i].rx_buf); - } -} - -static int ag71xx_buffer_offset(struct ag71xx *ag) -{ - int offset = NET_SKB_PAD; - - /* - * On AR71xx/AR91xx packets must be 4-byte aligned. - * - * When using builtin AR8216 support, hardware adds a 2-byte header, - * so we don't need any extra alignment in that case. - */ - if (!ag71xx_get_pdata(ag)->is_ar724x || ag71xx_has_ar8216(ag)) - return offset; - - return offset + NET_IP_ALIGN; -} - -static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf, - int offset) -{ - void *data; - - data = kmalloc(ag->rx_buf_size + - SKB_DATA_ALIGN(sizeof(struct skb_shared_info)), - GFP_ATOMIC); - if (!data) - return false; - - buf->rx_buf = data; - buf->dma_addr = dma_map_single(&ag->dev->dev, data, ag->rx_buf_size, - DMA_FROM_DEVICE); - buf->desc->data = (u32) buf->dma_addr + offset; - return true; -} - -static int ag71xx_ring_rx_init(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->rx_ring; - unsigned int i; - int ret; - int offset = ag71xx_buffer_offset(ag); - - ret = 0; - for (i = 0; i < ring->size; i++) { - ring->buf[i].desc->next = (u32) (ring->descs_dma + - ring->desc_size * ((i + 1) % ring->size)); - - DBG("ag71xx: RX desc at %p, next is %08x\n", - ring->buf[i].desc, - ring->buf[i].desc->next); - } - - for (i = 0; i < ring->size; i++) { - if (!ag71xx_fill_rx_buf(ag, &ring->buf[i], offset)) { - ret = -ENOMEM; - break; - } - - ring->buf[i].desc->ctrl = DESC_EMPTY; - } - - /* flush descriptors */ - wmb(); - - ring->curr = 0; - ring->dirty = 0; - - return ret; -} - -static int ag71xx_ring_rx_refill(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->rx_ring; - unsigned int count; - int offset = ag71xx_buffer_offset(ag); - - count = 0; - for (; ring->curr - ring->dirty > 0; ring->dirty++) { - unsigned int i; - - i = ring->dirty % ring->size; - - if (!ring->buf[i].rx_buf && - !ag71xx_fill_rx_buf(ag, &ring->buf[i], offset)) - break; - - ring->buf[i].desc->ctrl = DESC_EMPTY; - count++; - } - - /* flush descriptors */ - wmb(); - - DBG("%s: %u rx descriptors refilled\n", ag->dev->name, count); - - return count; -} - -static int ag71xx_rings_init(struct ag71xx *ag) -{ - int ret; - - ret = ag71xx_ring_alloc(&ag->tx_ring); - if (ret) - return ret; - - ag71xx_ring_tx_init(ag); - - ret = ag71xx_ring_alloc(&ag->rx_ring); - if (ret) - return ret; - - ret = ag71xx_ring_rx_init(ag); - return ret; -} - -static void ag71xx_rings_cleanup(struct ag71xx *ag) -{ - ag71xx_ring_rx_clean(ag); - ag71xx_ring_free(&ag->rx_ring); - - ag71xx_ring_tx_clean(ag); - netdev_reset_queue(ag->dev); - ag71xx_ring_free(&ag->tx_ring); -} - -static unsigned char *ag71xx_speed_str(struct ag71xx *ag) -{ - switch (ag->speed) { - case SPEED_1000: - return "1000"; - case SPEED_100: - return "100"; - case SPEED_10: - return "10"; - } - - return "?"; -} - -static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) -{ - u32 t; - - t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16) - | (((u32) mac[3]) << 8) | ((u32) mac[2]); - - ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t); - - t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16); - ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t); -} - -static void ag71xx_dma_reset(struct ag71xx *ag) -{ - u32 val; - int i; - - ag71xx_dump_dma_regs(ag); - - /* stop RX and TX */ - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); - ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); - - /* - * give the hardware some time to really stop all rx/tx activity - * clearing the descriptors too early causes random memory corruption - */ - mdelay(1); - - /* clear descriptor addresses */ - ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma); - ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma); - - /* clear pending RX/TX interrupts */ - for (i = 0; i < 256; i++) { - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); - } - - /* clear pending errors */ - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF); - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR); - - val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); - if (val) - pr_alert("%s: unable to clear DMA Rx status: %08x\n", - ag->dev->name, val); - - val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); - - /* mask out reserved bits */ - val &= ~0xff000000; - - if (val) - pr_alert("%s: unable to clear DMA Tx status: %08x\n", - ag->dev->name, val); - - ag71xx_dump_dma_regs(ag); -} - -#define MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | \ - MAC_CFG1_SRX | MAC_CFG1_STX) - -#define FIFO_CFG0_INIT (FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT) - -#define FIFO_CFG4_INIT (FIFO_CFG4_DE | FIFO_CFG4_DV | FIFO_CFG4_FC | \ - FIFO_CFG4_CE | FIFO_CFG4_CR | FIFO_CFG4_LM | \ - FIFO_CFG4_LO | FIFO_CFG4_OK | FIFO_CFG4_MC | \ - FIFO_CFG4_BC | FIFO_CFG4_DR | FIFO_CFG4_LE | \ - FIFO_CFG4_CF | FIFO_CFG4_PF | FIFO_CFG4_UO | \ - FIFO_CFG4_VT) - -#define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \ - FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \ - FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \ - FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \ - FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \ - FIFO_CFG5_17 | FIFO_CFG5_SF) - -static void ag71xx_hw_stop(struct ag71xx *ag) -{ - /* disable all interrupts and stop the rx/tx engine */ - ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0); - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); - ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); -} - -static void ag71xx_hw_setup(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - /* setup MAC configuration registers */ - ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT); - - ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, - MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK); - - /* setup max frame length to zero */ - ag71xx_wr(ag, AG71XX_REG_MAC_MFL, 0); - - /* setup FIFO configuration registers */ - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); - if (pdata->is_ar724x) { - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2); - } else { - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff); - } - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); -} - -static void ag71xx_hw_init(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - u32 reset_mask = pdata->reset_bit; - - ag71xx_hw_stop(ag); - - if (pdata->is_ar724x) { - u32 reset_phy = reset_mask; - - reset_phy &= AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY; - reset_mask &= ~(AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY); - - ath79_device_reset_set(reset_phy); - mdelay(50); - ath79_device_reset_clear(reset_phy); - mdelay(200); - } - - ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); - udelay(20); - - ath79_device_reset_set(reset_mask); - mdelay(100); - ath79_device_reset_clear(reset_mask); - mdelay(200); - - ag71xx_hw_setup(ag); - - ag71xx_dma_reset(ag); -} - -static void ag71xx_fast_reset(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct net_device *dev = ag->dev; - u32 reset_mask = pdata->reset_bit; - u32 rx_ds, tx_ds; - u32 mii_reg; - - reset_mask &= AR71XX_RESET_GE0_MAC | AR71XX_RESET_GE1_MAC; - - mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); - rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); - tx_ds = ag71xx_rr(ag, AG71XX_REG_TX_DESC); - - ath79_device_reset_set(reset_mask); - udelay(10); - ath79_device_reset_clear(reset_mask); - udelay(10); - - ag71xx_dma_reset(ag); - ag71xx_hw_setup(ag); - - /* setup max frame length */ - ag71xx_wr(ag, AG71XX_REG_MAC_MFL, - ag71xx_max_frame_len(ag->dev->mtu)); - - ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds); - ag71xx_wr(ag, AG71XX_REG_TX_DESC, tx_ds); - ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg); - - ag71xx_hw_set_macaddr(ag, dev->dev_addr); -} - -static void ag71xx_hw_start(struct ag71xx *ag) -{ - /* start RX engine */ - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); - - /* enable interrupts */ - ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT); -} - -void ag71xx_link_adjust(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - u32 cfg2; - u32 ifctl; - u32 fifo5; - - if (!ag->link) { - ag71xx_hw_stop(ag); - netif_carrier_off(ag->dev); - if (netif_msg_link(ag)) - pr_info("%s: link down\n", ag->dev->name); - return; - } - - if (pdata->is_ar724x) - ag71xx_fast_reset(ag); - - cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); - cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX); - cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0; - - ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL); - ifctl &= ~(MAC_IFCTL_SPEED); - - fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); - fifo5 &= ~FIFO_CFG5_BM; - - switch (ag->speed) { - case SPEED_1000: - cfg2 |= MAC_CFG2_IF_1000; - fifo5 |= FIFO_CFG5_BM; - break; - case SPEED_100: - cfg2 |= MAC_CFG2_IF_10_100; - ifctl |= MAC_IFCTL_SPEED; - break; - case SPEED_10: - cfg2 |= MAC_CFG2_IF_10_100; - break; - default: - BUG(); - return; - } - - if (pdata->is_ar91xx) - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff); - else if (pdata->is_ar724x) - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3); - else - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff); - - if (pdata->set_speed) - pdata->set_speed(ag->speed); - - ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); - ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); - ag71xx_hw_start(ag); - - netif_carrier_on(ag->dev); - if (netif_msg_link(ag)) - pr_info("%s: link up (%sMbps/%s duplex)\n", - ag->dev->name, - ag71xx_speed_str(ag), - (DUPLEX_FULL == ag->duplex) ? "Full" : "Half"); - - DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); - - DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); - - DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), - ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL)); -} - -static int ag71xx_open(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - unsigned int max_frame_len; - int ret; - - max_frame_len = ag71xx_max_frame_len(dev->mtu); - ag->rx_buf_size = max_frame_len + NET_SKB_PAD + NET_IP_ALIGN; - - /* setup max frame length */ - ag71xx_wr(ag, AG71XX_REG_MAC_MFL, max_frame_len); - - ret = ag71xx_rings_init(ag); - if (ret) - goto err; - - napi_enable(&ag->napi); - - netif_carrier_off(dev); - ag71xx_phy_start(ag); - - ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); - ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma); - - ag71xx_hw_set_macaddr(ag, dev->dev_addr); - - netif_start_queue(dev); - - return 0; - -err: - ag71xx_rings_cleanup(ag); - return ret; -} - -static int ag71xx_stop(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - unsigned long flags; - - netif_carrier_off(dev); - ag71xx_phy_stop(ag); - - spin_lock_irqsave(&ag->lock, flags); - - netif_stop_queue(dev); - - ag71xx_hw_stop(ag); - ag71xx_dma_reset(ag); - - napi_disable(&ag->napi); - del_timer_sync(&ag->oom_timer); - - spin_unlock_irqrestore(&ag->lock, flags); - - ag71xx_rings_cleanup(ag); - - return 0; -} - -static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, - struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - struct ag71xx_ring *ring = &ag->tx_ring; - struct ag71xx_desc *desc; - dma_addr_t dma_addr; - int i; - - i = ring->curr % ring->size; - desc = ring->buf[i].desc; - - if (!ag71xx_desc_empty(desc)) - goto err_drop; - - if (ag71xx_has_ar8216(ag)) - ag71xx_add_ar8216_header(ag, skb); - - if (skb->len <= 0) { - DBG("%s: packet len is too small\n", ag->dev->name); - goto err_drop; - } - - dma_addr = dma_map_single(&dev->dev, skb->data, skb->len, - DMA_TO_DEVICE); - - netdev_sent_queue(dev, skb->len); - ring->buf[i].len = skb->len; - ring->buf[i].skb = skb; - ring->buf[i].timestamp = jiffies; - - /* setup descriptor fields */ - desc->data = (u32) dma_addr; - desc->ctrl = skb->len & ag->desc_pktlen_mask; - - /* flush descriptor */ - wmb(); - - ring->curr++; - if (ring->curr == (ring->dirty + ring->size)) { - DBG("%s: tx queue full\n", ag->dev->name); - netif_stop_queue(dev); - } - - DBG("%s: packet injected into TX queue\n", ag->dev->name); - - /* enable TX engine */ - ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE); - - return NETDEV_TX_OK; - -err_drop: - dev->stats.tx_dropped++; - - dev_kfree_skb(skb); - return NETDEV_TX_OK; -} - -static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -{ - struct ag71xx *ag = netdev_priv(dev); - int ret; - - switch (cmd) { - case SIOCETHTOOL: - if (ag->phy_dev == NULL) - break; - - spin_lock_irq(&ag->lock); - ret = phy_ethtool_ioctl(ag->phy_dev, (void *) ifr->ifr_data); - spin_unlock_irq(&ag->lock); - return ret; - - case SIOCSIFHWADDR: - if (copy_from_user - (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) - return -EFAULT; - return 0; - - case SIOCGIFHWADDR: - if (copy_to_user - (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) - return -EFAULT; - return 0; - - case SIOCGMIIPHY: - case SIOCGMIIREG: - case SIOCSMIIREG: - if (ag->phy_dev == NULL) - break; - - return phy_mii_ioctl(ag->phy_dev, ifr, cmd); - - default: - break; - } - - return -EOPNOTSUPP; -} - -static void ag71xx_oom_timer_handler(unsigned long data) -{ - struct net_device *dev = (struct net_device *) data; - struct ag71xx *ag = netdev_priv(dev); - - napi_schedule(&ag->napi); -} - -static void ag71xx_tx_timeout(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - - if (netif_msg_tx_err(ag)) - pr_info("%s: tx timeout\n", ag->dev->name); - - schedule_work(&ag->restart_work); -} - -static void ag71xx_restart_work_func(struct work_struct *work) -{ - struct ag71xx *ag = container_of(work, struct ag71xx, restart_work); - - if (ag71xx_get_pdata(ag)->is_ar724x) { - ag->link = 0; - ag71xx_link_adjust(ag); - return; - } - - ag71xx_stop(ag->dev); - ag71xx_open(ag->dev); -} - -static bool ag71xx_check_dma_stuck(struct ag71xx *ag, unsigned long timestamp) -{ - u32 rx_sm, tx_sm, rx_fd; - - if (likely(time_before(jiffies, timestamp + HZ/10))) - return false; - - if (!netif_carrier_ok(ag->dev)) - return false; - - rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM); - if ((rx_sm & 0x7) == 0x3 && ((rx_sm >> 4) & 0x7) == 0x6) - return true; - - tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM); - rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH); - if (((tx_sm >> 4) & 0x7) == 0 && ((rx_sm & 0x7) == 0) && - ((rx_sm >> 4) & 0x7) == 0 && rx_fd == 0) - return true; - - return false; -} - -static int ag71xx_tx_packets(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->tx_ring; - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - int sent = 0; - int bytes_compl = 0; - - DBG("%s: processing TX ring\n", ag->dev->name); - - while (ring->dirty != ring->curr) { - unsigned int i = ring->dirty % ring->size; - struct ag71xx_desc *desc = ring->buf[i].desc; - struct sk_buff *skb = ring->buf[i].skb; - int len = ring->buf[i].len; - - if (!ag71xx_desc_empty(desc)) { - if (pdata->is_ar7240 && - ag71xx_check_dma_stuck(ag, ring->buf[i].timestamp)) - schedule_work(&ag->restart_work); - break; - } - - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); - - bytes_compl += len; - ag->dev->stats.tx_bytes += len; - ag->dev->stats.tx_packets++; - - dev_kfree_skb_any(skb); - ring->buf[i].skb = NULL; - - ring->dirty++; - sent++; - } - - DBG("%s: %d packets sent out\n", ag->dev->name, sent); - - if (!sent) - return 0; - - netdev_completed_queue(ag->dev, sent, bytes_compl); - if ((ring->curr - ring->dirty) < (ring->size * 3) / 4) - netif_wake_queue(ag->dev); - - return sent; -} - -static int ag71xx_rx_packets(struct ag71xx *ag, int limit) -{ - struct net_device *dev = ag->dev; - struct ag71xx_ring *ring = &ag->rx_ring; - int offset = ag71xx_buffer_offset(ag); - unsigned int pktlen_mask = ag->desc_pktlen_mask; - int done = 0; - - DBG("%s: rx packets, limit=%d, curr=%u, dirty=%u\n", - dev->name, limit, ring->curr, ring->dirty); - - while (done < limit) { - unsigned int i = ring->curr % ring->size; - struct ag71xx_desc *desc = ring->buf[i].desc; - struct sk_buff *skb; - int pktlen; - int err = 0; - - if (ag71xx_desc_empty(desc)) - break; - - if ((ring->dirty + ring->size) == ring->curr) { - ag71xx_assert(0); - break; - } - - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); - - pktlen = desc->ctrl & pktlen_mask; - pktlen -= ETH_FCS_LEN; - - dma_unmap_single(&dev->dev, ring->buf[i].dma_addr, - ag->rx_buf_size, DMA_FROM_DEVICE); - - dev->stats.rx_packets++; - dev->stats.rx_bytes += pktlen; - - skb = build_skb(ring->buf[i].rx_buf, 0); - if (!skb) { - kfree(ring->buf[i].rx_buf); - goto next; - } - - skb_reserve(skb, offset); - skb_put(skb, pktlen); - - if (ag71xx_has_ar8216(ag)) - err = ag71xx_remove_ar8216_header(ag, skb, pktlen); - - if (err) { - dev->stats.rx_dropped++; - kfree_skb(skb); - } else { - skb->dev = dev; - skb->ip_summed = CHECKSUM_NONE; - skb->protocol = eth_type_trans(skb, dev); - netif_receive_skb(skb); - } - -next: - ring->buf[i].rx_buf = NULL; - done++; - - ring->curr++; - } - - ag71xx_ring_rx_refill(ag); - - DBG("%s: rx finish, curr=%u, dirty=%u, done=%d\n", - dev->name, ring->curr, ring->dirty, done); - - return done; -} - -static int ag71xx_poll(struct napi_struct *napi, int limit) -{ - struct ag71xx *ag = container_of(napi, struct ag71xx, napi); - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct net_device *dev = ag->dev; - struct ag71xx_ring *rx_ring; - unsigned long flags; - u32 status; - int tx_done; - int rx_done; - - pdata->ddr_flush(); - tx_done = ag71xx_tx_packets(ag); - - DBG("%s: processing RX ring\n", dev->name); - rx_done = ag71xx_rx_packets(ag, limit); - - ag71xx_debugfs_update_napi_stats(ag, rx_done, tx_done); - - rx_ring = &ag->rx_ring; - if (rx_ring->buf[rx_ring->dirty % rx_ring->size].rx_buf == NULL) - goto oom; - - status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); - if (unlikely(status & RX_STATUS_OF)) { - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF); - dev->stats.rx_fifo_errors++; - - /* restart RX */ - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); - } - - if (rx_done < limit) { - if (status & RX_STATUS_PR) - goto more; - - status = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); - if (status & TX_STATUS_PS) - goto more; - - DBG("%s: disable polling mode, rx=%d, tx=%d,limit=%d\n", - dev->name, rx_done, tx_done, limit); - - napi_complete(napi); - - /* enable interrupts */ - spin_lock_irqsave(&ag->lock, flags); - ag71xx_int_enable(ag, AG71XX_INT_POLL); - spin_unlock_irqrestore(&ag->lock, flags); - return rx_done; - } - -more: - DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n", - dev->name, rx_done, tx_done, limit); - return rx_done; - -oom: - if (netif_msg_rx_err(ag)) - pr_info("%s: out of memory\n", dev->name); - - mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); - napi_complete(napi); - return 0; -} - -static irqreturn_t ag71xx_interrupt(int irq, void *dev_id) -{ - struct net_device *dev = dev_id; - struct ag71xx *ag = netdev_priv(dev); - u32 status; - - status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS); - ag71xx_dump_intr(ag, "raw", status); - - if (unlikely(!status)) - return IRQ_NONE; - - if (unlikely(status & AG71XX_INT_ERR)) { - if (status & AG71XX_INT_TX_BE) { - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE); - dev_err(&dev->dev, "TX BUS error\n"); - } - if (status & AG71XX_INT_RX_BE) { - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE); - dev_err(&dev->dev, "RX BUS error\n"); - } - } - - if (likely(status & AG71XX_INT_POLL)) { - ag71xx_int_disable(ag, AG71XX_INT_POLL); - DBG("%s: enable polling mode\n", dev->name); - napi_schedule(&ag->napi); - } - - ag71xx_debugfs_update_int_stats(ag, status); - - return IRQ_HANDLED; -} - -#ifdef CONFIG_NET_POLL_CONTROLLER -/* - * Polling 'interrupt' - used by things like netconsole to send skbs - * without having to re-enable interrupts. It's not called while - * the interrupt routine is executing. - */ -static void ag71xx_netpoll(struct net_device *dev) -{ - disable_irq(dev->irq); - ag71xx_interrupt(dev->irq, dev); - enable_irq(dev->irq); -} -#endif - -static int ag71xx_change_mtu(struct net_device *dev, int new_mtu) -{ - struct ag71xx *ag = netdev_priv(dev); - unsigned int max_frame_len; - - max_frame_len = ag71xx_max_frame_len(new_mtu); - if (new_mtu < 68 || max_frame_len > ag->max_frame_len) - return -EINVAL; - - if (netif_running(dev)) - return -EBUSY; - - dev->mtu = new_mtu; - return 0; -} - -static const struct net_device_ops ag71xx_netdev_ops = { - .ndo_open = ag71xx_open, - .ndo_stop = ag71xx_stop, - .ndo_start_xmit = ag71xx_hard_start_xmit, - .ndo_do_ioctl = ag71xx_do_ioctl, - .ndo_tx_timeout = ag71xx_tx_timeout, - .ndo_change_mtu = ag71xx_change_mtu, - .ndo_set_mac_address = eth_mac_addr, - .ndo_validate_addr = eth_validate_addr, -#ifdef CONFIG_NET_POLL_CONTROLLER - .ndo_poll_controller = ag71xx_netpoll, -#endif -}; - -static const char *ag71xx_get_phy_if_mode_name(phy_interface_t mode) -{ - switch (mode) { - case PHY_INTERFACE_MODE_MII: - return "MII"; - case PHY_INTERFACE_MODE_GMII: - return "GMII"; - case PHY_INTERFACE_MODE_RMII: - return "RMII"; - case PHY_INTERFACE_MODE_RGMII: - return "RGMII"; - case PHY_INTERFACE_MODE_SGMII: - return "SGMII"; - default: - break; - } - - return "unknown"; -} - - -static int ag71xx_probe(struct platform_device *pdev) -{ - struct net_device *dev; - struct resource *res; - struct ag71xx *ag; - struct ag71xx_platform_data *pdata; - int err; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "no platform data specified\n"); - err = -ENXIO; - goto err_out; - } - - if (pdata->mii_bus_dev == NULL && pdata->phy_mask) { - dev_err(&pdev->dev, "no MII bus device specified\n"); - err = -EINVAL; - goto err_out; - } - - dev = alloc_etherdev(sizeof(*ag)); - if (!dev) { - dev_err(&pdev->dev, "alloc_etherdev failed\n"); - err = -ENOMEM; - goto err_out; - } - - if (!pdata->max_frame_len || !pdata->desc_pktlen_mask) - return -EINVAL; - - SET_NETDEV_DEV(dev, &pdev->dev); - - ag = netdev_priv(dev); - ag->pdev = pdev; - ag->dev = dev; - ag->msg_enable = netif_msg_init(ag71xx_msg_level, - AG71XX_DEFAULT_MSG_ENABLE); - spin_lock_init(&ag->lock); - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac_base"); - if (!res) { - dev_err(&pdev->dev, "no mac_base resource found\n"); - err = -ENXIO; - goto err_out; - } - - ag->mac_base = ioremap_nocache(res->start, res->end - res->start + 1); - if (!ag->mac_base) { - dev_err(&pdev->dev, "unable to ioremap mac_base\n"); - err = -ENOMEM; - goto err_free_dev; - } - - dev->irq = platform_get_irq(pdev, 0); - err = request_irq(dev->irq, ag71xx_interrupt, - IRQF_DISABLED, - dev->name, dev); - if (err) { - dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq); - goto err_unmap_base; - } - - dev->base_addr = (unsigned long)ag->mac_base; - dev->netdev_ops = &ag71xx_netdev_ops; - dev->ethtool_ops = &ag71xx_ethtool_ops; - - INIT_WORK(&ag->restart_work, ag71xx_restart_work_func); - - init_timer(&ag->oom_timer); - ag->oom_timer.data = (unsigned long) dev; - ag->oom_timer.function = ag71xx_oom_timer_handler; - - ag->tx_ring.size = AG71XX_TX_RING_SIZE_DEFAULT; - ag->rx_ring.size = AG71XX_RX_RING_SIZE_DEFAULT; - - ag->max_frame_len = pdata->max_frame_len; - ag->desc_pktlen_mask = pdata->desc_pktlen_mask; - - ag->stop_desc = dma_alloc_coherent(NULL, - sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL); - - if (!ag->stop_desc) - goto err_free_irq; - - ag->stop_desc->data = 0; - ag->stop_desc->ctrl = 0; - ag->stop_desc->next = (u32) ag->stop_desc_dma; - - memcpy(dev->dev_addr, pdata->mac_addr, ETH_ALEN); - - netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); - - ag71xx_dump_regs(ag); - - ag71xx_hw_init(ag); - - ag71xx_dump_regs(ag); - - err = ag71xx_phy_connect(ag); - if (err) - goto err_free_desc; - - err = ag71xx_debugfs_init(ag); - if (err) - goto err_phy_disconnect; - - platform_set_drvdata(pdev, dev); - - err = register_netdev(dev); - if (err) { - dev_err(&pdev->dev, "unable to register net device\n"); - goto err_debugfs_exit; - } - - pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n", - dev->name, dev->base_addr, dev->irq, - ag71xx_get_phy_if_mode_name(pdata->phy_if_mode)); - - return 0; - -err_debugfs_exit: - ag71xx_debugfs_exit(ag); -err_phy_disconnect: - ag71xx_phy_disconnect(ag); -err_free_desc: - dma_free_coherent(NULL, sizeof(struct ag71xx_desc), ag->stop_desc, - ag->stop_desc_dma); -err_free_irq: - free_irq(dev->irq, dev); -err_unmap_base: - iounmap(ag->mac_base); -err_free_dev: - kfree(dev); -err_out: - platform_set_drvdata(pdev, NULL); - return err; -} - -static int ag71xx_remove(struct platform_device *pdev) -{ - struct net_device *dev = platform_get_drvdata(pdev); - - if (dev) { - struct ag71xx *ag = netdev_priv(dev); - - ag71xx_debugfs_exit(ag); - ag71xx_phy_disconnect(ag); - unregister_netdev(dev); - free_irq(dev->irq, dev); - iounmap(ag->mac_base); - kfree(dev); - platform_set_drvdata(pdev, NULL); - } - - return 0; -} - -static struct platform_driver ag71xx_driver = { - .probe = ag71xx_probe, - .remove = ag71xx_remove, - .driver = { - .name = AG71XX_DRV_NAME, - } -}; - -static int __init ag71xx_module_init(void) -{ - int ret; - - ret = ag71xx_debugfs_root_init(); - if (ret) - goto err_out; - - ret = ag71xx_mdio_driver_init(); - if (ret) - goto err_debugfs_exit; - - ret = platform_driver_register(&ag71xx_driver); - if (ret) - goto err_mdio_exit; - - return 0; - -err_mdio_exit: - ag71xx_mdio_driver_exit(); -err_debugfs_exit: - ag71xx_debugfs_root_exit(); -err_out: - return ret; -} - -static void __exit ag71xx_module_exit(void) -{ - platform_driver_unregister(&ag71xx_driver); - ag71xx_mdio_driver_exit(); - ag71xx_debugfs_root_exit(); -} - -module_init(ag71xx_module_init); -module_exit(ag71xx_module_exit); - -MODULE_VERSION(AG71XX_DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" AG71XX_DRV_NAME); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c deleted file mode 100644 index 71ae825..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c +++ /dev/null @@ -1,318 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -#define AG71XX_MDIO_RETRY 1000 -#define AG71XX_MDIO_DELAY 5 - -static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg, - u32 value) -{ - void __iomem *r; - - r = am->mdio_base + reg; - __raw_writel(value, r); - - /* flush write */ - (void) __raw_readl(r); -} - -static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg) -{ - return __raw_readl(am->mdio_base + reg); -} - -static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am) -{ - DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n", - am->mii_bus->name, - ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG), - ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD), - ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR)); - DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n", - am->mii_bus->name, - ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL), - ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS), - ag71xx_mdio_rr(am, AG71XX_REG_MII_IND)); -} - -static int ag71xx_mdio_wait_busy(struct ag71xx_mdio *am) -{ - int i; - - for (i = 0; i < AG71XX_MDIO_RETRY; i++) { - u32 busy; - - udelay(AG71XX_MDIO_DELAY); - - busy = ag71xx_mdio_rr(am, AG71XX_REG_MII_IND); - if (!busy) - return 0; - - udelay(AG71XX_MDIO_DELAY); - } - - pr_err("%s: MDIO operation timed out\n", am->mii_bus->name); - - return -ETIMEDOUT; -} - -int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg) -{ - int err; - int ret; - - err = ag71xx_mdio_wait_busy(am); - if (err) - return 0xffff; - - ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); - ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, - ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); - ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ); - - err = ag71xx_mdio_wait_busy(am); - if (err) - return 0xffff; - - ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff; - ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); - - DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret); - - return ret; -} - -void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val) -{ - DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val); - - ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, - ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); - ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val); - - ag71xx_mdio_wait_busy(am); -} - -static const u32 ar71xx_mdio_div_table[] = { - 4, 4, 6, 8, 10, 14, 20, 28, -}; - -static const u32 ar7240_mdio_div_table[] = { - 2, 2, 4, 6, 8, 12, 18, 26, 32, 40, 48, 56, 62, 70, 78, 96, -}; - -static const u32 ar933x_mdio_div_table[] = { - 4, 4, 6, 8, 10, 14, 20, 28, 34, 42, 50, 58, 66, 74, 82, 98, -}; - -static int ag71xx_mdio_get_divider(struct ag71xx_mdio *am, u32 *div) -{ - unsigned long ref_clock, mdio_clock; - const u32 *table; - int ndivs; - int i; - - ref_clock = am->pdata->ref_clock; - mdio_clock = am->pdata->mdio_clock; - - if (!ref_clock || !mdio_clock) - return -EINVAL; - - if (am->pdata->is_ar9330 || am->pdata->is_ar934x) { - table = ar933x_mdio_div_table; - ndivs = ARRAY_SIZE(ar933x_mdio_div_table); - } else if (am->pdata->is_ar7240) { - table = ar7240_mdio_div_table; - ndivs = ARRAY_SIZE(ar7240_mdio_div_table); - } else { - table = ar71xx_mdio_div_table; - ndivs = ARRAY_SIZE(ar71xx_mdio_div_table); - } - - for (i = 0; i < ndivs; i++) { - unsigned long t; - - t = ref_clock / table[i]; - if (t <= mdio_clock) { - *div = i; - return 0; - } - } - - dev_err(&am->mii_bus->dev, "no divider found for %lu/%lu\n", - ref_clock, mdio_clock); - return -ENOENT; -} - -static int ag71xx_mdio_reset(struct mii_bus *bus) -{ - struct ag71xx_mdio *am = bus->priv; - u32 t; - int err; - - err = ag71xx_mdio_get_divider(am, &t); - if (err) { - /* fallback */ - if (am->pdata->is_ar7240) - t = MII_CFG_CLK_DIV_6; - else if (am->pdata->builtin_switch && !am->pdata->is_ar934x) - t = MII_CFG_CLK_DIV_10; - else if (!am->pdata->builtin_switch && am->pdata->is_ar934x) - t = MII_CFG_CLK_DIV_58; - else - t = MII_CFG_CLK_DIV_28; - } - - ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); - udelay(100); - - ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t); - udelay(100); - - if (am->pdata->reset) - am->pdata->reset(bus); - - return 0; -} - -static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg) -{ - struct ag71xx_mdio *am = bus->priv; - - if (am->pdata->builtin_switch) - return ar7240sw_phy_read(bus, addr, reg); - else - return ag71xx_mdio_mii_read(am, addr, reg); -} - -static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val) -{ - struct ag71xx_mdio *am = bus->priv; - - if (am->pdata->builtin_switch) - ar7240sw_phy_write(bus, addr, reg, val); - else - ag71xx_mdio_mii_write(am, addr, reg, val); - return 0; -} - -static int ag71xx_mdio_probe(struct platform_device *pdev) -{ - struct ag71xx_mdio_platform_data *pdata; - struct ag71xx_mdio *am; - struct resource *res; - int i; - int err; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "no platform data specified\n"); - return -EINVAL; - } - - am = kzalloc(sizeof(*am), GFP_KERNEL); - if (!am) { - err = -ENOMEM; - goto err_out; - } - - am->pdata = pdata; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "no iomem resource found\n"); - err = -ENXIO; - goto err_out; - } - - am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1); - if (!am->mdio_base) { - dev_err(&pdev->dev, "unable to ioremap registers\n"); - err = -ENOMEM; - goto err_free_mdio; - } - - am->mii_bus = mdiobus_alloc(); - if (am->mii_bus == NULL) { - err = -ENOMEM; - goto err_iounmap; - } - - am->mii_bus->name = "ag71xx_mdio"; - am->mii_bus->read = ag71xx_mdio_read; - am->mii_bus->write = ag71xx_mdio_write; - am->mii_bus->reset = ag71xx_mdio_reset; - am->mii_bus->irq = am->mii_irq; - am->mii_bus->priv = am; - am->mii_bus->parent = &pdev->dev; - snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev)); - am->mii_bus->phy_mask = pdata->phy_mask; - - for (i = 0; i < PHY_MAX_ADDR; i++) - am->mii_irq[i] = PHY_POLL; - - ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0); - - err = mdiobus_register(am->mii_bus); - if (err) - goto err_free_bus; - - ag71xx_mdio_dump_regs(am); - - platform_set_drvdata(pdev, am); - return 0; - -err_free_bus: - mdiobus_free(am->mii_bus); -err_iounmap: - iounmap(am->mdio_base); -err_free_mdio: - kfree(am); -err_out: - return err; -} - -static int ag71xx_mdio_remove(struct platform_device *pdev) -{ - struct ag71xx_mdio *am = platform_get_drvdata(pdev); - - if (am) { - mdiobus_unregister(am->mii_bus); - mdiobus_free(am->mii_bus); - iounmap(am->mdio_base); - kfree(am); - platform_set_drvdata(pdev, NULL); - } - - return 0; -} - -static struct platform_driver ag71xx_mdio_driver = { - .probe = ag71xx_mdio_probe, - .remove = ag71xx_mdio_remove, - .driver = { - .name = "ag71xx-mdio", - } -}; - -int __init ag71xx_mdio_driver_init(void) -{ - return platform_driver_register(&ag71xx_mdio_driver); -} - -void ag71xx_mdio_driver_exit(void) -{ - platform_driver_unregister(&ag71xx_mdio_driver); -} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c deleted file mode 100644 index 9de77e9..0000000 --- a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org> - * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -static void ag71xx_phy_link_adjust(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - struct phy_device *phydev = ag->phy_dev; - unsigned long flags; - int status_change = 0; - - spin_lock_irqsave(&ag->lock, flags); - - if (phydev->link) { - if (ag->duplex != phydev->duplex - || ag->speed != phydev->speed) { - status_change = 1; - } - } - - if (phydev->link != ag->link) - status_change = 1; - - ag->link = phydev->link; - ag->duplex = phydev->duplex; - ag->speed = phydev->speed; - - if (status_change) - ag71xx_link_adjust(ag); - - spin_unlock_irqrestore(&ag->lock, flags); -} - -void ag71xx_phy_start(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - if (ag->phy_dev) { - phy_start(ag->phy_dev); - } else if (pdata->mii_bus_dev && pdata->switch_data) { - ag71xx_ar7240_start(ag); - } else { - ag->link = 1; - ag71xx_link_adjust(ag); - } -} - -void ag71xx_phy_stop(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - unsigned long flags; - - if (ag->phy_dev) - phy_stop(ag->phy_dev); - else if (pdata->mii_bus_dev && pdata->switch_data) - ag71xx_ar7240_stop(ag); - - spin_lock_irqsave(&ag->lock, flags); - if (ag->link) { - ag->link = 0; - ag71xx_link_adjust(ag); - } - spin_unlock_irqrestore(&ag->lock, flags); -} - -static int ag71xx_phy_connect_fixed(struct ag71xx *ag) -{ - struct device *dev = &ag->pdev->dev; - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - int ret = 0; - - /* use fixed settings */ - switch (pdata->speed) { - case SPEED_10: - case SPEED_100: - case SPEED_1000: - break; - default: - dev_err(dev, "invalid speed specified\n"); - ret = -EINVAL; - break; - } - - dev_dbg(dev, "using fixed link parameters\n"); - - ag->duplex = pdata->duplex; - ag->speed = pdata->speed; - - return ret; -} - -static int ag71xx_phy_connect_multi(struct ag71xx *ag) -{ - struct device *dev = &ag->pdev->dev; - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct phy_device *phydev = NULL; - int phy_addr; - int ret = 0; - - for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { - if (!(pdata->phy_mask & (1 << phy_addr))) - continue; - - if (ag->mii_bus->phy_map[phy_addr] == NULL) - continue; - - DBG("%s: PHY found at %s, uid=%08x\n", - dev_name(dev), - dev_name(&ag->mii_bus->phy_map[phy_addr]->dev), - ag->mii_bus->phy_map[phy_addr]->phy_id); - - if (phydev == NULL) - phydev = ag->mii_bus->phy_map[phy_addr]; - } - - if (!phydev) { - dev_err(dev, "no PHY found with phy_mask=%08x\n", - pdata->phy_mask); - return -ENODEV; - } - - ag->phy_dev = phy_connect(ag->dev, dev_name(&phydev->dev), - &ag71xx_phy_link_adjust, - pdata->phy_if_mode); - - if (IS_ERR(ag->phy_dev)) { - dev_err(dev, "could not connect to PHY at %s\n", - dev_name(&phydev->dev)); - return PTR_ERR(ag->phy_dev); - } - - /* mask with MAC supported features */ - if (pdata->has_gbit) - phydev->supported &= PHY_GBIT_FEATURES; - else - phydev->supported &= PHY_BASIC_FEATURES; - - phydev->advertising = phydev->supported; - - dev_info(dev, "connected to PHY at %s [uid=%08x, driver=%s]\n", - dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name); - - ag->link = 0; - ag->speed = 0; - ag->duplex = -1; - - return ret; -} - -static int dev_is_class(struct device *dev, void *class) -{ - if (dev->class != NULL && !strcmp(dev->class->name, class)) - return 1; - - return 0; -} - -static struct device *dev_find_class(struct device *parent, char *class) -{ - if (dev_is_class(parent, class)) { - get_device(parent); - return parent; - } - - return device_find_child(parent, class, dev_is_class); -} - -static struct mii_bus *dev_to_mii_bus(struct device *dev) -{ - struct device *d; - - d = dev_find_class(dev, "mdio_bus"); - if (d != NULL) { - struct mii_bus *bus; - - bus = to_mii_bus(d); - put_device(d); - - return bus; - } - - return NULL; -} - -int ag71xx_phy_connect(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - if (pdata->mii_bus_dev == NULL || - pdata->mii_bus_dev->bus == NULL ) - return ag71xx_phy_connect_fixed(ag); - - ag->mii_bus = dev_to_mii_bus(pdata->mii_bus_dev); - if (ag->mii_bus == NULL) { - dev_err(&ag->pdev->dev, "unable to find MII bus on device '%s'\n", - dev_name(pdata->mii_bus_dev)); - return -ENODEV; - } - - /* Reset the mdio bus explicitly */ - if (ag->mii_bus->reset) { - mutex_lock(&ag->mii_bus->mdio_lock); - ag->mii_bus->reset(ag->mii_bus); - mutex_unlock(&ag->mii_bus->mdio_lock); - } - - if (pdata->switch_data) - return ag71xx_ar7240_init(ag); - - if (pdata->phy_mask) - return ag71xx_phy_connect_multi(ag); - - return ag71xx_phy_connect_fixed(ag); -} - -void ag71xx_phy_disconnect(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - if (pdata->switch_data) - ag71xx_ar7240_cleanup(ag); - else if (ag->phy_dev) - phy_disconnect(ag->phy_dev); -} diff --git a/target/linux/ar71xx/files/drivers/spi/spi-ap83.c b/target/linux/ar71xx/files/drivers/spi/spi-ap83.c deleted file mode 100644 index 33843a6..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-ap83.c +++ /dev/null @@ -1,283 +0,0 @@ -/* - * Atheros AP83 board specific SPI Controller driver - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/workqueue.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/spi/spi.h> -#include <linux/spi/spi_bitbang.h> -#include <linux/bitops.h> -#include <linux/gpio.h> - -#include <asm/mach-ath79/ath79.h> - -#define DRV_DESC "Atheros AP83 board SPI Controller driver" -#define DRV_VERSION "0.1.0" -#define DRV_NAME "ap83-spi" - -#define AP83_SPI_CLK_HIGH (1 << 23) -#define AP83_SPI_CLK_LOW 0 -#define AP83_SPI_MOSI_HIGH (1 << 22) -#define AP83_SPI_MOSI_LOW 0 - -#define AP83_SPI_GPIO_CS 1 -#define AP83_SPI_GPIO_MISO 3 - -struct ap83_spi { - struct spi_bitbang bitbang; - void __iomem *base; - u32 addr; - - struct platform_device *pdev; -}; - -static inline u32 ap83_spi_rr(struct ap83_spi *sp, u32 reg) -{ - return __raw_readl(sp->base + reg); -} - -static inline struct ap83_spi *spidev_to_sp(struct spi_device *spi) -{ - return spi_master_get_devdata(spi->master); -} - -static inline void setsck(struct spi_device *spi, int val) -{ - struct ap83_spi *sp = spidev_to_sp(spi); - - if (val) - sp->addr |= AP83_SPI_CLK_HIGH; - else - sp->addr &= ~AP83_SPI_CLK_HIGH; - - dev_dbg(&spi->dev, "addr=%08x, SCK set to %s\n", - sp->addr, (val) ? "HIGH" : "LOW"); - - ap83_spi_rr(sp, sp->addr); -} - -static inline void setmosi(struct spi_device *spi, int val) -{ - struct ap83_spi *sp = spidev_to_sp(spi); - - if (val) - sp->addr |= AP83_SPI_MOSI_HIGH; - else - sp->addr &= ~AP83_SPI_MOSI_HIGH; - - dev_dbg(&spi->dev, "addr=%08x, MOSI set to %s\n", - sp->addr, (val) ? "HIGH" : "LOW"); - - ap83_spi_rr(sp, sp->addr); -} - -static inline u32 getmiso(struct spi_device *spi) -{ - u32 ret; - - ret = gpio_get_value(AP83_SPI_GPIO_MISO) ? 1 : 0; - dev_dbg(&spi->dev, "get MISO: %d\n", ret); - - return ret; -} - -static inline void do_spidelay(struct spi_device *spi, unsigned nsecs) -{ - ndelay(nsecs); -} - -static void ap83_spi_chipselect(struct spi_device *spi, int on) -{ - struct ap83_spi *sp = spidev_to_sp(spi); - - dev_dbg(&spi->dev, "set CS to %d\n", (on) ? 0 : 1); - - if (on) { - ath79_flash_acquire(); - - sp->addr = 0; - ap83_spi_rr(sp, sp->addr); - - gpio_set_value(AP83_SPI_GPIO_CS, 0); - } else { - gpio_set_value(AP83_SPI_GPIO_CS, 1); - ath79_flash_release(); - } -} - -#define spidelay(nsecs) \ - do { \ - /* Steal the spi_device pointer from our caller. \ - * The bitbang-API should probably get fixed here... */ \ - do_spidelay(spi, nsecs); \ - } while (0) - -#define EXPAND_BITBANG_TXRX -#include <linux/spi/spi_bitbang.h> -#include "spi-bitbang-txrx.h" - -static u32 ap83_spi_txrx_mode0(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX0 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits); -} - -static u32 ap83_spi_txrx_mode1(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX1 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits); -} - -static u32 ap83_spi_txrx_mode2(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX2 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits); -} - -static u32 ap83_spi_txrx_mode3(struct spi_device *spi, - unsigned nsecs, u32 word, u8 bits) -{ - dev_dbg(&spi->dev, "TXRX3 word=%08x, bits=%u\n", word, bits); - return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits); -} - -static int ap83_spi_probe(struct platform_device *pdev) -{ - struct spi_master *master; - struct ap83_spi *sp; - struct ap83_spi_platform_data *pdata; - struct resource *r; - int ret; - - ret = gpio_request(AP83_SPI_GPIO_MISO, "spi-miso"); - if (ret) { - dev_err(&pdev->dev, "gpio request failed for MISO\n"); - return ret; - } - - ret = gpio_request(AP83_SPI_GPIO_CS, "spi-cs"); - if (ret) { - dev_err(&pdev->dev, "gpio request failed for CS\n"); - goto err_free_miso; - } - - ret = gpio_direction_input(AP83_SPI_GPIO_MISO); - if (ret) { - dev_err(&pdev->dev, "unable to set direction of MISO\n"); - goto err_free_cs; - } - - ret = gpio_direction_output(AP83_SPI_GPIO_CS, 0); - if (ret) { - dev_err(&pdev->dev, "unable to set direction of CS\n"); - goto err_free_cs; - } - - master = spi_alloc_master(&pdev->dev, sizeof(*sp)); - if (master == NULL) { - dev_err(&pdev->dev, "failed to allocate spi master\n"); - return -ENOMEM; - } - - sp = spi_master_get_devdata(master); - platform_set_drvdata(pdev, sp); - - pdata = pdev->dev.platform_data; - - sp->bitbang.master = spi_master_get(master); - sp->bitbang.chipselect = ap83_spi_chipselect; - sp->bitbang.txrx_word[SPI_MODE_0] = ap83_spi_txrx_mode0; - sp->bitbang.txrx_word[SPI_MODE_1] = ap83_spi_txrx_mode1; - sp->bitbang.txrx_word[SPI_MODE_2] = ap83_spi_txrx_mode2; - sp->bitbang.txrx_word[SPI_MODE_3] = ap83_spi_txrx_mode3; - - sp->bitbang.master->bus_num = pdev->id; - sp->bitbang.master->num_chipselect = 1; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (r == NULL) { - ret = -ENOENT; - goto err_spi_put; - } - - sp->base = ioremap_nocache(r->start, r->end - r->start + 1); - if (!sp->base) { - ret = -ENXIO; - goto err_spi_put; - } - - ret = spi_bitbang_start(&sp->bitbang); - if (!ret) - goto err_unmap; - - dev_info(&pdev->dev, "AP83 SPI adapter at %08x\n", r->start); - - return 0; - -err_unmap: - iounmap(sp->base); -err_spi_put: - platform_set_drvdata(pdev, NULL); - spi_master_put(sp->bitbang.master); - -err_free_cs: - gpio_free(AP83_SPI_GPIO_CS); -err_free_miso: - gpio_free(AP83_SPI_GPIO_MISO); - return ret; -} - -static int ap83_spi_remove(struct platform_device *pdev) -{ - struct ap83_spi *sp = platform_get_drvdata(pdev); - - spi_bitbang_stop(&sp->bitbang); - iounmap(sp->base); - platform_set_drvdata(pdev, NULL); - spi_master_put(sp->bitbang.master); - - return 0; -} - -static struct platform_driver ap83_spi_drv = { - .probe = ap83_spi_probe, - .remove = ap83_spi_remove, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init ap83_spi_init(void) -{ - return platform_driver_register(&ap83_spi_drv); -} -module_init(ap83_spi_init); - -static void __exit ap83_spi_exit(void) -{ - platform_driver_unregister(&ap83_spi_drv); -} -module_exit(ap83_spi_exit); - -MODULE_ALIAS("platform:" DRV_NAME); -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c b/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c deleted file mode 100644 index a8d5282..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx-cpld.c +++ /dev/null @@ -1,441 +0,0 @@ -/* - * SPI driver for the CPLD chip on the Mikrotik RB4xx boards - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This file was based on the patches for Linux 2.6.27.39 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/device.h> -#include <linux/bitops.h> -#include <linux/spi/spi.h> -#include <linux/gpio.h> -#include <linux/slab.h> - -#include <asm/mach-ath79/rb4xx_cpld.h> - -#define DRV_NAME "spi-rb4xx-cpld" -#define DRV_DESC "RB4xx CPLD driver" -#define DRV_VERSION "0.1.0" - -#define CPLD_CMD_WRITE_NAND 0x08 /* send cmd, n x send data, send indle */ -#define CPLD_CMD_WRITE_CFG 0x09 /* send cmd, n x send cfg */ -#define CPLD_CMD_READ_NAND 0x0a /* send cmd, send idle, n x read data */ -#define CPLD_CMD_READ_FAST 0x0b /* send cmd, 4 x idle, n x read data */ -#define CPLD_CMD_LED5_ON 0x0c /* send cmd */ -#define CPLD_CMD_LED5_OFF 0x0d /* send cmd */ - -struct rb4xx_cpld { - struct spi_device *spi; - struct mutex lock; - struct gpio_chip chip; - unsigned int config; -}; - -static struct rb4xx_cpld *rb4xx_cpld; - -static inline struct rb4xx_cpld *gpio_to_cpld(struct gpio_chip *chip) -{ - return container_of(chip, struct rb4xx_cpld, chip); -} - -static int rb4xx_cpld_write_cmd(struct rb4xx_cpld *cpld, unsigned char cmd) -{ - struct spi_transfer t[1]; - struct spi_message m; - unsigned char tx_buf[1]; - int err; - - spi_message_init(&m); - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = tx_buf; - t[0].len = sizeof(tx_buf); - spi_message_add_tail(&t[0], &m); - - tx_buf[0] = cmd; - - err = spi_sync(cpld->spi, &m); - return err; -} - -static int rb4xx_cpld_write_cfg(struct rb4xx_cpld *cpld, unsigned char config) -{ - struct spi_transfer t[1]; - struct spi_message m; - unsigned char cmd[2]; - int err; - - spi_message_init(&m); - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - cmd[0] = CPLD_CMD_WRITE_CFG; - cmd[1] = config; - - err = spi_sync(cpld->spi, &m); - return err; -} - -static int __rb4xx_cpld_change_cfg(struct rb4xx_cpld *cpld, unsigned mask, - unsigned value) -{ - unsigned int config; - int err; - - config = cpld->config & ~mask; - config |= value; - - if ((cpld->config ^ config) & 0xff) { - err = rb4xx_cpld_write_cfg(cpld, config); - if (err) - return err; - } - - if ((cpld->config ^ config) & CPLD_CFG_nLED5) { - err = rb4xx_cpld_write_cmd(cpld, (value) ? CPLD_CMD_LED5_ON : - CPLD_CMD_LED5_OFF); - if (err) - return err; - } - - cpld->config = config; - return 0; -} - -int rb4xx_cpld_change_cfg(unsigned mask, unsigned value) -{ - int ret; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - mutex_lock(&rb4xx_cpld->lock); - ret = __rb4xx_cpld_change_cfg(rb4xx_cpld, mask, value); - mutex_unlock(&rb4xx_cpld->lock); - - return ret; -} -EXPORT_SYMBOL_GPL(rb4xx_cpld_change_cfg); - -int rb4xx_cpld_read_from(unsigned addr, unsigned char *rx_buf, - const unsigned char *verify_buf, unsigned count) -{ - const unsigned char cmd[5] = { - CPLD_CMD_READ_FAST, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - addr & 0xff, - 0 - }; - struct spi_transfer t[2] = { - { - .tx_buf = &cmd, - .len = 5, - }, - { - .tx_buf = verify_buf, - .rx_buf = rx_buf, - .len = count, - .verify = (verify_buf != NULL), - }, - }; - struct spi_message m; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - m.fast_read = 1; - spi_message_add_tail(&t[0], &m); - spi_message_add_tail(&t[1], &m); - return spi_sync(rb4xx_cpld->spi, &m); -} -EXPORT_SYMBOL_GPL(rb4xx_cpld_read_from); - -#if 0 -int rb4xx_cpld_read(unsigned char *buf, unsigned char *verify_buf, - unsigned count) -{ - struct spi_transfer t[2]; - struct spi_message m; - unsigned char cmd[2]; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - memset(&t, 0, sizeof(t)); - - /* send command */ - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - cmd[0] = CPLD_CMD_READ_NAND; - cmd[1] = 0; - - /* read data */ - t[1].rx_buf = buf; - t[1].len = count; - spi_message_add_tail(&t[1], &m); - - return spi_sync(rb4xx_cpld->spi, &m); -} -#else -int rb4xx_cpld_read(unsigned char *rx_buf, const unsigned char *verify_buf, - unsigned count) -{ - static const unsigned char cmd[2] = { CPLD_CMD_READ_NAND, 0 }; - struct spi_transfer t[2] = { - { - .tx_buf = &cmd, - .len = 2, - }, { - .tx_buf = verify_buf, - .rx_buf = rx_buf, - .len = count, - .verify = (verify_buf != NULL), - }, - }; - struct spi_message m; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - spi_message_add_tail(&t[0], &m); - spi_message_add_tail(&t[1], &m); - return spi_sync(rb4xx_cpld->spi, &m); -} -#endif -EXPORT_SYMBOL_GPL(rb4xx_cpld_read); - -int rb4xx_cpld_write(const unsigned char *buf, unsigned count) -{ -#if 0 - struct spi_transfer t[3]; - struct spi_message m; - unsigned char cmd[1]; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - memset(&t, 0, sizeof(t)); - spi_message_init(&m); - - /* send command */ - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - cmd[0] = CPLD_CMD_WRITE_NAND; - - /* write data */ - t[1].tx_buf = buf; - t[1].len = count; - spi_message_add_tail(&t[1], &m); - - /* send idle */ - t[2].len = 1; - spi_message_add_tail(&t[2], &m); - - return spi_sync(rb4xx_cpld->spi, &m); -#else - static const unsigned char cmd = CPLD_CMD_WRITE_NAND; - struct spi_transfer t[3] = { - { - .tx_buf = &cmd, - .len = 1, - }, { - .tx_buf = buf, - .len = count, - .fast_write = 1, - }, { - .len = 1, - .fast_write = 1, - }, - }; - struct spi_message m; - - if (rb4xx_cpld == NULL) - return -ENODEV; - - spi_message_init(&m); - spi_message_add_tail(&t[0], &m); - spi_message_add_tail(&t[1], &m); - spi_message_add_tail(&t[2], &m); - return spi_sync(rb4xx_cpld->spi, &m); -#endif -} -EXPORT_SYMBOL_GPL(rb4xx_cpld_write); - -static int rb4xx_cpld_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct rb4xx_cpld *cpld = gpio_to_cpld(chip); - int ret; - - mutex_lock(&cpld->lock); - ret = (cpld->config >> offset) & 1; - mutex_unlock(&cpld->lock); - - return ret; -} - -static void rb4xx_cpld_gpio_set(struct gpio_chip *chip, unsigned offset, - int value) -{ - struct rb4xx_cpld *cpld = gpio_to_cpld(chip); - - mutex_lock(&cpld->lock); - __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); - mutex_unlock(&cpld->lock); -} - -static int rb4xx_cpld_gpio_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - return -EOPNOTSUPP; -} - -static int rb4xx_cpld_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, - int value) -{ - struct rb4xx_cpld *cpld = gpio_to_cpld(chip); - int ret; - - mutex_lock(&cpld->lock); - ret = __rb4xx_cpld_change_cfg(cpld, (1 << offset), !!value << offset); - mutex_unlock(&cpld->lock); - - return ret; -} - -static int rb4xx_cpld_gpio_init(struct rb4xx_cpld *cpld, unsigned int base) -{ - int err; - - /* init config */ - cpld->config = CPLD_CFG_nLED1 | CPLD_CFG_nLED2 | CPLD_CFG_nLED3 | - CPLD_CFG_nLED4 | CPLD_CFG_nCE; - rb4xx_cpld_write_cfg(cpld, cpld->config); - - /* setup GPIO chip */ - cpld->chip.label = DRV_NAME; - - cpld->chip.get = rb4xx_cpld_gpio_get; - cpld->chip.set = rb4xx_cpld_gpio_set; - cpld->chip.direction_input = rb4xx_cpld_gpio_direction_input; - cpld->chip.direction_output = rb4xx_cpld_gpio_direction_output; - - cpld->chip.base = base; - cpld->chip.ngpio = CPLD_NUM_GPIOS; - cpld->chip.can_sleep = 1; - cpld->chip.dev = &cpld->spi->dev; - cpld->chip.owner = THIS_MODULE; - - err = gpiochip_add(&cpld->chip); - if (err) - dev_err(&cpld->spi->dev, "adding GPIO chip failed, err=%d\n", - err); - - return err; -} - -static int rb4xx_cpld_probe(struct spi_device *spi) -{ - struct rb4xx_cpld *cpld; - struct rb4xx_cpld_platform_data *pdata; - int err; - - pdata = spi->dev.platform_data; - if (!pdata) { - dev_dbg(&spi->dev, "no platform data\n"); - return -EINVAL; - } - - cpld = kzalloc(sizeof(*cpld), GFP_KERNEL); - if (!cpld) { - dev_err(&spi->dev, "no memory for private data\n"); - return -ENOMEM; - } - - mutex_init(&cpld->lock); - cpld->spi = spi_dev_get(spi); - dev_set_drvdata(&spi->dev, cpld); - - spi->mode = SPI_MODE_0; - spi->bits_per_word = 8; - err = spi_setup(spi); - if (err) { - dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); - goto err_drvdata; - } - - err = rb4xx_cpld_gpio_init(cpld, pdata->gpio_base); - if (err) - goto err_drvdata; - - rb4xx_cpld = cpld; - - return 0; - -err_drvdata: - dev_set_drvdata(&spi->dev, NULL); - kfree(cpld); - - return err; -} - -static int rb4xx_cpld_remove(struct spi_device *spi) -{ - struct rb4xx_cpld *cpld; - - rb4xx_cpld = NULL; - cpld = dev_get_drvdata(&spi->dev); - dev_set_drvdata(&spi->dev, NULL); - kfree(cpld); - - return 0; -} - -static struct spi_driver rb4xx_cpld_driver = { - .driver = { - .name = DRV_NAME, - .bus = &spi_bus_type, - .owner = THIS_MODULE, - }, - .probe = rb4xx_cpld_probe, - .remove = rb4xx_cpld_remove, -}; - -static int __init rb4xx_cpld_init(void) -{ - return spi_register_driver(&rb4xx_cpld_driver); -} -module_init(rb4xx_cpld_init); - -static void __exit rb4xx_cpld_exit(void) -{ - spi_unregister_driver(&rb4xx_cpld_driver); -} -module_exit(rb4xx_cpld_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx.c b/target/linux/ar71xx/files/drivers/spi/spi-rb4xx.c deleted file mode 100644 index 56260ff..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-rb4xx.c +++ /dev/null @@ -1,507 +0,0 @@ -/* - * SPI controller driver for the Mikrotik RB4xx boards - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This file was based on the patches for Linux 2.6.27.39 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/spinlock.h> -#include <linux/workqueue.h> -#include <linux/platform_device.h> -#include <linux/spi/spi.h> - -#include <asm/mach-ath79/ar71xx_regs.h> -#include <asm/mach-ath79/ath79.h> - -#define DRV_NAME "rb4xx-spi" -#define DRV_DESC "Mikrotik RB4xx SPI controller driver" -#define DRV_VERSION "0.1.0" - -#define SPI_CTRL_FASTEST 0x40 -#define SPI_FLASH_HZ 33333334 -#define SPI_CPLD_HZ 33333334 - -#define CPLD_CMD_READ_FAST 0x0b - -#undef RB4XX_SPI_DEBUG - -struct rb4xx_spi { - void __iomem *base; - struct spi_master *master; - - unsigned spi_ctrl_flash; - unsigned spi_ctrl_fread; - - struct clk *ahb_clk; - unsigned long ahb_freq; - - spinlock_t lock; - struct list_head queue; - int busy:1; - int cs_wait; -}; - -static unsigned spi_clk_low = AR71XX_SPI_IOC_CS1; - -#ifdef RB4XX_SPI_DEBUG -static inline void do_spi_delay(void) -{ - ndelay(20000); -} -#else -static inline void do_spi_delay(void) { } -#endif - -static inline void do_spi_init(struct spi_device *spi) -{ - unsigned cs = AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1; - - if (!(spi->mode & SPI_CS_HIGH)) - cs ^= (spi->chip_select == 2) ? AR71XX_SPI_IOC_CS1 : - AR71XX_SPI_IOC_CS0; - - spi_clk_low = cs; -} - -static inline void do_spi_finish(void __iomem *base) -{ - do_spi_delay(); - __raw_writel(AR71XX_SPI_IOC_CS0 | AR71XX_SPI_IOC_CS1, - base + AR71XX_SPI_REG_IOC); -} - -static inline void do_spi_clk(void __iomem *base, int bit) -{ - unsigned bval = spi_clk_low | ((bit & 1) ? AR71XX_SPI_IOC_DO : 0); - - do_spi_delay(); - __raw_writel(bval, base + AR71XX_SPI_REG_IOC); - do_spi_delay(); - __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); -} - -static void do_spi_byte(void __iomem *base, unsigned char byte) -{ - do_spi_clk(base, byte >> 7); - do_spi_clk(base, byte >> 6); - do_spi_clk(base, byte >> 5); - do_spi_clk(base, byte >> 4); - do_spi_clk(base, byte >> 3); - do_spi_clk(base, byte >> 2); - do_spi_clk(base, byte >> 1); - do_spi_clk(base, byte); - - pr_debug("spi_byte sent 0x%02x got 0x%02x\n", - (unsigned)byte, - (unsigned char)__raw_readl(base + AR71XX_SPI_REG_RDS)); -} - -static inline void do_spi_clk_fast(void __iomem *base, unsigned bit1, - unsigned bit2) -{ - unsigned bval = (spi_clk_low | - ((bit1 & 1) ? AR71XX_SPI_IOC_DO : 0) | - ((bit2 & 1) ? AR71XX_SPI_IOC_CS2 : 0)); - do_spi_delay(); - __raw_writel(bval, base + AR71XX_SPI_REG_IOC); - do_spi_delay(); - __raw_writel(bval | AR71XX_SPI_IOC_CLK, base + AR71XX_SPI_REG_IOC); -} - -static void do_spi_byte_fast(void __iomem *base, unsigned char byte) -{ - do_spi_clk_fast(base, byte >> 7, byte >> 6); - do_spi_clk_fast(base, byte >> 5, byte >> 4); - do_spi_clk_fast(base, byte >> 3, byte >> 2); - do_spi_clk_fast(base, byte >> 1, byte >> 0); - - pr_debug("spi_byte_fast sent 0x%02x got 0x%02x\n", - (unsigned)byte, - (unsigned char) __raw_readl(base + AR71XX_SPI_REG_RDS)); -} - -static int rb4xx_spi_txrx(void __iomem *base, struct spi_transfer *t) -{ - const unsigned char *rxv_ptr = NULL; - const unsigned char *tx_ptr = t->tx_buf; - unsigned char *rx_ptr = t->rx_buf; - unsigned i; - - pr_debug("spi_txrx len %u tx %u rx %u\n", - t->len, - (t->tx_buf ? 1 : 0), - (t->rx_buf ? 1 : 0)); - - if (t->verify) { - rxv_ptr = tx_ptr; - tx_ptr = NULL; - } - - for (i = 0; i < t->len; ++i) { - unsigned char sdata = tx_ptr ? tx_ptr[i] : 0; - - if (t->fast_write) - do_spi_byte_fast(base, sdata); - else - do_spi_byte(base, sdata); - - if (rx_ptr) { - rx_ptr[i] = __raw_readl(base + AR71XX_SPI_REG_RDS) & 0xff; - } else if (rxv_ptr) { - unsigned char c = __raw_readl(base + AR71XX_SPI_REG_RDS); - if (rxv_ptr[i] != c) - return i; - } - } - - return i; -} - -static int rb4xx_spi_read_fast(struct rb4xx_spi *rbspi, - struct spi_message *m) -{ - struct spi_transfer *t; - const unsigned char *tx_ptr; - unsigned addr; - void __iomem *base = rbspi->base; - - /* check for exactly two transfers */ - if (list_empty(&m->transfers) || - list_is_last(m->transfers.next, &m->transfers) || - !list_is_last(m->transfers.next->next, &m->transfers)) { - return -1; - } - - /* first transfer contains command and address */ - t = list_entry(m->transfers.next, - struct spi_transfer, transfer_list); - - if (t->len != 5 || t->tx_buf == NULL) - return -1; - - tx_ptr = t->tx_buf; - if (tx_ptr[0] != CPLD_CMD_READ_FAST) - return -1; - - addr = tx_ptr[1]; - addr = tx_ptr[2] | (addr << 8); - addr = tx_ptr[3] | (addr << 8); - addr += (unsigned) base; - - m->actual_length += t->len; - - /* second transfer contains data itself */ - t = list_entry(m->transfers.next->next, - struct spi_transfer, transfer_list); - - if (t->tx_buf && !t->verify) - return -1; - - __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); - __raw_writel(rbspi->spi_ctrl_fread, base + AR71XX_SPI_REG_CTRL); - __raw_writel(0, base + AR71XX_SPI_REG_FS); - - if (t->rx_buf) { - memcpy(t->rx_buf, (const void *)addr, t->len); - } else if (t->tx_buf) { - unsigned char buf[t->len]; - memcpy(buf, (const void *)addr, t->len); - if (memcmp(t->tx_buf, buf, t->len) != 0) - m->status = -EMSGSIZE; - } - m->actual_length += t->len; - - if (rbspi->spi_ctrl_flash != rbspi->spi_ctrl_fread) { - __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); - __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); - __raw_writel(0, base + AR71XX_SPI_REG_FS); - } - - return 0; -} - -static int rb4xx_spi_msg(struct rb4xx_spi *rbspi, struct spi_message *m) -{ - struct spi_transfer *t = NULL; - void __iomem *base = rbspi->base; - - m->status = 0; - if (list_empty(&m->transfers)) - return -1; - - if (m->fast_read) - if (rb4xx_spi_read_fast(rbspi, m) == 0) - return -1; - - __raw_writel(AR71XX_SPI_FS_GPIO, base + AR71XX_SPI_REG_FS); - __raw_writel(SPI_CTRL_FASTEST, base + AR71XX_SPI_REG_CTRL); - do_spi_init(m->spi); - - list_for_each_entry(t, &m->transfers, transfer_list) { - int len; - - len = rb4xx_spi_txrx(base, t); - if (len != t->len) { - m->status = -EMSGSIZE; - break; - } - m->actual_length += len; - - if (t->cs_change) { - if (list_is_last(&t->transfer_list, &m->transfers)) { - /* wait for continuation */ - return m->spi->chip_select; - } - do_spi_finish(base); - ndelay(100); - } - } - - do_spi_finish(base); - __raw_writel(rbspi->spi_ctrl_flash, base + AR71XX_SPI_REG_CTRL); - __raw_writel(0, base + AR71XX_SPI_REG_FS); - return -1; -} - -static void rb4xx_spi_process_queue_locked(struct rb4xx_spi *rbspi, - unsigned long *flags) -{ - int cs = rbspi->cs_wait; - - rbspi->busy = 1; - while (!list_empty(&rbspi->queue)) { - struct spi_message *m; - - list_for_each_entry(m, &rbspi->queue, queue) - if (cs < 0 || cs == m->spi->chip_select) - break; - - if (&m->queue == &rbspi->queue) - break; - - list_del_init(&m->queue); - spin_unlock_irqrestore(&rbspi->lock, *flags); - - cs = rb4xx_spi_msg(rbspi, m); - m->complete(m->context); - - spin_lock_irqsave(&rbspi->lock, *flags); - } - - rbspi->cs_wait = cs; - rbspi->busy = 0; - - if (cs >= 0) { - /* TODO: add timer to unlock cs after 1s inactivity */ - } -} - -static int rb4xx_spi_transfer(struct spi_device *spi, - struct spi_message *m) -{ - struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); - unsigned long flags; - - m->actual_length = 0; - m->status = -EINPROGRESS; - - spin_lock_irqsave(&rbspi->lock, flags); - list_add_tail(&m->queue, &rbspi->queue); - if (rbspi->busy || - (rbspi->cs_wait >= 0 && rbspi->cs_wait != m->spi->chip_select)) { - /* job will be done later */ - spin_unlock_irqrestore(&rbspi->lock, flags); - return 0; - } - - /* process job in current context */ - rb4xx_spi_process_queue_locked(rbspi, &flags); - spin_unlock_irqrestore(&rbspi->lock, flags); - - return 0; -} - -static int rb4xx_spi_setup(struct spi_device *spi) -{ - struct rb4xx_spi *rbspi = spi_master_get_devdata(spi->master); - unsigned long flags; - - if (spi->mode & ~(SPI_CS_HIGH)) { - dev_err(&spi->dev, "mode %x not supported\n", - (unsigned) spi->mode); - return -EINVAL; - } - - if (spi->bits_per_word != 8 && spi->bits_per_word != 0) { - dev_err(&spi->dev, "bits_per_word %u not supported\n", - (unsigned) spi->bits_per_word); - return -EINVAL; - } - - spin_lock_irqsave(&rbspi->lock, flags); - if (rbspi->cs_wait == spi->chip_select && !rbspi->busy) { - rbspi->cs_wait = -1; - rb4xx_spi_process_queue_locked(rbspi, &flags); - } - spin_unlock_irqrestore(&rbspi->lock, flags); - - return 0; -} - -static unsigned get_spi_ctrl(struct rb4xx_spi *rbspi, unsigned hz_max, - const char *name) -{ - unsigned div; - - div = (rbspi->ahb_freq - 1) / (2 * hz_max); - - /* - * CPU has a bug at (div == 0) - first bit read is random - */ - if (div == 0) - ++div; - - if (name) { - unsigned ahb_khz = (rbspi->ahb_freq + 500) / 1000; - unsigned div_real = 2 * (div + 1); - pr_debug("rb4xx: %s SPI clock %u kHz (AHB %u kHz / %u)\n", - name, - ahb_khz / div_real, - ahb_khz, div_real); - } - - return SPI_CTRL_FASTEST + div; -} - -static int rb4xx_spi_probe(struct platform_device *pdev) -{ - struct spi_master *master; - struct rb4xx_spi *rbspi; - struct resource *r; - int err = 0; - - master = spi_alloc_master(&pdev->dev, sizeof(*rbspi)); - if (master == NULL) { - dev_err(&pdev->dev, "no memory for spi_master\n"); - err = -ENOMEM; - goto err_out; - } - - master->bus_num = 0; - master->num_chipselect = 3; - master->setup = rb4xx_spi_setup; - master->transfer = rb4xx_spi_transfer; - - rbspi = spi_master_get_devdata(master); - - rbspi->ahb_clk = clk_get(&pdev->dev, "ahb"); - if (IS_ERR(rbspi->ahb_clk)) { - err = PTR_ERR(rbspi->ahb_clk); - goto err_put_master; - } - - err = clk_enable(rbspi->ahb_clk); - if (err) - goto err_clk_put; - - rbspi->ahb_freq = clk_get_rate(rbspi->ahb_clk); - if (!rbspi->ahb_freq) { - err = -EINVAL; - goto err_clk_disable; - } - - platform_set_drvdata(pdev, rbspi); - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (r == NULL) { - err = -ENOENT; - goto err_clk_disable; - } - - rbspi->base = ioremap(r->start, r->end - r->start + 1); - if (!rbspi->base) { - err = -ENXIO; - goto err_clk_disable; - } - - rbspi->master = master; - rbspi->spi_ctrl_flash = get_spi_ctrl(rbspi, SPI_FLASH_HZ, "FLASH"); - rbspi->spi_ctrl_fread = get_spi_ctrl(rbspi, SPI_CPLD_HZ, "CPLD"); - rbspi->cs_wait = -1; - - spin_lock_init(&rbspi->lock); - INIT_LIST_HEAD(&rbspi->queue); - - err = spi_register_master(master); - if (err) { - dev_err(&pdev->dev, "failed to register SPI master\n"); - goto err_iounmap; - } - - return 0; - -err_iounmap: - iounmap(rbspi->base); -err_clk_disable: - clk_disable(rbspi->ahb_clk); -err_clk_put: - clk_put(rbspi->ahb_clk); -err_put_master: - platform_set_drvdata(pdev, NULL); - spi_master_put(master); -err_out: - return err; -} - -static int rb4xx_spi_remove(struct platform_device *pdev) -{ - struct rb4xx_spi *rbspi = platform_get_drvdata(pdev); - - iounmap(rbspi->base); - clk_disable(rbspi->ahb_clk); - clk_put(rbspi->ahb_clk); - platform_set_drvdata(pdev, NULL); - spi_master_put(rbspi->master); - - return 0; -} - -static struct platform_driver rb4xx_spi_drv = { - .probe = rb4xx_spi_probe, - .remove = rb4xx_spi_remove, - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - }, -}; - -static int __init rb4xx_spi_init(void) -{ - return platform_driver_register(&rb4xx_spi_drv); -} -subsys_initcall(rb4xx_spi_init); - -static void __exit rb4xx_spi_exit(void) -{ - platform_driver_unregister(&rb4xx_spi_drv); -} - -module_exit(rb4xx_spi_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ar71xx/files/drivers/spi/spi-vsc7385.c b/target/linux/ar71xx/files/drivers/spi/spi-vsc7385.c deleted file mode 100644 index b712e71..0000000 --- a/target/linux/ar71xx/files/drivers/spi/spi-vsc7385.c +++ /dev/null @@ -1,621 +0,0 @@ -/* - * SPI driver for the Vitesse VSC7385 ethernet switch - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * Parts of this file are based on Atheros' 2.6.15 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/delay.h> -#include <linux/device.h> -#include <linux/bitops.h> -#include <linux/firmware.h> -#include <linux/spi/spi.h> -#include <linux/spi/vsc7385.h> - -#define DRV_NAME "spi-vsc7385" -#define DRV_DESC "Vitesse VSC7385 Gbit ethernet switch driver" -#define DRV_VERSION "0.1.0" - -#define VSC73XX_BLOCK_MAC 0x1 -#define VSC73XX_BLOCK_2 0x2 -#define VSC73XX_BLOCK_MII 0x3 -#define VSC73XX_BLOCK_4 0x4 -#define VSC73XX_BLOCK_5 0x5 -#define VSC73XX_BLOCK_SYSTEM 0x7 - -#define VSC73XX_SUBBLOCK_PORT_0 0 -#define VSC73XX_SUBBLOCK_PORT_1 1 -#define VSC73XX_SUBBLOCK_PORT_2 2 -#define VSC73XX_SUBBLOCK_PORT_3 3 -#define VSC73XX_SUBBLOCK_PORT_4 4 -#define VSC73XX_SUBBLOCK_PORT_MAC 6 - -/* MAC Block registers */ -#define VSC73XX_MAC_CFG 0x0 -#define VSC73XX_ADVPORTM 0x19 -#define VSC73XX_RXOCT 0x50 -#define VSC73XX_TXOCT 0x51 -#define VSC73XX_C_RX0 0x52 -#define VSC73XX_C_RX1 0x53 -#define VSC73XX_C_RX2 0x54 -#define VSC73XX_C_TX0 0x55 -#define VSC73XX_C_TX1 0x56 -#define VSC73XX_C_TX2 0x57 -#define VSC73XX_C_CFG 0x58 - -/* MAC_CFG register bits */ -#define VSC73XX_MAC_CFG_WEXC_DIS (1 << 31) -#define VSC73XX_MAC_CFG_PORT_RST (1 << 29) -#define VSC73XX_MAC_CFG_TX_EN (1 << 28) -#define VSC73XX_MAC_CFG_SEED_LOAD (1 << 27) -#define VSC73XX_MAC_CFG_FDX (1 << 18) -#define VSC73XX_MAC_CFG_GIGE (1 << 17) -#define VSC73XX_MAC_CFG_RX_EN (1 << 16) -#define VSC73XX_MAC_CFG_VLAN_DBLAWR (1 << 15) -#define VSC73XX_MAC_CFG_VLAN_AWR (1 << 14) -#define VSC73XX_MAC_CFG_100_BASE_T (1 << 13) -#define VSC73XX_MAC_CFG_TX_IPG(x) (((x) & 0x1f) << 6) -#define VSC73XX_MAC_CFG_MAC_RX_RST (1 << 5) -#define VSC73XX_MAC_CFG_MAC_TX_RST (1 << 4) -#define VSC73XX_MAC_CFG_BIT2 (1 << 2) -#define VSC73XX_MAC_CFG_CLK_SEL(x) ((x) & 0x3) - -/* ADVPORTM register bits */ -#define VSC73XX_ADVPORTM_IFG_PPM (1 << 7) -#define VSC73XX_ADVPORTM_EXC_COL_CONT (1 << 6) -#define VSC73XX_ADVPORTM_EXT_PORT (1 << 5) -#define VSC73XX_ADVPORTM_INV_GTX (1 << 4) -#define VSC73XX_ADVPORTM_ENA_GTX (1 << 3) -#define VSC73XX_ADVPORTM_DDR_MODE (1 << 2) -#define VSC73XX_ADVPORTM_IO_LOOPBACK (1 << 1) -#define VSC73XX_ADVPORTM_HOST_LOOPBACK (1 << 0) - -/* MII Block registers */ -#define VSC73XX_MII_STAT 0x0 -#define VSC73XX_MII_CMD 0x1 -#define VSC73XX_MII_DATA 0x2 - -/* System Block registers */ -#define VSC73XX_ICPU_SIPAD 0x01 -#define VSC73XX_ICPU_CLOCK_DELAY 0x05 -#define VSC73XX_ICPU_CTRL 0x10 -#define VSC73XX_ICPU_ADDR 0x11 -#define VSC73XX_ICPU_SRAM 0x12 -#define VSC73XX_ICPU_MBOX_VAL 0x15 -#define VSC73XX_ICPU_MBOX_SET 0x16 -#define VSC73XX_ICPU_MBOX_CLR 0x17 -#define VSC73XX_ICPU_CHIPID 0x18 -#define VSC73XX_ICPU_GPIO 0x34 - -#define VSC73XX_ICPU_CTRL_CLK_DIV (1 << 8) -#define VSC73XX_ICPU_CTRL_SRST_HOLD (1 << 7) -#define VSC73XX_ICPU_CTRL_BOOT_EN (1 << 3) -#define VSC73XX_ICPU_CTRL_EXT_ACC_EN (1 << 2) -#define VSC73XX_ICPU_CTRL_CLK_EN (1 << 1) -#define VSC73XX_ICPU_CTRL_SRST (1 << 0) - -#define VSC73XX_ICPU_CHIPID_ID_SHIFT 12 -#define VSC73XX_ICPU_CHIPID_ID_MASK 0xffff -#define VSC73XX_ICPU_CHIPID_REV_SHIFT 28 -#define VSC73XX_ICPU_CHIPID_REV_MASK 0xf -#define VSC73XX_ICPU_CHIPID_ID_7385 0x7385 -#define VSC73XX_ICPU_CHIPID_ID_7395 0x7395 - -#define VSC73XX_CMD_MODE_READ 0 -#define VSC73XX_CMD_MODE_WRITE 1 -#define VSC73XX_CMD_MODE_SHIFT 4 -#define VSC73XX_CMD_BLOCK_SHIFT 5 -#define VSC73XX_CMD_BLOCK_MASK 0x7 -#define VSC73XX_CMD_SUBBLOCK_MASK 0xf - -#define VSC7385_CLOCK_DELAY ((3 << 4) | 3) -#define VSC7385_CLOCK_DELAY_MASK ((3 << 4) | 3) - -#define VSC73XX_ICPU_CTRL_STOP (VSC73XX_ICPU_CTRL_SRST_HOLD | \ - VSC73XX_ICPU_CTRL_BOOT_EN | \ - VSC73XX_ICPU_CTRL_EXT_ACC_EN) - -#define VSC73XX_ICPU_CTRL_START (VSC73XX_ICPU_CTRL_CLK_DIV | \ - VSC73XX_ICPU_CTRL_BOOT_EN | \ - VSC73XX_ICPU_CTRL_CLK_EN | \ - VSC73XX_ICPU_CTRL_SRST) - -#define VSC7385_ADVPORTM_MASK (VSC73XX_ADVPORTM_IFG_PPM | \ - VSC73XX_ADVPORTM_EXC_COL_CONT | \ - VSC73XX_ADVPORTM_EXT_PORT | \ - VSC73XX_ADVPORTM_INV_GTX | \ - VSC73XX_ADVPORTM_ENA_GTX | \ - VSC73XX_ADVPORTM_DDR_MODE | \ - VSC73XX_ADVPORTM_IO_LOOPBACK | \ - VSC73XX_ADVPORTM_HOST_LOOPBACK) - -#define VSC7385_ADVPORTM_INIT (VSC73XX_ADVPORTM_EXT_PORT | \ - VSC73XX_ADVPORTM_ENA_GTX | \ - VSC73XX_ADVPORTM_DDR_MODE) - -#define VSC7385_MAC_CFG_RESET (VSC73XX_MAC_CFG_PORT_RST | \ - VSC73XX_MAC_CFG_MAC_RX_RST | \ - VSC73XX_MAC_CFG_MAC_TX_RST) - -#define VSC73XX_MAC_CFG_INIT (VSC73XX_MAC_CFG_TX_EN | \ - VSC73XX_MAC_CFG_FDX | \ - VSC73XX_MAC_CFG_GIGE | \ - VSC73XX_MAC_CFG_RX_EN) - -#define VSC73XX_RESET_DELAY 100 - -struct vsc7385 { - struct spi_device *spi; - struct mutex lock; - struct vsc7385_platform_data *pdata; -}; - -static int vsc7385_is_addr_valid(u8 block, u8 subblock) -{ - switch (block) { - case VSC73XX_BLOCK_MAC: - switch (subblock) { - case 0 ... 4: - case 6: - return 1; - } - break; - - case VSC73XX_BLOCK_2: - case VSC73XX_BLOCK_SYSTEM: - switch (subblock) { - case 0: - return 1; - } - break; - - case VSC73XX_BLOCK_MII: - case VSC73XX_BLOCK_4: - case VSC73XX_BLOCK_5: - switch (subblock) { - case 0 ... 1: - return 1; - } - break; - } - - return 0; -} - -static inline u8 vsc7385_make_addr(u8 mode, u8 block, u8 subblock) -{ - u8 ret; - - ret = (block & VSC73XX_CMD_BLOCK_MASK) << VSC73XX_CMD_BLOCK_SHIFT; - ret |= (mode & 1) << VSC73XX_CMD_MODE_SHIFT; - ret |= subblock & VSC73XX_CMD_SUBBLOCK_MASK; - - return ret; -} - -static int vsc7385_read(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, - u32 *value) -{ - u8 cmd[4]; - u8 buf[4]; - struct spi_transfer t[2]; - struct spi_message m; - int err; - - if (!vsc7385_is_addr_valid(block, subblock)) - return -EINVAL; - - spi_message_init(&m); - - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - t[1].rx_buf = buf; - t[1].len = sizeof(buf); - spi_message_add_tail(&t[1], &m); - - cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_READ, block, subblock); - cmd[1] = reg; - cmd[2] = 0; - cmd[3] = 0; - - mutex_lock(&vsc->lock); - err = spi_sync(vsc->spi, &m); - mutex_unlock(&vsc->lock); - - if (err) - return err; - - *value = (((u32) buf[0]) << 24) | (((u32) buf[1]) << 16) | - (((u32) buf[2]) << 8) | ((u32) buf[3]); - - return 0; -} - - -static int vsc7385_write(struct vsc7385 *vsc, u8 block, u8 subblock, u8 reg, - u32 value) -{ - u8 cmd[2]; - u8 buf[4]; - struct spi_transfer t[2]; - struct spi_message m; - int err; - - if (!vsc7385_is_addr_valid(block, subblock)) - return -EINVAL; - - spi_message_init(&m); - - memset(&t, 0, sizeof(t)); - - t[0].tx_buf = cmd; - t[0].len = sizeof(cmd); - spi_message_add_tail(&t[0], &m); - - t[1].tx_buf = buf; - t[1].len = sizeof(buf); - spi_message_add_tail(&t[1], &m); - - cmd[0] = vsc7385_make_addr(VSC73XX_CMD_MODE_WRITE, block, subblock); - cmd[1] = reg; - - buf[0] = (value >> 24) & 0xff; - buf[1] = (value >> 16) & 0xff; - buf[2] = (value >> 8) & 0xff; - buf[3] = value & 0xff; - - mutex_lock(&vsc->lock); - err = spi_sync(vsc->spi, &m); - mutex_unlock(&vsc->lock); - - return err; -} - -static inline int vsc7385_write_verify(struct vsc7385 *vsc, u8 block, - u8 subblock, u8 reg, u32 value, - u32 read_mask, u32 read_val) -{ - struct spi_device *spi = vsc->spi; - u32 t; - int err; - - err = vsc7385_write(vsc, block, subblock, reg, value); - if (err) - return err; - - err = vsc7385_read(vsc, block, subblock, reg, &t); - if (err) - return err; - - if ((t & read_mask) != read_val) { - dev_err(&spi->dev, "register write error\n"); - return -EIO; - } - - return 0; -} - -static inline int vsc7385_set_clock_delay(struct vsc7385 *vsc, u32 val) -{ - return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CLOCK_DELAY, val); -} - -static inline int vsc7385_get_clock_delay(struct vsc7385 *vsc, u32 *val) -{ - return vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CLOCK_DELAY, val); -} - -static inline int vsc7385_icpu_stop(struct vsc7385 *vsc) -{ - return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, - VSC73XX_ICPU_CTRL_STOP); -} - -static inline int vsc7385_icpu_start(struct vsc7385 *vsc) -{ - return vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_CTRL, - VSC73XX_ICPU_CTRL_START); -} - -static inline int vsc7385_icpu_reset(struct vsc7385 *vsc) -{ - int rc; - - rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, VSC73XX_ICPU_ADDR, - 0x0000); - if (rc) - dev_err(&vsc->spi->dev, - "could not reset microcode, err=%d\n", rc); - - return rc; -} - -static int vsc7385_upload_ucode(struct vsc7385 *vsc) -{ - struct spi_device *spi = vsc->spi; - const struct firmware *firmware; - char *ucode_name; - unsigned char *dp; - unsigned int curVal; - int i; - int diffs; - int rc; - - ucode_name = (vsc->pdata->ucode_name) ? vsc->pdata->ucode_name - : "vsc7385_ucode.bin"; - rc = request_firmware(&firmware, ucode_name, &spi->dev); - if (rc) { - dev_err(&spi->dev, "request_firmware failed, err=%d\n", - rc); - return rc; - } - - rc = vsc7385_icpu_stop(vsc); - if (rc) - goto out; - - rc = vsc7385_icpu_reset(vsc); - if (rc) - goto out; - - dev_info(&spi->dev, "uploading microcode...\n"); - - dp = (unsigned char *) firmware->data; - for (i = 0; i < firmware->size; i++) { - rc = vsc7385_write(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_SRAM, *dp++); - if (rc) { - dev_err(&spi->dev, "could not load microcode, err=%d\n", - rc); - goto out; - } - } - - rc = vsc7385_icpu_reset(vsc); - if (rc) - goto out; - - dev_info(&spi->dev, "verifying microcode...\n"); - - dp = (unsigned char *) firmware->data; - diffs = 0; - for (i = 0; i < firmware->size; i++) { - rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_SRAM, &curVal); - if (rc) { - dev_err(&spi->dev, "could not read microcode %d\n", - rc); - goto out; - } - - if (curVal > 0xff) { - dev_err(&spi->dev, "bad val read: %04x : %02x %02x\n", - i, *dp, curVal); - rc = -EIO; - goto out; - } - - if ((curVal & 0xff) != *dp) { - diffs++; - dev_err(&spi->dev, "verify error: %04x : %02x %02x\n", - i, *dp, curVal); - - if (diffs > 4) - break; - } - dp++; - } - - if (diffs) { - dev_err(&spi->dev, "microcode verification failed\n"); - rc = -EIO; - goto out; - } - - dev_info(&spi->dev, "microcode uploaded\n"); - - rc = vsc7385_icpu_start(vsc); - -out: - release_firmware(firmware); - return rc; -} - -static int vsc7385_setup(struct vsc7385 *vsc) -{ - struct vsc7385_platform_data *pdata = vsc->pdata; - u32 t; - int err; - - err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CLOCK_DELAY, - VSC7385_CLOCK_DELAY, - VSC7385_CLOCK_DELAY_MASK, - VSC7385_CLOCK_DELAY); - if (err) - goto err; - - err = vsc7385_write_verify(vsc, VSC73XX_BLOCK_MAC, - VSC73XX_SUBBLOCK_PORT_MAC, VSC73XX_ADVPORTM, - VSC7385_ADVPORTM_INIT, - VSC7385_ADVPORTM_MASK, - VSC7385_ADVPORTM_INIT); - if (err) - goto err; - - err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, - VSC73XX_MAC_CFG, VSC7385_MAC_CFG_RESET); - if (err) - goto err; - - t = VSC73XX_MAC_CFG_INIT; - t |= VSC73XX_MAC_CFG_TX_IPG(pdata->mac_cfg.tx_ipg); - t |= VSC73XX_MAC_CFG_CLK_SEL(pdata->mac_cfg.clk_sel); - if (pdata->mac_cfg.bit2) - t |= VSC73XX_MAC_CFG_BIT2; - - err = vsc7385_write(vsc, VSC73XX_BLOCK_MAC, VSC73XX_SUBBLOCK_PORT_MAC, - VSC73XX_MAC_CFG, t); - if (err) - goto err; - - return 0; - -err: - return err; -} - -static int vsc7385_detect(struct vsc7385 *vsc) -{ - struct spi_device *spi = vsc->spi; - u32 t; - u32 id; - u32 rev; - int err; - - err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_MBOX_VAL, &t); - if (err) { - dev_err(&spi->dev, "unable to read mailbox, err=%d\n", err); - return err; - } - - if (t == 0xffffffff) { - dev_dbg(&spi->dev, "assert chip reset\n"); - if (vsc->pdata->reset) - vsc->pdata->reset(); - - } - - err = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, - VSC73XX_ICPU_CHIPID, &t); - if (err) { - dev_err(&spi->dev, "unable to read chip id, err=%d\n", err); - return err; - } - - id = (t >> VSC73XX_ICPU_CHIPID_ID_SHIFT) & VSC73XX_ICPU_CHIPID_ID_MASK; - switch (id) { - case VSC73XX_ICPU_CHIPID_ID_7385: - case VSC73XX_ICPU_CHIPID_ID_7395: - break; - default: - dev_err(&spi->dev, "unsupported chip, id=%04x\n", id); - return -ENODEV; - } - - rev = (t >> VSC73XX_ICPU_CHIPID_REV_SHIFT) & - VSC73XX_ICPU_CHIPID_REV_MASK; - dev_info(&spi->dev, "VSC%04X (rev. %d) switch found\n", id, rev); - - return 0; -} - -static int vsc7385_probe(struct spi_device *spi) -{ - struct vsc7385 *vsc; - struct vsc7385_platform_data *pdata; - int err; - - printk(KERN_INFO DRV_DESC " version " DRV_VERSION"\n"); - - pdata = spi->dev.platform_data; - if (!pdata) { - dev_err(&spi->dev, "no platform data specified\n"); - return -ENODEV; - } - - vsc = kzalloc(sizeof(*vsc), GFP_KERNEL); - if (!vsc) { - dev_err(&spi->dev, "no memory for private data\n"); - return -ENOMEM; - } - - mutex_init(&vsc->lock); - vsc->pdata = pdata; - vsc->spi = spi_dev_get(spi); - dev_set_drvdata(&spi->dev, vsc); - - spi->mode = SPI_MODE_0; - spi->bits_per_word = 8; - err = spi_setup(spi); - if (err) { - dev_err(&spi->dev, "spi_setup failed, err=%d\n", err); - goto err_drvdata; - } - - err = vsc7385_detect(vsc); - if (err) { - dev_err(&spi->dev, "no chip found, err=%d\n", err); - goto err_drvdata; - } - - err = vsc7385_upload_ucode(vsc); - if (err) - goto err_drvdata; - - err = vsc7385_setup(vsc); - if (err) - goto err_drvdata; - - return 0; - -err_drvdata: - dev_set_drvdata(&spi->dev, NULL); - kfree(vsc); - return err; -} - -static int vsc7385_remove(struct spi_device *spi) -{ - struct vsc7385_data *vsc; - - vsc = dev_get_drvdata(&spi->dev); - dev_set_drvdata(&spi->dev, NULL); - kfree(vsc); - - return 0; -} - -static struct spi_driver vsc7385_driver = { - .driver = { - .name = DRV_NAME, - .bus = &spi_bus_type, - .owner = THIS_MODULE, - }, - .probe = vsc7385_probe, - .remove = vsc7385_remove, -}; - -static int __init vsc7385_init(void) -{ - return spi_register_driver(&vsc7385_driver); -} -module_init(vsc7385_init); - -static void __exit vsc7385_exit(void) -{ - spi_unregister_driver(&vsc7385_driver); -} -module_exit(vsc7385_exit); - -MODULE_DESCRIPTION(DRV_DESC); -MODULE_VERSION(DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>"); -MODULE_LICENSE("GPL v2"); - diff --git a/target/linux/ar71xx/files/include/linux/nxp_74hc153.h b/target/linux/ar71xx/files/include/linux/nxp_74hc153.h deleted file mode 100644 index 20b8845..0000000 --- a/target/linux/ar71xx/files/include/linux/nxp_74hc153.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * NXP 74HC153 - Dual 4-input multiplexer defines - * - * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef _NXP_74HC153_H -#define _NXP_74HC153_H - -#define NXP_74HC153_DRIVER_NAME "nxp-74hc153" - -struct nxp_74hc153_platform_data { - unsigned gpio_base; - unsigned gpio_pin_s0; - unsigned gpio_pin_s1; - unsigned gpio_pin_1y; - unsigned gpio_pin_2y; -}; - -#endif /* _NXP_74HC153_H */ diff --git a/target/linux/ar71xx/files/include/linux/platform/ar934x_nfc.h b/target/linux/ar71xx/files/include/linux/platform/ar934x_nfc.h deleted file mode 100644 index 4a4e751..0000000 --- a/target/linux/ar71xx/files/include/linux/platform/ar934x_nfc.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Platform data definition for the built-in NAND controller of the - * Atheros AR934x SoCs - * - * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _AR934X_NFC_PLATFORM_H -#define _AR934X_NFC_PLATFORM_H - -#define AR934X_NFC_DRIVER_NAME "ar934x-nfc" - -struct mtd_info; -struct mtd_partition; - -enum ar934x_nfc_ecc_mode { - AR934X_NFC_ECC_SOFT = 0, - AR934X_NFC_ECC_HW, -}; - -struct ar934x_nfc_platform_data { - const char *name; - struct mtd_partition *parts; - int nr_parts; - - bool swap_dma; - enum ar934x_nfc_ecc_mode ecc_mode; - - void (*hw_reset)(bool active); - void (*select_chip)(int chip_no); - int (*scan_fixup)(struct mtd_info *mtd); -}; - -#endif /* _AR934X_NFC_PLATFORM_H */ diff --git a/target/linux/ar71xx/files/include/linux/platform_data/gpio-latch.h b/target/linux/ar71xx/files/include/linux/platform_data/gpio-latch.h deleted file mode 100644 index 0450e67..0000000 --- a/target/linux/ar71xx/files/include/linux/platform_data/gpio-latch.h +++ /dev/null @@ -1,14 +0,0 @@ -#ifndef _GPIO_LATCH_H_ -#define _GPIO_LATCH_H_ - -#define GPIO_LATCH_DRIVER_NAME "gpio-latch" - -struct gpio_latch_platform_data { - int base; - int num_gpios; - int *gpios; - int le_gpio_index; - bool le_active_low; -}; - -#endif /* _GPIO_LATCH_H_ */ diff --git a/target/linux/ar71xx/files/include/linux/platform_data/rb91x_nand.h b/target/linux/ar71xx/files/include/linux/platform_data/rb91x_nand.h deleted file mode 100644 index 5f17fb8..0000000 --- a/target/linux/ar71xx/files/include/linux/platform_data/rb91x_nand.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef _RB91X_NAND_H_ -#define _RB91X_NAND_H_ - -#define RB91X_NAND_DRIVER_NAME "rb91x-nand" - -struct rb91x_nand_platform_data { - int gpio_nce; /* chip enable, active low */ - int gpio_ale; /* address latch enable */ - int gpio_cle; /* command latch enable */ - int gpio_rdy; - int gpio_read; - int gpio_nrw; /* read/write enable, active low */ - int gpio_nle; /* latch enable, active low */ -}; - -#endif /* _RB91X_NAND_H_ */
\ No newline at end of file diff --git a/target/linux/ar71xx/files/include/linux/spi/vsc7385.h b/target/linux/ar71xx/files/include/linux/spi/vsc7385.h deleted file mode 100644 index 1072ad7..0000000 --- a/target/linux/ar71xx/files/include/linux/spi/vsc7385.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Platform data definition for the Vitesse VSC7385 ethernet switch driver - * - * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -struct vsc7385_platform_data { - void (*reset)(void); - char *ucode_name; - struct { - u32 tx_ipg:5; - u32 bit2:1; - u32 clk_sel:3; - } mac_cfg; -}; diff --git a/target/linux/ar71xx/files/net/dsa/mv88e6063.c b/target/linux/ar71xx/files/net/dsa/mv88e6063.c deleted file mode 100644 index 5638a9f..0000000 --- a/target/linux/ar71xx/files/net/dsa/mv88e6063.c +++ /dev/null @@ -1,294 +0,0 @@ -/* - * net/dsa/mv88e6063.c - Driver for Marvell 88e6063 switch chips - * Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org> - * - * This driver was base on: net/dsa/mv88e6060.c - * net/dsa/mv88e6063.c - Driver for Marvell 88e6060 switch chips - * Copyright (c) 2008-2009 Marvell Semiconductor - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/list.h> -#include <linux/netdevice.h> -#include <linux/phy.h> -#include "dsa_priv.h" - -#define REG_BASE 0x10 -#define REG_PHY(p) (REG_BASE + (p)) -#define REG_PORT(p) (REG_BASE + 8 + (p)) -#define REG_GLOBAL (REG_BASE + 0x0f) -#define NUM_PORTS 7 - -static int reg_read(struct dsa_switch *ds, int addr, int reg) -{ - return mdiobus_read(ds->master_mii_bus, addr, reg); -} - -#define REG_READ(addr, reg) \ - ({ \ - int __ret; \ - \ - __ret = reg_read(ds, addr, reg); \ - if (__ret < 0) \ - return __ret; \ - __ret; \ - }) - - -static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) -{ - return mdiobus_write(ds->master_mii_bus, addr, reg, val); -} - -#define REG_WRITE(addr, reg, val) \ - ({ \ - int __ret; \ - \ - __ret = reg_write(ds, addr, reg, val); \ - if (__ret < 0) \ - return __ret; \ - }) - -static char *mv88e6063_probe(struct mii_bus *bus, int sw_addr) -{ - int ret; - - ret = mdiobus_read(bus, REG_PORT(0), 0x03); - if (ret >= 0) { - ret &= 0xfff0; - if (ret == 0x1530) - return "Marvell 88E6063"; - } - - return NULL; -} - -static int mv88e6063_switch_reset(struct dsa_switch *ds) -{ - int i; - int ret; - - /* - * Set all ports to the disabled state. - */ - for (i = 0; i < NUM_PORTS; i++) { - ret = REG_READ(REG_PORT(i), 0x04); - REG_WRITE(REG_PORT(i), 0x04, ret & 0xfffc); - } - - /* - * Wait for transmit queues to drain. - */ - msleep(2); - - /* - * Reset the switch. - */ - REG_WRITE(REG_GLOBAL, 0x0a, 0xa130); - - /* - * Wait up to one second for reset to complete. - */ - for (i = 0; i < 1000; i++) { - ret = REG_READ(REG_GLOBAL, 0x00); - if ((ret & 0x8000) == 0x0000) - break; - - msleep(1); - } - if (i == 1000) - return -ETIMEDOUT; - - return 0; -} - -static int mv88e6063_setup_global(struct dsa_switch *ds) -{ - /* - * Disable discarding of frames with excessive collisions, - * set the maximum frame size to 1536 bytes, and mask all - * interrupt sources. - */ - REG_WRITE(REG_GLOBAL, 0x04, 0x0800); - - /* - * Enable automatic address learning, set the address - * database size to 1024 entries, and set the default aging - * time to 5 minutes. - */ - REG_WRITE(REG_GLOBAL, 0x0a, 0x2130); - - return 0; -} - -static int mv88e6063_setup_port(struct dsa_switch *ds, int p) -{ - int addr = REG_PORT(p); - - /* - * Do not force flow control, disable Ingress and Egress - * Header tagging, disable VLAN tunneling, and set the port - * state to Forwarding. Additionally, if this is the CPU - * port, enable Ingress and Egress Trailer tagging mode. - */ - REG_WRITE(addr, 0x04, dsa_is_cpu_port(ds, p) ? 0x4103 : 0x0003); - - /* - * Port based VLAN map: give each port its own address - * database, allow the CPU port to talk to each of the 'real' - * ports, and allow each of the 'real' ports to only talk to - * the CPU port. - */ - REG_WRITE(addr, 0x06, - ((p & 0xf) << 12) | - (dsa_is_cpu_port(ds, p) ? - ds->phys_port_mask : - (1 << ds->dst->cpu_port))); - - /* - * Port Association Vector: when learning source addresses - * of packets, add the address to the address database using - * a port bitmap that has only the bit for this port set and - * the other bits clear. - */ - REG_WRITE(addr, 0x0b, 1 << p); - - return 0; -} - -static int mv88e6063_setup(struct dsa_switch *ds) -{ - int i; - int ret; - - ret = mv88e6063_switch_reset(ds); - if (ret < 0) - return ret; - - /* @@@ initialise atu */ - - ret = mv88e6063_setup_global(ds); - if (ret < 0) - return ret; - - for (i = 0; i < NUM_PORTS; i++) { - ret = mv88e6063_setup_port(ds, i); - if (ret < 0) - return ret; - } - - return 0; -} - -static int mv88e6063_set_addr(struct dsa_switch *ds, u8 *addr) -{ - REG_WRITE(REG_GLOBAL, 0x01, (addr[0] << 8) | addr[1]); - REG_WRITE(REG_GLOBAL, 0x02, (addr[2] << 8) | addr[3]); - REG_WRITE(REG_GLOBAL, 0x03, (addr[4] << 8) | addr[5]); - - return 0; -} - -static int mv88e6063_port_to_phy_addr(int port) -{ - if (port >= 0 && port <= NUM_PORTS) - return REG_PHY(port); - return -1; -} - -static int mv88e6063_phy_read(struct dsa_switch *ds, int port, int regnum) -{ - int addr; - - addr = mv88e6063_port_to_phy_addr(port); - if (addr == -1) - return 0xffff; - - return reg_read(ds, addr, regnum); -} - -static int -mv88e6063_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) -{ - int addr; - - addr = mv88e6063_port_to_phy_addr(port); - if (addr == -1) - return 0xffff; - - return reg_write(ds, addr, regnum, val); -} - -static void mv88e6063_poll_link(struct dsa_switch *ds) -{ - int i; - - for (i = 0; i < DSA_MAX_PORTS; i++) { - struct net_device *dev; - int uninitialized_var(port_status); - int link; - int speed; - int duplex; - int fc; - - dev = ds->ports[i]; - if (dev == NULL) - continue; - - link = 0; - if (dev->flags & IFF_UP) { - port_status = reg_read(ds, REG_PORT(i), 0x00); - if (port_status < 0) - continue; - - link = !!(port_status & 0x1000); - } - - if (!link) { - if (netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link down\n", dev->name); - netif_carrier_off(dev); - } - continue; - } - - speed = (port_status & 0x0100) ? 100 : 10; - duplex = (port_status & 0x0200) ? 1 : 0; - fc = ((port_status & 0xc000) == 0xc000) ? 1 : 0; - - if (!netif_carrier_ok(dev)) { - printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " - "flow control %sabled\n", dev->name, - speed, duplex ? "full" : "half", - fc ? "en" : "dis"); - netif_carrier_on(dev); - } - } -} - -static struct dsa_switch_driver mv88e6063_switch_driver = { - .tag_protocol = htons(ETH_P_TRAILER), - .probe = mv88e6063_probe, - .setup = mv88e6063_setup, - .set_addr = mv88e6063_set_addr, - .phy_read = mv88e6063_phy_read, - .phy_write = mv88e6063_phy_write, - .poll_link = mv88e6063_poll_link, -}; - -static int __init mv88e6063_init(void) -{ - register_switch_driver(&mv88e6063_switch_driver); - return 0; -} -module_init(mv88e6063_init); - -static void __exit mv88e6063_cleanup(void) -{ - unregister_switch_driver(&mv88e6063_switch_driver); -} -module_exit(mv88e6063_cleanup); |